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    RESISTIVE MEMORY DEVICE CAPABLE OF IMPROVING SENSING MARGIN OF DATA
    2.
    发明申请
    RESISTIVE MEMORY DEVICE CAPABLE OF IMPROVING SENSING MARGIN OF DATA 有权
    能够提高数据传感率的电阻式存储器件

    公开(公告)号：US20150194200A1

    公开(公告)日：2015-07-09

    申请号：US14510629

    申请日：2014-10-09

    申请人： Ki-Seok SUH ,  Jae-kyu LEE

    发明人： Ki-Seok SUH ,  Jae-kyu LEE

    IPC分类号： G11C11/16 ,  G11C5/08

    CPC分类号： G11C5/08 ,  G11C5/063 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1653 ,  G11C11/1655 ,  G11C11/1659 ,  G11C13/0023 ,  G11C2213/71 ,  H01L27/228

    摘要： A resistive memory device includes a cell block having a plurality of unit memory cells in which a resistive element and a cell select element are connected to each other in series, the cell block operating in response to a word line, a bit line, and a source line, and a dummy line, when different interconnection layers form the source line and the bit line, respectively, connected to one of the interconnection layers which is formed at a lower side the remaining interconnection layer between the interconnection layers for the source line and the bit line, wherein the dummy line has a resistance lower than a resistance of the lower interconnection layer.

    摘要翻译： 电阻式存储器件包括具有多个单元存储器单元的单元块，其中电阻元件和单元选择元件串联连接在一起，所述单元块响应于字线，位线和 源极线和虚拟线，当不同的互连层分别形成源极线和位线时，分别与形成在源极线的互连层之间的剩余互连层的下侧形成的互连层之一连接， 位线，其中虚线具有比下互连层的电阻低的电阻。

    MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20170170234A1

    公开(公告)日：2017-06-15

    申请号：US15234257

    申请日：2016-08-11

    申请人： Jae-Kyu LEE ,  Sung-In KIM ,  Ki-Seok SUH

    发明人： Jae-Kyu LEE ,  Sung-In KIM ,  Ki-Seok SUH

    IPC分类号： H01L27/22 ,  H01L43/12

    CPC分类号： H01L27/228 ,  G11C11/1655 ,  G11C11/1659

    摘要： A magnetoresistive random access memory (MRAM) device including a substrate including a plurality of active patterns arranged along a first direction, each of the active patterns extending in a diagonal direction with respect to the first direction; a plurality of gate structures on the substrate, the gate structures extending in a second direction substantially perpendicular to the first direction; a source line structure electrically connected to source regions of the respective active patterns, the source line structure extending in the first direction; a plurality of magnetic tunnel junction (MTJ) structures electrically connected to drain regions of the respective active patterns, the MTJ structures being spaced apart from each other; and a bit line structure electrically connected to the MTJ structures in respective memory cells, the memory cells sharing with the source line structure.

    MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    磁性随机访问存储器件及其制造方法

    公开(公告)号：US20170069684A1

    公开(公告)日：2017-03-09

    申请号：US15157403

    申请日：2016-05-17

    申请人： Ki-Seok SUH ,  Jae-Chul SHIM ,  Kil-Ho LEE ,  Yong-Seok CHUNG ,  Gwan-Hyeob KOH ,  Yoon-Jong SONG

    发明人： Ki-Seok SUH ,  Jae-Chul SHIM ,  Kil-Ho LEE ,  Yong-Seok CHUNG ,  Gwan-Hyeob KOH ,  Yoon-Jong SONG

    IPC分类号： H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

    CPC分类号： H01L27/222 ,  H01L43/12

    摘要： A method of manufacturing an MRAM device includes sequentially forming a first insulating interlayer and an etch-stop layer on a substrate. A lower electrode is formed through the etch-stop layer and the first insulating interlayer. An MTJ structure layer and an upper electrode are sequentially formed on the lower electrode and the etch-stop layer. The MTJ structure layer is patterned by a physical etching process using the upper electrode as an etching mask to form an MTJ structure at least partially contacting the lower electrode. The first insulating interlayer is protected by the etch-stop layer so not to be etched by the physical etching process.

    摘要翻译： 制造MRAM器件的方法包括在衬底上依次形成第一绝缘层和蚀刻停止层。 通过蚀刻停止层和第一绝缘中间层形成下电极。 在下电极和蚀刻停止层上依次形成MTJ结构层和上电极。 通过使用上电极作为蚀刻掩模的物理蚀刻工艺对MTJ结构层进行构图，以形成至少部分地接触下电极的MTJ结构。 第一绝缘中间层由蚀刻停止层保护，因此不被物理蚀刻工艺蚀刻。