公开(公告)号：US5945703A

公开(公告)日：1999-08-31

申请号：US351539

申请日：1994-12-07

申请人： Kazuyoshi Furukawa ,  Masanobu Ogino ,  Koichi Kishi

发明人： Kazuyoshi Furukawa ,  Masanobu Ogino ,  Koichi Kishi

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L27/10861 ,  H01L27/10832

摘要： In a semiconductor memory device, a capacitor with a trench having a laterally expanded bottom part is provided, the area above the laterally expanded part being provided for a transistor and cell separation, this resulting in an increase in the degree of integration. This laterally expanded part is formed by etching a silicon oxide film which is sandwiched between a substrate and a silicon layer, and is obtained by forming a depression in a semiconductor substrate beforehand. A silicon layer or another semiconductor substrate is laminated by bonding to a semiconductor substrate such as this into which is formed a depression, a trench which extends to this depression being formed, and the required films being formed to obtain the desired trench capacitor. By forming an oxide film on all of or the depression part of the semiconductor substrate into which is formed the depression, it is possible to eliminate the influence of radiation, by improving insulation properties.

摘要翻译： 在半导体存储器件中，提供具有横向膨胀的底部的沟槽的电容器，横向扩展部分上方的区域被提供用于晶体管和电池分离，这导致集成度的增加。 该横向膨胀部通过蚀刻被夹在基板和硅层之间的氧化硅膜形成，并且通过预先在半导体基板中形成凹陷而获得。 通过结合到形成凹陷的半导体衬底，延伸到形成该凹陷的沟槽和形成所需的膜以获得所需的沟槽电容器来层叠硅层或另一半导体衬底。 通过在形成有凹陷的半导体衬底的全部或凹陷部上形成氧化膜，可以通过提高绝缘性而消除辐射的影响。

公开(公告)号：US5266823A

公开(公告)日：1993-11-30

申请号：US719619

申请日：1991-06-24

申请人： Hiroyuki Noji ,  Koichi Kishi ,  Yusuke Kohyama ,  Soichi Sugiura

发明人： Hiroyuki Noji ,  Koichi Kishi ,  Yusuke Kohyama ,  Soichi Sugiura

IPC分类号： H01L21/22 ,  H01L21/265 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78 ,  H01L27/01 ,  H01L27/02 ,  H01L29/06 ,  H01L29/10

CPC分类号： H01L29/66575 ,  H01L21/2652 ,  H01L21/823814 ,  H01L27/0922 ,  H01L29/78

摘要： According to this present invention, a semiconductor device includes source and drain diffusion layers, and a gate electrode formed on a substrate between the source diffusion layer and the drain diffusion layer. In addition, antioxidant films are respectively formed on the source diffusion layer and the drain diffusion layer. These antioxidant films are used for controlling a diffusion rate of an impurity contained in the source diffusion layer and the drain diffusion layer.

摘要翻译： 根据本发明，半导体器件包括源极和漏极扩散层，以及形成在源极扩散层和漏极扩散层之间的衬底上的栅电极。 此外，在源极扩散层和漏极扩散层上分别形成抗氧化膜。 这些抗氧化膜用于控制源极扩散层和漏极扩散层中所含杂质的扩散速度。

公开(公告)号：US06601851B1

公开(公告)日：2003-08-05

申请号：US09714864

申请日：2000-11-17

申请人： Yoshio Sakamoto ,  Norikatsu Furuta ,  Kenji Imai ,  Hironobu Suzuki ,  Makoto Katayama ,  Koichi Kishi ,  Yumiko Morisada ,  Hiroshi Tanigawa

发明人： Yoshio Sakamoto ,  Norikatsu Furuta ,  Kenji Imai ,  Hironobu Suzuki ,  Makoto Katayama ,  Koichi Kishi ,  Yumiko Morisada ,  Hiroshi Tanigawa

IPC分类号： A63F100

CPC分类号： A63F1/00 ,  A63F1/02 ,  A63F3/00075 ,  A63F2001/0441

摘要： A card game toy includes a master card as an other self of a player and a plurality of monster cards, and is used for a card game that a battle is played by placing own and opponent cards in a proper positions of a battle field. The master card includes a character display portion to display a character, an ability-reducing indication to indicate an ability to reduce the attack power from the opponent, and a card-hand-ability indication to indicate an ability to use a card hand. The monster card includes a character display region to display a character, a position indication indicative of whether of a forward type or backward type, a physical-power indication indicative of a physical-power of the monster, and an ability indication indicative of an ability of the monster.

摘要翻译： 纸牌游戏玩具包括作为玩家的其他自身的主卡和多个怪物卡，并且用于通过将自己的对手卡放置在战场的适当位置来进行战斗的纸牌游戏。 主卡包括用于显示角色的字符显示部分，用于指示能够减少来自对手的攻击强度的能力降低指示，以及指示使用卡牌手的能力的卡手能力指示。 该怪物卡包括用于显示字符的字符显示区域，指示前向类型或后向类型的位置指示，指示该怪物的物理力量的物理功率指示，以及指示能力的能力指示 的怪物。

公开(公告)号：US06419584B1

公开(公告)日：2002-07-16

申请号：US09714664

申请日：2000-11-17

申请人： Yoshio Sakamoto ,  Norikatsu Furuta ,  Makoto Katayama ,  Kenji Imai ,  Koichi Kishi ,  Kazuhiro Tamura

发明人： Yoshio Sakamoto ,  Norikatsu Furuta ,  Makoto Katayama ,  Kenji Imai ,  Koichi Kishi ,  Kazuhiro Tamura

IPC分类号： A63F1300

CPC分类号： A63F13/822 ,  A63F3/00075 ,  A63F3/00643 ,  A63F13/005 ,  A63F13/537 ,  A63F13/92 ,  A63F2300/204 ,  A63F2300/8094

摘要： A card game apparatus includes a display to display a game scene. In the game scene, a first master display site and a second master display site are formed to respectively display therein a first master as the other self of a game player and a second master as the other self of an opponent. The game player is allowed to select a monster card from a card hand display site and present it to a monster card presenting site. Responsive to an instruction of attack with a monster card, an attack power of the monster card is compared with the HP of a designated second master or the monster presented in the monster card presenting site, thereby arithmetically determining a battle result.

摘要翻译： 纸牌游戏装置包括显示游戏场景的显示器。 在游戏场景中，形成第一主显示位置和第二主显示位置，以分别在其中显示作为游戏者的另一个自身的第一主人和作为对手的另一个自己的第二主人。 允许游戏玩家从卡片手牌显示网站中选择一个怪物卡，并将其呈现给一个怪物卡片呈现站点。 对于使用怪物卡进行攻击的指令，将怪物卡的攻击强度与指定的第二主人的HP或在怪物卡呈现站点中呈现的怪物进行比较，从而算术地确定战斗结果。

公开(公告)号：US5038183A

公开(公告)日：1991-08-06

申请号：US540272

申请日：1990-06-19

申请人： Koichi Kishi ,  Soichi Sugiura

发明人： Koichi Kishi ,  Soichi Sugiura

IPC分类号： H01L21/265 ,  H01L29/861 ,  H01L29/866

CPC分类号： H01L29/8611 ,  H01L29/8613

摘要： A p-type impurity diffusion layer is formed in a major surface region of an n-type silicon substrate. An insulating film is formed on the substrate, and a contact hole is formed in the insulating film at a position corresponding to the impurity diffusion layer. An n-type polysilicon layer is formed inside the contact hole. The p-type impurity diffusion layer and the n-type polysilicon layer constitute a diode. A p-n junction of the diode is formed on the major surface of the substrate or in the polysilicon layer above the major surface.

公开(公告)号：US5302542A

公开(公告)日：1994-04-12

申请号：US56900

申请日：1993-05-05

申请人： Koichi Kishi ,  Shizuo Sawada

发明人： Koichi Kishi ,  Shizuo Sawada

IPC分类号： H01L27/10 ,  H01L21/762 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10861 ,  H01L21/76251 ,  H01L27/10829 ,  H01L21/76275 ,  H01L21/76281 ,  H01L21/76283

摘要： A semiconductor substrate according to the present invention includes a first semiconductor substrate of a first conductivity type, an insulating film selectively formed in the first semiconductor substrate to define an exposed surface region, and a second semiconductor substrate of a second conductivity type opposite to the first conductivity type being bonded to the first semiconductor substrate. A DRAM cell formed by using the semiconductor substrate includes a trench capacitor formed in the first semiconductor substrate through both the second semiconductor substrate and the exposed surface region, and a transfer transistor formed in the second semiconductor substrate.

摘要翻译： 根据本发明的半导体衬底包括第一导电类型的第一半导体衬底，选择性地形成在第一半导体衬底中以限定暴露表面区域的绝缘膜，以及与第一导电类型相反的第二导电类型的第二半导体衬底 导电类型键合到第一半导体衬底。 通过使用半导体衬底形成的DRAM单元包括通过第二半导体衬底和暴露表面区域形成在第一半导体衬底中的沟槽电容器和形成在第二半导体衬底中的转移晶体管。