公开(公告)号：US5945703A

公开(公告)日：1999-08-31

申请号：US351539

申请日：1994-12-07

申请人： Kazuyoshi Furukawa ,  Masanobu Ogino ,  Koichi Kishi

发明人： Kazuyoshi Furukawa ,  Masanobu Ogino ,  Koichi Kishi

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L27/10861 ,  H01L27/10832

摘要： In a semiconductor memory device, a capacitor with a trench having a laterally expanded bottom part is provided, the area above the laterally expanded part being provided for a transistor and cell separation, this resulting in an increase in the degree of integration. This laterally expanded part is formed by etching a silicon oxide film which is sandwiched between a substrate and a silicon layer, and is obtained by forming a depression in a semiconductor substrate beforehand. A silicon layer or another semiconductor substrate is laminated by bonding to a semiconductor substrate such as this into which is formed a depression, a trench which extends to this depression being formed, and the required films being formed to obtain the desired trench capacitor. By forming an oxide film on all of or the depression part of the semiconductor substrate into which is formed the depression, it is possible to eliminate the influence of radiation, by improving insulation properties.

摘要翻译： 在半导体存储器件中，提供具有横向膨胀的底部的沟槽的电容器，横向扩展部分上方的区域被提供用于晶体管和电池分离，这导致集成度的增加。 该横向膨胀部通过蚀刻被夹在基板和硅层之间的氧化硅膜形成，并且通过预先在半导体基板中形成凹陷而获得。 通过结合到形成凹陷的半导体衬底，延伸到形成该凹陷的沟槽和形成所需的膜以获得所需的沟槽电容器来层叠硅层或另一半导体衬底。 通过在形成有凹陷的半导体衬底的全部或凹陷部上形成氧化膜，可以通过提高绝缘性而消除辐射的影响。

公开(公告)号：US4894206A

公开(公告)日：1990-01-16

申请号：US91947

申请日：1987-09-01

申请人： Youji Yamashita ,  Masakatu Kojima ,  Yoshiaki Matsushita ,  Masanobu Ogino

发明人： Youji Yamashita ,  Masakatu Kojima ,  Yoshiaki Matsushita ,  Masanobu Ogino

IPC分类号： C30B15/12 ,  H01L21/18

CPC分类号： C30B15/12 ,  Y10S117/90 ,  Y10T117/1052

摘要： The present invention discloses a crystal pulling apparatus having a double-crucible structure, wherein an inner crucible is located in an outer crucible. An end of a pipe-like passage is located in a through hole formed in a side wall of an inner crucible located in an outer crucible, and a melt is supplied from the outer crucible to the inner crucible through the pipe-like passage, during crystal pulling. During melting or neckdown, prior to crystal pulling, diffusion of an impurity between the melts in the outer crucible and the inner crucible, and exchange of the melts between the outer crucible and the inner crucible are prevented by the pipe-like passage.

摘要翻译： 本发明公开了一种具有双坩埚结构的晶体拉制装置，其中内坩埚位于外坩埚中。 管状通道的端部位于形成在位于外坩埚内坩埚的侧壁中的通孔中，熔融物通过管状通道从外坩埚供应到内坩埚中 水晶拉。 在熔融或颈缩期间，在晶体拉伸之前，通过管状通道来防止杂质在外坩埚和内坩埚之间的熔体的扩散以及外坩埚和内坩埚之间的熔体的交换。

公开(公告)号：US5951755A

公开(公告)日：1999-09-14

申请号：US801113

申请日：1997-02-14

申请人： Moriya Miyashita ,  Masanobu Ogino ,  Tadahide Hoshi ,  Masanori Numano ,  Shuichi Samata ,  Akiko Sekihara ,  Keiko Akita

发明人： Moriya Miyashita ,  Masanobu Ogino ,  Tadahide Hoshi ,  Masanori Numano ,  Shuichi Samata ,  Akiko Sekihara ,  Keiko Akita

IPC分类号： H01L21/322 ,  C30B25/92

CPC分类号： H01L21/3225

摘要： A manufacturing method for manufacturing a semiconductor substrate has first annealing step for annealing silicon single crystal to permit oxygen embryos or oxygen precipitations grown from the oxygen embryos precipitating in a predetermined region and a second annealing step for permitting said oxygen embryos or said oxygen precipitations to contract using a second temperature range higher than the first temperature range, said second temperature range being high enough to contract said oxygen embryos and low enough to prevent redistribution of boron from affecting to device characteristics, to form a denuded zone in said predetermined region at the principal surface. An inspection method for inspecting a semiconductor substrate further has measuring step, subsequent to said first and second annealing steps for measuring the density of oxygen embryos grown into oxygen precipitations among those precipitated in said silicon single crystal.

摘要翻译： 用于制造半导体衬底的制造方法具有用于使硅单晶退火的第一退火步骤，以允许从预定区域中的氧胚生长的氧胚胎或氧沉淀，以及用于允许所述氧胚胎或所述氧沉淀物收缩的第二退火步骤 使用高于第一温度范围的第二温度范围，所述第二温度范围足够高以收缩所述氧胚，并且足够低以防止硼的再分布影响到设备特性，以在主体的所述预定区域中形成裸露区域 表面。 用于检查半导体衬底的检查方法还具有测量步骤，在所述第一和第二退火步骤之后，测量在所述硅单晶中析出的氧沉淀物中生长的氧胚胎的密度。

公开(公告)号：US5096839A

公开(公告)日：1992-03-17

申请号：US693035

申请日：1991-04-30

申请人： Tsutomu Amai ,  Masanobu Ogino

发明人： Tsutomu Amai ,  Masanobu Ogino

IPC分类号： C30B29/06 ,  C30B33/02 ,  H01L21/322

CPC分类号： C30B33/02 ,  C30B29/06 ,  H01L21/3225 ,  Y10S117/916

摘要： The ratio between variations in the oxygen concentration before and after a silicon wafer is subjected to two types of heat treatments in which the temperatures and processing times are different is defined. The silicon wafer is subjected to a first heat treatment, and the interstitial oxygen concentrations before and after the first heat treatment are respectively set to [Oi].sub.1ini and [Oi].sub.1af. The silicon wafer is successively subjected to second and third heat treatments, and the interstitial oxygen concentrations before and after the second and third heat treatments are respectively set to [Oi].sub.2ini and [Oi].sub.2af. At this time, the interstitial oxygen concentrations [Oi].sub.1ini, [Oi].sub.1af, [Oi].sub.2ini and [Oi].sub.2af are so set as to satisfy the condition that ([Oi].sub.2ini -[Oi].sub.2af)/[Oi].sub.1ini -[Oi].sub.1af).gtoreq.20.

摘要翻译： 硅晶片之前和之后的氧浓度变化之间的比率被定义为其中温度和加工时间不同的两种热处理。 对硅晶片进行第一热处理，并且将第一热处理前后的间隙氧浓度分别设定为] 1ini和]1af。 硅晶片依次进行第二和第三热处理，第二和第三热处理之前和之后的间隙氧浓度分别设定为O 2ini和O 2af。 此时，间隙氧浓度] 1ini，]1af，]2ini和]2af被设定为满足条件：（] 2ii-]2af）/ [Oi ] 1ini- [Oi] 1af）> = = 20。

公开(公告)号：US4958373A

公开(公告)日：1990-09-18

申请号：US174879

申请日：1988-03-29

申请人： Toshiro Usami ,  Hiroyuki Kamijo ,  Takao Ohta ,  Masanobu Ogino

发明人： Toshiro Usami ,  Hiroyuki Kamijo ,  Takao Ohta ,  Masanobu Ogino

IPC分类号： H01L21/66 ,  G01N21/88 ,  G01N21/95 ,  G01N21/956 ,  G06T7/00

CPC分类号： G06T7/0004 ,  G01N21/9501 ,  G01N2021/8874 ,  G01N2021/8887 ,  G01N21/8851 ,  G01N2201/102 ,  G06T2207/10056 ,  G06T2207/30148

摘要： A defect-recognition processing apparatus converts into a defect image pattern, via a television camera, crystal defects present on the surface of an object under inspection, to process an image signal, by means of an image processing device, which corresponds to the defect image pattern, to measure rectangular images in terms of their length and their ratio between L.sub.Y and L.sub.X (L.sub.Y : a length in a longitudinal direction and L.sub.X : a length in the lateral direction of the wafer) and to detect defects developed on the surface of the aforementioned object.

摘要翻译： 缺陷识别处理装置通过电视摄像机将存在于被检查物体的表面上的晶体缺陷转换为缺陷图像图案，通过与缺陷图像对应的图像处理装置处理图像信号 图案，以其长度和它们在LY和LX之间的比例（LY：纵向方向上的长度，LX：晶片的横向方向上的长度）测量矩形图像，并且检测在该表面上形成的缺陷 上述目的。

公开(公告)号：US4990459A

公开(公告)日：1991-02-05

申请号：US339825

申请日：1989-04-18

申请人： Ayako Maeda ,  Mokuji Kageyama ,  Shintaro Yoshii ,  Masanobu Ogino

发明人： Ayako Maeda ,  Mokuji Kageyama ,  Shintaro Yoshii ,  Masanobu Ogino

IPC分类号： G01N1/28 ,  G01N1/02 ,  G01N31/00 ,  G01N33/00

CPC分类号： G01N1/4055 ,  G01N1/02 ,  G01N31/00 ,  G01N2001/028 ,  Y10T436/25 ,  Y10T436/25375 ,  Y10T436/255

摘要： A drop which is hydrophobic to the surface of an object to be measured is dropped on the surface of the object and moved so as to be brought into contact with the overall surface of the object to be measured. After the movement, the drop is recovered and analyzed by chemical analysis to measure the kind of element and content of an impurity adsorbed on the surface of the object to be measured.

公开(公告)号：US5213993A

公开(公告)日：1993-05-25

申请号：US845359

申请日：1992-03-06

申请人： Masanobu Ogino ,  Tsutomu Amai ,  Takanobu Kamakura

发明人： Masanobu Ogino ,  Tsutomu Amai ,  Takanobu Kamakura

IPC分类号： H01L21/20 ,  H01L21/762

CPC分类号： H01L21/76264 ,  H01L21/2007 ,  H01L21/76275 ,  H01L21/76286 ,  Y10S148/012 ,  Y10S148/033

摘要： A manufacturing method of this invention improves nonuniformity in film thickness of a circuit element formation region produced due to a poor flatness of a semiconductor substrate in the manufacture of a semiconductor substrate having a dielectric isolating structure. Mirror-polished surfaces of first and second semiconductor substrates are opposed and bonded to each other so as to sandwich a dielectric having a predetermined thickness, and the first semiconductor substrate is ground from the surface opposite to the adhesion surface to have a predetermined thickness with reference to the dielectric. An impurity is doped in the first semiconductor substrate to form a high-concentration impurity layer having an impurity concentration corresponding to a predetermined low-concentration impurity layer having a predetermined thickness thereon, thereby constituting a circuit element region. This invention is a method of manufacturing a semiconductor substrate, which improves film thickness precision of each circuit element formation layer for forming a circuit element.

摘要翻译： 本发明的制造方法由于在具有电介质隔离结构的半导体衬底的制造中由于半导体衬底的平坦度差而产生的电路元件形成区域的膜厚不均匀性。 第一半导体衬底和第二半导体衬底的镜面抛光表面相对并且彼此结合以夹住具有预定厚度的电介质，并且从与粘合表面相对的表面研磨第一半导体衬底以具有参考的预定厚度 到电介质。 在第一半导体衬底中掺杂杂质以形成具有对应于其上具有预定厚度的预定低浓度杂质层的杂质浓度的高浓度杂质层，从而构成电路元件区域。 本发明是制造半导体衬底的方法，其改进了用于形成电路元件的每个电路元件形成层的膜厚精度。

公开(公告)号：US5188987A

公开(公告)日：1993-02-23

申请号：US714348

申请日：1991-06-12

申请人： Masanobu Ogino

发明人： Masanobu Ogino

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L23/532 ,  H01L29/08 ,  H01L29/417

CPC分类号： H01L21/76879 ,  H01L21/28525 ,  H01L21/76801 ,  H01L23/53271 ,  H01L29/0847 ,  H01L29/41725 ,  H01L29/41775 ,  H01L2924/0002 ,  Y10S148/017

摘要： A method of manufacturing a semiconductor device comprises the steps of performimg selective vapor growth on a semiconductor substrate, and polishing a surface of an insulative film formed on said semiconductor substrate subsequent to the selective vapor growth step.

摘要翻译： 制造半导体器件的方法包括以下步骤：在半导体衬底上执行选择性气相生长，并且在选择性蒸气生长步骤之后对在所述半导体衬底上形成的绝缘膜的表面进行抛光。

公开(公告)号：US5132770A

公开(公告)日：1992-07-21

申请号：US639734

申请日：1991-01-10

申请人： Masanobu Ogino

发明人： Masanobu Ogino

IPC分类号： H01L21/20 ,  H01L21/322 ,  H01L21/762 ,  H01L21/763

CPC分类号： H01L21/2007 ,  H01L21/3226 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/763 ,  H01L21/76275 ,  H01L21/76286

摘要： A semiconductor device includes a composite semiconductor substrate formed by disposing first and second semiconductor substrates in close contact with each other. At least one dielectric layer is formed in the composite semiconductor substrate. At least one polycrystalline layer is formed adjacent to the dielectric layer.

摘要翻译： 半导体器件包括通过将第一和第二半导体衬底彼此紧密接触而形成的复合半导体衬底。 在复合半导体衬底中形成至少一个电介质层。 在电介质层附近形成至少一个多晶层。

公开(公告)号：US5023696A

公开(公告)日：1991-06-11

申请号：US305652

申请日：1989-02-03

申请人： Masanobu Ogino

发明人： Masanobu Ogino

IPC分类号： H01L29/68 ,  H01L21/18 ,  H01L21/322 ,  H01L21/331 ,  H01L21/332 ,  H01L29/32 ,  H01L29/739 ,  H01L29/74 ,  H01L29/749 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/187 ,  H01L21/3221 ,  H01L29/32 ,  H01L29/66363 ,  H01L29/7395

摘要： A semiconductor element is formed in a composite substrate constructed by fixing two semiconductor substrates in close contact with each other, and crystal defects are formed in that portion of at least one of the two semiconductor substrates which lies near the junction plane of the two semiconductor substrates. The crystal defects act as the center of the recombination of excess minority carriers accumulated in an active region of the semiconductor element.