公开(公告)号：US20140083979A1

公开(公告)日：2014-03-27

申请号：US14116952

申请日：2012-05-10

申请人： Shigeru Tahara ,  Eiichi Nishimura ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Hisashi Okuchi ,  Mitsuhiro Omura

发明人： Shigeru Tahara ,  Eiichi Nishimura ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Hisashi Okuchi ,  Mitsuhiro Omura

IPC分类号： B05D3/14

CPC分类号： B05D3/145 ,  H01L21/02057 ,  H01L21/02063 ,  H01L21/31116

摘要： A deposit removal method for removing deposits deposited on the surface of a pattern formed on a substrate by etching, includes an oxygen plasma treatment process for exposing the substrate to oxygen plasma while heating the substrate and a cycle treatment process for, after the oxygen plasma treatment process, repeating multiple cycles of a first period and a second period. In the first period, the substrate is exposed to a mixture of hydrogen fluoride gas and alcohol gas inside a processing chamber and the partial pressure of the alcohol gas is set to the first partial pressure. In the second period, the partial pressure of the alcohol gas is set to the second partial pressure lower than the first partial pressure by exhausting the inside of the processing chamber.

摘要翻译： 通过蚀刻去除沉积在形成在基板上的图案的表面上的沉积物的沉积物去除方法包括用于在加热基板的同时将基板暴露于氧等离子体的氧等离子体处理工艺和在氧等离子体处理之后的循环处理 处理，重复第一周期和第二周期的多个周期。 在第一阶段中，将基板暴露于处理室内的氟化氢气体和醇气体的混合物，并将醇气体的分压设定为第一分压。 在第二时段，通过排出处理室的内部，将醇气体的分压设定为低于第一分压的第二分压。

公开(公告)号：US08198669B2

公开(公告)日：2012-06-12

申请号：US12615120

申请日：2009-11-09

申请人： Mitsuhiro Omura

发明人： Mitsuhiro Omura

IPC分类号： H01L29/792

CPC分类号： H01L27/11578 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/792

摘要： A semiconductor device includes: a first layer; a second layer; a columnar structural unit; and a side portion. The second layer is provided on a major surface of the first layer. The columnar structural unit is conductive and aligned in the first layer and the second layer to pass through the major surface. The side portion is added to a side wall of the columnar structural unit on the second layer side of the major surface.

摘要翻译： 半导体器件包括：第一层; 第二层; 柱状结构单元; 和侧部。 第二层设置在第一层的主表面上。 柱状结构单元是导电的并且在第一层和第二层中对准以通过主表面。 侧面部分被添加到主表面的第二层侧上的柱状结构单元的侧壁。

公开(公告)号：US20110097888A1

公开(公告)日：2011-04-28

申请号：US12929125

申请日：2011-01-03

申请人： Mitsuhiro Omura ,  Satoshi Nagashima ,  Katsunori Yahashi ,  Jungo Inaba ,  Daina Inoue

发明人： Mitsuhiro Omura ,  Satoshi Nagashima ,  Katsunori Yahashi ,  Jungo Inaba ,  Daina Inoue

IPC分类号： H01L21/28

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A semiconductor memory device comprises a plurality of transistors having a stacked-gate structure. Each transistor includes a semiconductor substrate, a gate insulator formed on the semiconductor substrate, a lower gate formed on the semiconductor substrate with the gate insulator interposed, an intergate insulator formed on the lower gate, and an upper gate formed and silicided on the lower gate with the intergate insulator interposed. A portion of the transistors has an aperture formed through the intergate insulator to connect the lower gate with the upper gate and further includes a block film composed of an insulator and formed smaller than the upper gate and larger than the aperture above the upper gate to cover the aperture.

摘要翻译： 半导体存储器件包括具有层叠栅结构的多个晶体管。 每个晶体管包括半导体衬底，形成在半导体衬底上的栅极绝缘体，形成在半导体衬底上的栅极绝缘体插入的下栅极，形成在下栅极上的栅极绝缘体和在下栅极上形成并硅化的上栅极 间隔绝缘体插入。 晶体管的一部分具有通过栅极间绝缘体形成的孔，以将下栅极与上栅极连接，并且还包括由绝缘体构成并形成为小于上栅极且大于上栅极上方的孔的阻挡膜以覆盖 光圈。

公开(公告)号：US20090305497A1

公开(公告)日：2009-12-10

申请号：US12425789

申请日：2009-04-17

申请人： Mitsuhiro OMURA

发明人： Mitsuhiro OMURA

IPC分类号： H01L21/3205 ,  H01L21/302

CPC分类号： H01L21/0337 ,  H01L21/823437 ,  H01L27/1052

摘要： A method for fabricating a semiconductor device, includes: forming a first film pattern above a substrate; forming a plurality of second film patterns like sandwiching the first film pattern from both sides; forming a third film in such a way that an upper surface of the first film pattern and an upper surface and an exposed side surface of each of the plurality of second film patterns are coated with the third film; removing a portion of the third film until the upper surface of the first film pattern is exposed; removing, by a wet process, the first film pattern exposed after the portion of the third film is removed; and removing a remainder of the third film by a dry process after the first film pattern is removed.

摘要翻译： 一种制造半导体器件的方法，包括：在衬底上形成第一膜图案; 形成多个第二膜图案，从两侧夹着第一膜图案; 以第一膜图案的上表面和多个第二膜图案中的每一个的上表面和暴露侧表面涂覆第三膜的方式形成第三膜; 去除第三膜的一部分直到第一膜图案的上表面露出; 通过湿法除去在除去第三膜的部分之后暴露的第一膜图案; 并且在除去第一膜图案之后通过干法除去第三膜的剩余部分。

公开(公告)号：US07232763B2

公开(公告)日：2007-06-19

申请号：US10959501

申请日：2004-10-07

申请人： Mitsuhiro Omura ,  Makiko Katano ,  Shoko Ito ,  Takaya Matsushita ,  Hisashi Kaneko

发明人： Mitsuhiro Omura ,  Makiko Katano ,  Shoko Ito ,  Takaya Matsushita ,  Hisashi Kaneko

IPC分类号： H01L21/311

CPC分类号： H01L21/76838 ,  H01L21/02046 ,  H01L21/31116

摘要： A method of manufacturing a semiconductor device includes subjecting a semiconductor wafer, which includes a copper layer formed above a semiconductor substrate and covered with an insulating film, to a dry etching using a fluorocarbon gas to partially remove the insulating film, thereby at least partially exposing a surface of the copper layer. The copper layer, the surface of which is at least partially exposed is subjected to a nitrogen plasma treatment. The semiconductor wafer having the nitrogen plasma-treated copper layer is exposed to atmosphere, and then the semiconductor wafer is subjected to a surface treatment.

摘要翻译： 一种制造半导体器件的方法包括使用碳氟化合物气体对包含形成在半导体衬底之上并被绝缘膜形成的铜层的半导体晶片进行干蚀刻，以部分地去除绝缘膜，从而至少部分曝光 铜层的表面。 将其表面至少部分暴露的铜层进行氮等离子体处理。 将具有氮等离子体处理的铜层的半导体晶片暴露于大气中，然后对半导体晶片进行表面处理。

公开(公告)号：US09385137B2

公开(公告)日：2016-07-05

申请号：US13344757

申请日：2012-01-06

申请人： Mitsuhiro Omura

发明人： Mitsuhiro Omura

IPC分类号： H01L21/8239 ,  H01L29/78 ,  H01L27/088 ,  G11C11/34 ,  H01L27/115

CPC分类号： H01L27/11582 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/11568 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body by alternately stacking an insulating film and a conductive film. The method includes forming a trench in the stacked body. The trench extends in one direction and divides the conductive film. The method includes burying a diblock copolymer in the trench. The method includes phase-separating the diblock copolymer into a plurality of first blocks and an insulative second block extending in a stacking direction of the insulating film and the conductive film. The method includes forming a plurality of holes by removing the first blocks. The method includes forming charge accumulation layers on inner surfaces of the holes. And, the method includes forming a plurality of semiconductor pillars extending in the stacking direction by burying a semiconductor material in the holes.

摘要翻译： 根据一个实施例，一种用于制造半导体存储器件的方法包括：通过交替层叠绝缘膜和导电膜来形成层叠体。 该方法包括在层叠体中形成沟槽。 沟槽沿一个方向延伸并分隔导电膜。 该方法包括在沟槽中埋入二嵌段共聚物。 该方法包括将二嵌段共聚物相分离为多个第一嵌段和沿绝缘膜和导电膜的层叠方向延伸的绝缘性第二嵌段。 该方法包括通过去除第一块来形成多个孔。 该方法包括在孔的内表面上形成电荷累积层。 并且，该方法包括通过将半导体材料埋入孔而形成沿堆叠方向延伸的多个半导体柱。

公开(公告)号：US09177781B2

公开(公告)日：2015-11-03

申请号：US13178759

申请日：2011-07-08

申请人： Shigeru Tahara ,  Eiichi Nishimura ,  Fumiko Yamashita ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Hisashi Okuchi ,  Mitsuhiro Omura

发明人： Shigeru Tahara ,  Eiichi Nishimura ,  Fumiko Yamashita ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Hisashi Okuchi ,  Mitsuhiro Omura

IPC分类号： H01L21/02

CPC分类号： H01L21/02071

摘要： A plasma processing method in which performing a plasma etching on metal layers formed on a substrate is conducted to form a pattern having the metal layers in a stacked structure, and then a deposit containing a metal that forms the metal layers and being deposited on a sidewall portion of the pattern is removed, the method includes: forming a protective layer by forming an oxide or chloride of the metal on sidewall portions of the metal layers; removing the deposit by applying a plasma of a gas containing fluorine atoms; and reducing the oxide or chloride of the metal by applying a plasma containing hydrogen after forming the protective layer and removing the deposit.

摘要翻译： 进行对形成在基板上的金属层进行等离子体蚀刻的等离子体处理方法，以形成具有层叠结构的金属层的图案，然后形成含有形成金属层并沉积在侧壁上的金属的沉积物 该方法包括：通过在金属层的侧壁部分上形成金属的氧化物或氯化物形成保护层; 通过施加含有氟原子的气体的等离子体来除去沉积物; 并通过在形成保护层之后施加包含氢的等离子体并除去沉积物来还原金属的氧化物或氯化物。

公开(公告)号：US08524609B2

公开(公告)日：2013-09-03

申请号：US13230118

申请日：2011-09-12

申请人： Satoshi Inada ,  Mitsuhiro Omura ,  Hisataka Hayashi

发明人： Satoshi Inada ,  Mitsuhiro Omura ,  Hisataka Hayashi

IPC分类号： H01L21/302

CPC分类号： H01L21/32139 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  G03F7/038 ,  G03F7/039 ,  G03F7/095 ,  H01L21/0273

摘要： An aspect of the present embodiment, there is provided a method of fabricating a semiconductor device including providing a film to be processed above a semiconductor substrate, providing a negative-type resist and a photo-curable resist in order, pressing a main surface of a template onto the photo-curable resist, the main surface of the template having a concavo-convex pattern with a light shield portion provided on at least a part of a convex portion, irradiating the template with light from a back surface of the template, developing the negative-type resist and the photo-curable resist so as to print the concavo-convex pattern of the template on the negative-type resist and the photo-curable resist, and etching the film to be processed by using the concavo-convex pattern printed on the negative-type resist and the photo-curable resist as a mask.

摘要翻译： 本实施例的一个方面提供一种制造半导体器件的方法，该半导体器件包括在半导体衬底上提供待加工的膜，依次提供负型抗蚀剂和可光固化抗蚀剂， 模板到可光固化抗蚀剂上，模板的主表面具有凹凸图案，具有设置在凸部的至少一部分上的遮光部分，用来自模板背面的光照射模板，显影 负型抗蚀剂和光固化型抗蚀剂，以便在负型抗蚀剂和可光固化抗蚀剂上印刷模板的凹凸图案，并通过使用凹凸图案来蚀刻待处理的薄膜 印刷在负型抗蚀剂和可光固化抗蚀剂上作为掩模。

公开(公告)号：US08513134B2

公开(公告)日：2013-08-20

申请号：US13013380

申请日：2011-01-25

申请人： Mitsuhiro Omura ,  Yumi Ohno ,  Takaya Matsushita ,  Tokuhisa Ohiwa

发明人： Mitsuhiro Omura ,  Yumi Ohno ,  Takaya Matsushita ,  Tokuhisa Ohiwa

IPC分类号： H01L21/302

CPC分类号： H01L21/31116 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/32139

摘要： In a semiconductor device producing method according to one embodiment, an insulating film containing silicon is formed on a semiconductor substrate, a resist is deposited on the insulating film, the resist is patterned into a predetermined pattern, and the insulating film is processed by a dry etching treatment in which gas containing C, F, Br, H, and O is used with the resist having the predetermined pattern as a mask. A deposited film in which C and Br are coupled is produced on the resist.

摘要翻译： 在根据一个实施例的半导体器件制造方法中，在半导体衬底上形成含有硅的绝缘膜，在绝缘膜上沉积抗蚀剂，将抗蚀剂图案化成预定图案，并且通过干燥 蚀刻处理，其中使用含有C，F，Br，H和O的气体，其中具有预定图案的抗蚀剂作为掩模。 在抗蚀剂上制造其中C和Br连接的沉积膜。

公开(公告)号：US20120214308A1

公开(公告)日：2012-08-23

申请号：US13230118

申请日：2011-09-12

申请人： Satoshi INADA ,  Mitsuhiro OMURA ,  Hisataka HAYASHI

发明人： Satoshi INADA ,  Mitsuhiro OMURA ,  Hisataka HAYASHI

IPC分类号： H01L21/308

CPC分类号： H01L21/32139 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  G03F7/038 ,  G03F7/039 ,  G03F7/095 ,  H01L21/0273

摘要： An aspect of the present embodiment, there is provided a method of fabricating a semiconductor device including providing a film to be processed above a semiconductor substrate, providing a negative-type resist and a photo-curable resist in order, pressing a main surface of a template onto the photo-curable resist, the main surface of the template having a concavo-convex pattern with a light shield portion provided on at least a part of a convex portion, irradiating the template with light from a back surface of the template, developing the negative-type resist and the photo-curable resist so as to print the concavo-convex pattern of the template on the negative-type resist and the photo-curable resist, and etching the film to be processed by using the concavo-convex pattern printed on the negative-type resist and the photo-curable resist as a mask.

摘要翻译： 本实施例的一个方面提供一种制造半导体器件的方法，该半导体器件包括在半导体衬底上提供待加工的膜，依次提供负型抗蚀剂和可光固化抗蚀剂， 模板到可光固化抗蚀剂上，模板的主表面具有凹凸图案，具有设置在凸部的至少一部分上的遮光部分，用来自模板背面的光照射模板，显影 负型抗蚀剂和光固化型抗蚀剂，以便在负型抗蚀剂和可光固化抗蚀剂上印刷模板的凹凸图案，并通过使用凹凸图案来蚀刻待处理的薄膜 印刷在负型抗蚀剂和可光固化抗蚀剂上作为掩模。