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    THROUGH WAFER VIAS WITH DISHING CORRECTION METHODS
    4.
    发明申请
    THROUGH WAFER VIAS WITH DISHING CORRECTION METHODS 有权
    通过具有循环校正方法的WAVER VIAS

    公开(公告)号：US20120137515A1

    公开(公告)日：2012-06-07

    申请号：US13369414

    申请日：2012-02-09

    申请人： Peter J. Lindgren ,  Edmund J. Sprogis ,  Anthony K. Stamper

    发明人： Peter J. Lindgren ,  Edmund J. Sprogis ,  Anthony K. Stamper

    IPC分类号： H01K3/10

    CPC分类号： H01L21/76898 ,  H01L21/76838 ,  H01L21/7684 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods of forming through wafer vias (TWVs) and standard contacts in two separate processes to prevent copper first metal layer puddling and shorts are presented. In one embodiment, a method may include forming a TWV into a substrate and a first dielectric layer over the substrate; forming a second dielectric layer over the substrate and the TWV; forming, through the second dielectric layer, at least one contact to the TWV and at least one contact to other structures over the substrate; and forming a first metal wiring layer over the second dielectric layer, the first metal wiring layer contacting at least one of the contacts.

    摘要翻译： 提出了通过晶片通孔（TWV）和标准触点在两个单独的工艺中形成以防止铜第一金属层挤压和短路的方法。 在一个实施例中，一种方法可以包括将TWV形成到衬底上并且在衬底上形成第一介电层; 在所述衬底和所述TWV上形成第二电介质层; 通过所述第二电介质层形成至少一个接触到所述TWV和与所述衬底上的其它结构的至少一个接触; 以及在所述第二电介质层上形成第一金属布线层，所述第一金属布线层与所述触点中的至少一个接触。

    Through wafer vias with dishing correction methods
    5.
    发明授权
    Through wafer vias with dishing correction methods 有权
    通过具有凹陷校正方法的晶片通孔

    公开(公告)号：US08166651B2

    公开(公告)日：2012-05-01

    申请号：US12181359

    申请日：2008-07-29

    申请人： Peter J. Lindgren ,  Edmund J. Sprogis ,  Anthony K. Stamper

    发明人： Peter J. Lindgren ,  Edmund J. Sprogis ,  Anthony K. Stamper

    IPC分类号： H01K3/10 ,  H05K3/02 ,  H05K3/10 ,  H01L29/40

    CPC分类号： H01L21/76898 ,  H01L21/76838 ,  H01L21/7684 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a through wafer via including forming the through wafer via (TWV) into a substrate and through a first dielectric layer over the substrate; planarizing the first dielectric layer using a chemical mechanical polish before forming a second dielectric layer; forming the second dielectric layer over the substrate and the TWV; forming at least one first contact through the second dielectric layer and to the TWV; forming at least one second contact through the second dielectric layer and the first dielectric layer directly and electrically connected to another structure upon the substrate; and forming a first metal wiring layer directly over the second dielectric layer, the first metal wiring layer directly and physically contacting the at least one first contact and the at least one second contact.

    摘要翻译： 一种形成贯穿晶片通孔的方法，包括通过（TWV）形成贯穿晶片进入衬底并穿过衬底上的第一介电层; 在形成第二电介质层之前，使用化学机械抛光平面化第一介电层; 在所述衬底和所述TWV上形成所述第二电介质层; 通过所述第二介电层和所述TWV形成至少一个第一接触; 通过所述第二电介质层和所述第一介电层形成至少一个第二接触，并且在所述衬底上直接电连接到另一结构; 以及直接在所述第二电介质层上方形成第一金属布线层，所述第一金属布线层直接地和物理地接触所述至少一个第一触点和所述至少一个第二触点。

    Optimal tungsten through wafer via and process of fabricating same
    9.
    发明授权
    Optimal tungsten through wafer via and process of fabricating same 失效
    最佳钨通晶圆通孔及其制造方法

    公开(公告)号：US07741226B2

    公开(公告)日：2010-06-22

    申请号：US12115568

    申请日：2008-05-06

    申请人： Paul S. Andry ,  Edward C. Cooney, III ,  Peter J. Lindgren ,  Dorreen J. Ossenkop ,  Cornelia K. Tsang

    发明人： Paul S. Andry ,  Edward C. Cooney, III ,  Peter J. Lindgren ,  Dorreen J. Ossenkop ,  Cornelia K. Tsang

    IPC分类号： H01L21/311

    CPC分类号： H01L23/485 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of optimally filling a through via within a through wafer via structure with a conductive metal such as, for example, W is provided. The inventive method includes providing a structure including a substrate having at least one aperture at least partially formed through the substrate. The at least one aperture of the structure has an aspect ratio of at least 20:1 or greater. Next, a refractory metal-containing liner such as, for example, Ti/TiN, is formed on bare sidewalls of the substrate within the at least one aperture. A conductive metal seed layer is then formed on the refractory metal-containing liner. In the invention, the conductive metal seed layer formed is enriched with silicon and has a grain size of about 5 nm or less. Next, a conductive metal nucleation layer is formed on the conductive metal seed layer. The conductive metal nucleation layer is also enriched with silicon and has a grain size of about 20 nm or greater. Next, a conductive metal is formed on the conductive metal nucleation layer. After performing the above processing steps, a backside planarization process is performed to convert the at least one aperture into at least one through via that is now optimally filled with a conductive metal.

    摘要翻译： 提供了一种在具有例如W的导电金属的直通晶片通孔结构内最佳地填充通孔的方法。 本发明的方法包括提供一种结构，其包括具有至少一个通过该基底部分形成的孔的基底。 该结构的至少一个孔具有至少20:1或更大的纵横比。 接下来，在至少一个孔内的衬底的裸露的侧壁上形成诸如Ti / TiN的含难熔金属衬里。 然后在含难熔金属的衬垫上形成导电金属种子层。 在本发明中，所形成的导电金属晶种层富含硅，其晶粒尺寸为约5nm或更小。 接着，在导电性金属种子层上形成导电性金属成核层。 导电金属成核层也富含硅，其粒径约为20nm或更大。 接着，在导电性金属成核层上形成导电性金属。 在执行上述处理步骤之后，执行背面平面化处理以将至少一个孔转换成现在被最佳地填充有导电金属的至少一个通孔。