Vortex chamber lids for atomic layer deposition
    1.
    发明授权
    Vortex chamber lids for atomic layer deposition 有权
    涡流室盖用于原子层沉积

    公开(公告)号:US07780789B2

    公开(公告)日:2010-08-24

    申请号:US11923589

    申请日:2007-10-24

    Abstract: Embodiments of the invention relate to apparatuses and methods for depositing materials on substrates during atomic layer deposition processes. In one embodiment, a chamber for processing substrates is provided which includes a chamber lid assembly containing an expanding channel extending along a central axis at a central portion of the chamber lid assembly and a tapered bottom surface extending from the expanding channel to a peripheral portion of the chamber lid assembly. The tapered bottom surface may be shaped and sized to substantially cover the substrate receiving surface. The chamber lid assembly further contains a conduit coupled to a gas passageway, another conduit coupled to another gas passageway, and both gas passageways circumvent the expanding channel. Each of the passageways has a plurality of inlets extending into the expanding channel and the inlets are positioned to provide a circular gas flow through the expanding channel.

    Abstract translation: 本发明的实施例涉及在原子层沉积工艺期间在衬底上沉积材料的装置和方法。 在一个实施例中,提供了一种用于处理衬底的腔室,其包括腔室盖组件,该室盖组件包含沿腔室盖组件的中心部分处的中心轴线延伸的扩张通道,以及从膨胀通道延伸到周边部分的锥形底面 室盖组件。 锥形底表面的形状和尺寸可以基本上覆盖基板接收表面。 腔室盖组件还包括连接到气体通道的导管,另一导管与另一个气体通道连接,两个气体通道绕过扩张通道。 每个通道具有延伸到扩张通道中的多个入口,并且入口被定位成提供通过膨胀通道的圆形气流。

    VORTEX CHAMBER LIDS FOR ATOMIC LAYER DEPOSITION
    2.
    发明申请
    VORTEX CHAMBER LIDS FOR ATOMIC LAYER DEPOSITION 审中-公开
    用于原子层沉积的VORTEX CHAMBER LIDS

    公开(公告)号:US20080102208A1

    公开(公告)日:2008-05-01

    申请号:US11923583

    申请日:2007-10-24

    Abstract: Embodiments of the invention relate to apparatuses and methods for depositing materials on substrates during atomic layer deposition processes. In one embodiment, a chamber for processing substrates is provided which includes a chamber lid assembly containing a centrally positioned gas dispersing channel, wherein a converging portion of the gas dispersing channel tapers towards a central axis of the gas dispersing channel and a diverging portion of the gas dispersing channel tapers away from the central axis. The chamber lid assembly further contains a tapered bottom surface extending from the diverging portion of the gas dispersing channel to a peripheral portion of the chamber lid assembly, wherein the tapered bottom surface is shaped and sized to substantially cover the substrate and two conduits are coupled to gas inlets within the converging portion of the gas dispersing channel and positioned to provide a circular gas flow through the gas dispersing channel.

    Abstract translation: 本发明的实施例涉及在原子层沉积工艺期间在衬底上沉积材料的装置和方法。 在一个实施例中,提供了一种用于处理衬底的室,其包括容纳中心定位的气体分散通道的室盖组件,其中气体分散通道的会聚部分朝向气体分散通道的中心轴逐渐变细, 气体分散通道远离中心轴逐渐变细。 室盖组件还包括从气体分散通道的发散部分延伸到室盖组件的周边部分的锥形底表面,其中锥形底表面的形状和尺寸基本上覆盖衬底,并且两个管道耦合到 在气体分散通道的会聚部分内的气体入口并且定位成提供通过气体分散通道的圆形气体流。

    Increased deposition efficiency and higher chamber conductance with source power increase in an inductively coupled plasma (ICP) chamber
    3.
    发明授权
    Increased deposition efficiency and higher chamber conductance with source power increase in an inductively coupled plasma (ICP) chamber 有权
    在电感耦合等离子体(ICP)室中,增加了沉积效率和较高的室电导率,并提高了源功率的增加

    公开(公告)号:US09023227B2

    公开(公告)日:2015-05-05

    申请号:US13480967

    申请日:2012-05-25

    CPC classification number: H01L21/30655 H01L21/76898

    Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).

    Abstract translation: 本文描述的实施例通常涉及衬底处理系统和相关方法,例如蚀刻/沉积方法。 该方法包括:(A)在蚀刻反应器中设置在衬底上的第一层上沉积保护层,其中在沉积保护层的同时施加4500瓦特或更大的等离子体源功率,(B)蚀刻保护层中的保护层 蚀刻反应器,其中施加4500瓦或更大的等离子体源功率,同时蚀刻保护层,和(C)蚀刻蚀刻反应器中的第一层,其中施加4500瓦特或更大的等离子体源功率,同时蚀刻第一 层,其中沉积保护层(A)的时间包括小于用于沉积保护层(A)的总循环时间的30%,蚀刻保护层(B)和蚀刻第一层( C)。

    INCREASED DEPOSITION EFFICIENCY AND HIGHER CHAMBER CONDUCTANCE WITH SOURCE POWER INCREASE IN AN INDUCTIVELY COUPLED PLASMA (ICP) CHAMBER
    4.
    发明申请
    INCREASED DEPOSITION EFFICIENCY AND HIGHER CHAMBER CONDUCTANCE WITH SOURCE POWER INCREASE IN AN INDUCTIVELY COUPLED PLASMA (ICP) CHAMBER 有权
    在电感耦合等离子体(ICP)室中,电源功率增加提高了沉积效率和更高的室电导率

    公开(公告)号:US20130005152A1

    公开(公告)日:2013-01-03

    申请号:US13480967

    申请日:2012-05-25

    CPC classification number: H01L21/30655 H01L21/76898

    Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).

    Abstract translation: 本文描述的实施例通常涉及衬底处理系统和相关方法,例如蚀刻/沉积方法。 该方法包括:(A)在蚀刻反应器中设置在衬底上的第一层上沉积保护层,其中在沉积保护层的同时施加4500瓦特或更大的等离子体源功率,(B)蚀刻保护层中的保护层 蚀刻反应器,其中施加4500瓦或更大的等离子体源功率,同时蚀刻保护层,和(C)蚀刻蚀刻反应器中的第一层,其中施加4500瓦特或更大的等离子体源功率,同时蚀刻第一 层,其中沉积保护层(A)的时间包括小于用于沉积保护层(A)的总循环时间的30%,蚀刻保护层(B)和蚀刻第一层( C)。

    Non-contact process kit
    5.
    发明授权
    Non-contact process kit 有权
    非接触式工艺套件

    公开(公告)号:US08221602B2

    公开(公告)日:2012-07-17

    申请号:US11954270

    申请日:2007-12-12

    CPC classification number: C23C14/564 H01L21/67069 H01L21/68735

    Abstract: A process kit for use in a physical vapor deposition (PVD) chamber, along with a PVD chamber having a non-contact process kit are provided. In one embodiment, a process kit includes a generally cylindrical shield that has a substantially flat cylindrical body, at least one elongated cylindrical ring extending downward from the body, and a mounting portion extending upwards from an upper surface of the body. In another embodiment, a process kit includes a generally cylindrical deposition ring. The deposition ring includes a substantially flat cylindrical body, at least one downwardly extending u-channel coupled to an outer portion of the body, an inner wall extending upward from an upper surface of an inner region of the body, and a substrate support ledge extending radially inward from the inner wall.

    Abstract translation: 提供了一种用于物理气相沉积(PVD)室的工艺试剂盒,以及具有非接触式工艺试剂盒的PVD室。 在一个实施例中,处理套件包括大致圆柱形的屏蔽件,其具有基本平坦的圆柱形主体,从主体向下延伸的至少一个细长圆柱形环以及从主体的上表面向上延伸的安装部分。 在另一个实施例中,处理套件包括大致圆柱形的沉积环。 沉积环包括基本上平坦的圆柱体,至少一个向下延伸的u通道,其耦合到主体的外部部分,从主体的内部区域的上表面向上延伸的内壁,以及基板支撑凸缘 从内壁径向向内。

    NON-CONTACT PROCESS KIT
    6.
    发明申请
    NON-CONTACT PROCESS KIT 有权
    非接触式工艺包

    公开(公告)号:US20080141942A1

    公开(公告)日:2008-06-19

    申请号:US11954270

    申请日:2007-12-12

    CPC classification number: C23C14/564 H01L21/67069 H01L21/68735

    Abstract: A process kit for use in a physical vapor deposition (PVD) chamber, along with a PVD chamber having a non-contact process kit are provided. In one embodiment, a process kit includes a generally cylindrical shield that has a substantially flat cylindrical body, at least one elongated cylindrical ring extending downward from the body, and a mounting portion extending upwards from an upper surface of the body. In another embodiment, a process kit includes a generally cylindrical deposition ring. The deposition ring includes a substantially flat cylindrical body, at least one downwardly extending u-channel coupled to an outer portion of the body, an inner wall extending upward from an upper surface of an inner region of the body, and a substrate support ledge extending radially inward from the inner wall.

    Abstract translation: 提供了一种用于物理气相沉积(PVD)室的工艺试剂盒,以及具有非接触式工艺试剂盒的PVD室。 在一个实施例中,处理套件包括大致圆柱形的屏蔽件,其具有基本平坦的圆柱形主体,从主体向下延伸的至少一个细长圆柱形环以及从主体的上表面向上延伸的安装部分。 在另一个实施例中,处理套件包括大致圆柱形的沉积环。 沉积环包括基本上平坦的圆柱体,至少一个向下延伸的u通道,其耦合到主体的外部部分,从主体的内部区域的上表面向上延伸的内壁,以及基板支撑凸缘 从内壁径向向内。

    Methods for etching through-silicon vias with tunable profile angles
    7.
    发明授权
    Methods for etching through-silicon vias with tunable profile angles 有权
    用于蚀刻具有可调剖面角度的硅通孔的方法

    公开(公告)号:US08987140B2

    公开(公告)日:2015-03-24

    申请号:US13434291

    申请日:2012-03-29

    CPC classification number: H01L21/30655 H01L21/76898

    Abstract: The present disclosure provides methods for etching through-silicon vias (TSVs) in a substrate. The method employs a cyclic polymer passivation layer deposition, depassivation process and plasma etching process. By alternating the duration performed in the plasma etching process and the polymer passivation deposition process during the TSVs formation process, a good sidewall profile and via depth control may be obtained.

    Abstract translation: 本公开提供了蚀刻衬底中的硅通孔(TSV)的方法。 该方法采用循环聚合物钝化层沉积,去钝化处理和等离子体蚀刻工艺。 通过交替在等离子体蚀刻工艺中进行的持续时间和在TSV形成过程期间的聚合物钝化沉积工艺,可以获得良好的侧壁轮廓和通孔深度控制。

    METHODS FOR ETCHING THROUGH-SILICON VIAS WITH TUNABLE PROFILE ANGLES
    8.
    发明申请
    METHODS FOR ETCHING THROUGH-SILICON VIAS WITH TUNABLE PROFILE ANGLES 有权
    通过硅橡胶角度蚀刻硅橡胶的方法

    公开(公告)号:US20120270404A1

    公开(公告)日:2012-10-25

    申请号:US13434291

    申请日:2012-03-29

    CPC classification number: H01L21/30655 H01L21/76898

    Abstract: The present disclosure provides methods for etching through-silicon vias (TSVs) in a substrate. The method employs a cyclic polymer passivation layer deposition, depassivation process and plasma etching process. By alternating the duration performed in the plasma etching process and the polymer passivation deposition process during the TSVs formation process, a good sidewall profile and via depth control may be obtained.

    Abstract translation: 本公开提供了蚀刻衬底中的硅通孔(TSV)的方法。 该方法采用循环聚合物钝化层沉积,去钝化处理和等离子体蚀刻工艺。 通过交替在等离子体蚀刻工艺中进行的持续时间和在TSV形成过程期间的聚合物钝化沉积工艺,可以获得良好的侧壁轮廓和通孔深度控制。

    VORTEX CHAMBER LIDS FOR ATOMIC LAYER DEPOSITION
    9.
    发明申请
    VORTEX CHAMBER LIDS FOR ATOMIC LAYER DEPOSITION 有权
    用于原子层沉积的VORTEX CHAMBER LIDS

    公开(公告)号:US20080107809A1

    公开(公告)日:2008-05-08

    申请号:US11923589

    申请日:2007-10-24

    Abstract: Embodiments of the invention relate to apparatuses and methods for depositing materials on substrates during atomic layer deposition processes. In one embodiment, a chamber for processing substrates is provided which includes a chamber lid assembly containing an expanding channel extending along a central axis at a central portion of the chamber lid assembly and a tapered bottom surface extending from the expanding channel to a peripheral portion of the chamber lid assembly. The tapered bottom surface may be shaped and sized to substantially cover the substrate receiving surface. The chamber lid assembly further contains a conduit coupled to a gas passageway, another conduit coupled to another gas passageway, and both gas passageways circumvent the expanding channel. Each of the passageways has a plurality of inlets extending into the expanding channel and the inlets are positioned to provide a circular gas flow through the expanding channel.

    Abstract translation: 本发明的实施例涉及在原子层沉积工艺期间在衬底上沉积材料的装置和方法。 在一个实施例中,提供了一种用于处理衬底的腔室,其包括腔室盖组件,该室盖组件包含沿腔室盖组件的中心部分处的中心轴线延伸的扩张通道,以及从膨胀通道延伸到周边部分的锥形底面 室盖组件。 锥形底表面的形状和尺寸可以基本上覆盖基板接收表面。 腔室盖组件还包括连接到气体通道的导管,另一导管与另一个气体通道连接,两个气体通道绕过扩张通道。 每个通道具有延伸到扩张通道中的多个入口,并且入口被定位成提供通过膨胀通道的圆形气流。

    In situ plasma clean for removal of residue from pedestal surface without breaking vacuum
    10.
    发明授权
    In situ plasma clean for removal of residue from pedestal surface without breaking vacuum 有权
    原位等离子体清洁,用于从基座表面去除残留物,而不会破坏真空

    公开(公告)号:US08900471B2

    公开(公告)日:2014-12-02

    申请号:US12706484

    申请日:2010-02-16

    Abstract: Methods and apparatus for in-situ plasma cleaning of a deposition chamber are provided. In one embodiment a method for plasma cleaning a deposition chamber without breaking vacuum is provided. The method comprises positioning a substrate on a susceptor disposed in the chamber and circumscribed by an electrically floating deposition ring, depositing a metal film on the substrate and the deposition ring in the chamber, grounding the metal film deposited on the deposition ring without breaking vacuum, and removing contaminants from the chamber with a plasma formed in the chamber without resputtering the metal film on the grounded deposition ring and without breaking vacuum.

    Abstract translation: 提供了用于沉积室的原位等离子体清洗的方法和装置。 在一个实施例中,提供了一种用于在不破坏真空的情况下等离子体清洁沉积室的方法。 该方法包括将基板定位在设置在室中的基座上并由电浮动沉积环外接,在基板上沉积金属膜和在室中沉积环,使沉积在沉积环上的金属膜接地而不破坏真空, 以及在腔室中形成的等离子体从室中除去污染物,而不对接地的沉积环上的金属膜进行再溅射,而不破坏真空。

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