-
公开(公告)号：US20090236741A1
公开(公告)日：2009-09-24
申请号：US12262682
申请日：2008-10-31
申请人： Hsiang-Ming HUANG , An-Hong Liu , Yi-Chang Lee , Hao-Yin Tsai , Shu-Ching Ho
发明人： Hsiang-Ming HUANG , An-Hong Liu , Yi-Chang Lee , Hao-Yin Tsai , Shu-Ching Ho
IPC分类号： H01L23/488 , H01L21/44
CPC分类号： H01L24/11 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05572 , H01L2224/05644 , H01L2224/13099 , H01L2224/16 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/00014
摘要： A conductive structure of a chip and a method for manufacturing the conductive structure are provided. An under bump metal (UBM) is formed on the redistribution layer (RDL) by performing an electroless plating process. Subsequently, the solder bump is formed on the under bump metal for electrical connection. Thus, the photomask can be economized and the cost of manufacturing can be reduced.
摘要翻译： 提供了芯片的导电结构和制造导电结构的方法。 通过进行化学镀处理，在再分布层（RDL）上形成凹凸金属（UBM）。 随后，焊料凸块形成在凸块下金属上用于电连接。 因此，可以节省光掩模并且可以降低制造成本。
-
公开(公告)号：US20080090941A1
公开(公告)日：2008-04-17
申请号：US11794101
申请日：2005-12-27
申请人： Jiin-Huey Lin , Chien-Ping Ju , Shu-Ching Ho
发明人： Jiin-Huey Lin , Chien-Ping Ju , Shu-Ching Ho
IPC分类号： F16D69/02
CPC分类号： B29C43/006 , B29L2031/16 , C04B35/76 , C04B35/806 , C04B35/83 , C04B2235/3208 , C04B2235/3231 , C04B2235/3454 , C04B2235/422 , C04B2235/425 , C04B2235/444 , C04B2235/445 , C04B2235/448 , C04B2235/48 , C04B2235/5208 , F16D69/02
摘要： A process for preparing a semi-metallic friction material having improved thermal resistance includes preparing a semi-metallic composition containing (i) at least one carbonizable thermosetting resin as a binder; and (ii) at least one transition metal powder having a melting point higher than 1000° C. and density less than 10 g/ml; thermoforming said semi-metallic composition by curing said thermosetting resin; and heat-treating the resulting thermoformed product at a temperature of about 100 to 1000° C., preferably 200-600° C., to semi-carbonize said cured thermosetting resin.
摘要翻译： 制备具有改善的耐热性的半金属摩擦材料的方法包括制备含有（i）至少一种可碳化热固性树脂作为粘合剂的半金属组合物; 和（ii）至少一种熔点高于1000℃，密度小于10g / ml的过渡金属粉末; 通过固化所述热固性树脂热成型所述半金属组合物; 并在约100至1000℃，优选200-600℃的温度下对所得热成型产物进行热处理，以将所述固化的热固性树脂半碳化。
-
公开(公告)号：US07973310B2
公开(公告)日：2011-07-05
申请号：US12501100
申请日：2009-07-10
申请人： David Wei Wang , An-Hong Liu , Hao-Yin Tsai , Hsiang-Ming Huang , Yi-Chang Lee , Shu-Ching Ho
发明人： David Wei Wang , An-Hong Liu , Hao-Yin Tsai , Hsiang-Ming Huang , Yi-Chang Lee , Shu-Ching Ho
IPC分类号： H01L23/58
CPC分类号： H01L23/481 , H01L24/48 , H01L25/0657 , H01L25/50 , H01L2224/05554 , H01L2224/16145 , H01L2224/32145 , H01L2224/48091 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/06596 , H01L2924/00014 , H01L2924/01046 , H01L2924/01079 , H01L2924/01087 , H01L2924/07802 , H01L2924/09701 , H01L2924/14 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Semiconductor package structures and methods for manufacturing the same are provided. The semiconductor package structure comprises a substrate unit and a first chip stack structure. The substrate unit comprises a circuit structure having test pads. The first chip stack structure comprises chips, and each of the chips has a plurality of through silicon plugs. The through silicon plugs of two adjacent chips are electrically connected and further electrically connected to the test pads of the substrate unit for electrical testing. Another semiconductor package structure provided by the present invention comprises a first semiconductor chip and a second semiconductor chip. Each of the semiconductor chips has test pads for electrical testing and a plurality of through silicon plugs connecting to the test pads. The second semiconductor chip is mounted on the first semiconductor chip, and a portion of the through silicon plugs of two semiconductor chips are electrically connected with each other.
摘要翻译： 提供半导体封装结构及其制造方法。 半导体封装结构包括衬底单元和第一芯片堆叠结构。 衬底单元包括具有测试焊盘的电路结构。 第一芯片堆叠结构包括芯片，并且每个芯片具有多个通硅插头。 两个相邻芯片的贯穿硅插头电连接并且进一步电连接到用于电测试的衬底单元的测试焊盘。 由本发明提供的另一半导体封装结构包括第一半导体芯片和第二半导体芯片。 每个半导体芯片具有用于电测试的测试焊盘和连接到测试焊盘的多个穿硅插头。 第二半导体芯片安装在第一半导体芯片上，并且两个半导体芯片的贯穿硅插头的一部分彼此电连接。
-
公开(公告)号：US20080025906A1
公开(公告)日：2008-01-31
申请号：US11794102
申请日：2005-12-27
CPC分类号： B82Y30/00 , C04B35/522 , C04B35/6267 , C04B35/6269 , C04B35/83 , C04B2235/424 , C04B2235/425 , C04B2235/5252 , C04B2235/5256 , C04B2235/526 , C04B2235/5268 , C04B2235/5436 , C04B2235/5454 , C04B2235/616 , C04B2235/6562 , C04B2235/77 , C04B2235/96 , F16D69/023 , Y10S977/742
摘要： A method for preparing a carbon/carbon (C/C) composite comprising carbonizing a carbon fiber-reinforced polymer matrix composite precursor by heating the precursor in an inert atmosphere with a heating rate greater than 20° C./min up to 1500° C./min.
摘要翻译： 一种制备碳/碳（C / C）复合材料的方法，包括通过在惰性气氛中以大于20℃/ min至高达1500℃的加热速率加热前体，碳化碳纤维增强聚合物基质复合材料前体 ./min。
-
公开(公告)号：US07871592B2
公开(公告)日：2011-01-18
申请号：US11794102
申请日：2005-12-27
CPC分类号： B82Y30/00 , C04B35/522 , C04B35/6267 , C04B35/6269 , C04B35/83 , C04B2235/424 , C04B2235/425 , C04B2235/5252 , C04B2235/5256 , C04B2235/526 , C04B2235/5268 , C04B2235/5436 , C04B2235/5454 , C04B2235/616 , C04B2235/6562 , C04B2235/77 , C04B2235/96 , F16D69/023 , Y10S977/742
摘要： A method for preparing a carbon/carbon (C/C) composite comprising carbonizing a carbon fiber-reinforced polymer matrix composite precursor by heating the precursor in an inert atmosphere with a heating rate greater than 20° C./min up to 1500° C./min.
摘要翻译： 一种制备碳/碳（C / C）复合材料的方法，包括通过在惰性气氛中以大于20℃/ min至高达1500℃的加热速率加热前体，碳化碳纤维增强聚合物基质复合材料前体 ./min。
-
公开(公告)号：US20080124828A1
公开(公告)日：2008-05-29
申请号：US11601753
申请日：2006-11-20
申请人： Hsiang-Ming Huang , An-Hong Liu , Shu-Ching Ho , Yi-Chang Lee , Yeong-Jyh Lin
发明人： Hsiang-Ming Huang , An-Hong Liu , Shu-Ching Ho , Yi-Chang Lee , Yeong-Jyh Lin
IPC分类号： H01L21/56
CPC分类号： G01R1/06744 , G01R3/00
摘要： MEMS processes for fabrication of a MEMS alloy probe are revealed. Multiple layers of the MEMS alloy probe are formed on the substrate in sequences as a first surface layer, a first conductive layer, a core layer, a second conductive layer, and a second surface layer where the width of the first conductive layer is smaller than the one of first surface layer so that all the exposed edges of the first surface layer are not covered by the first conductive layer. The second surface layer is extended from the sidewalls of the core layer to the exposed edges of the first surface layer to encapsulate the core layer, the first conductive layer, and the second conductive layer. The MEMS alloy probe fabricated by the MEMS processes can eliminate the issue of oxidation.
摘要翻译： 揭示了用于制造MEMS合金探针的MEMS工艺。 多层MEMS合金探针以顺序形成在基板上，作为第一表面层，第一导电层，芯层，第二导电层和第二表面层，其中第一导电层的宽度小于 第一表面层中的一个，使得第一表面层的所有暴露边缘都不被第一导电层覆盖。 第二表面层从芯层的侧壁延伸到第一表面层的暴露边缘，以封装芯层，第一导电层和第二导电层。 通过MEMS工艺制造的MEMS合金探针可以消除氧化问题。
-
公开(公告)号：US20100007001A1
公开(公告)日：2010-01-14
申请号：US12501100
申请日：2009-07-10
申请人： David Wei Wang , An-Hong Liu , Hao-Yin Tsai , Hsiang-Ming Huang , Yi-Chang Lee , Shu-Ching Ho
发明人： David Wei Wang , An-Hong Liu , Hao-Yin Tsai , Hsiang-Ming Huang , Yi-Chang Lee , Shu-Ching Ho
IPC分类号： H01L23/52 , H01L23/538 , H01L21/98 , H01L21/768
CPC分类号： H01L23/481 , H01L24/48 , H01L25/0657 , H01L25/50 , H01L2224/05554 , H01L2224/16145 , H01L2224/32145 , H01L2224/48091 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/06596 , H01L2924/00014 , H01L2924/01046 , H01L2924/01079 , H01L2924/01087 , H01L2924/07802 , H01L2924/09701 , H01L2924/14 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Semiconductor package structures and methods for manufacturing the same are provided. The semiconductor package structure comprises a substrate unit and a first chip stack structure. The substrate unit comprises a circuit structure having test pads. The first chip stack structure comprises chips, and each of the chips has a plurality of through silicon plugs. The through silicon plugs of two adjacent chips are electrically connected and further electrically connected to the test pads of the substrate unit for electrical testing. Another semiconductor package structure provided by the present invention comprises a first semiconductor chip and a second semiconductor chip. Each of the semiconductor chips has test pads for electrical testing and a plurality of through silicon plugs connecting to the test pads. The second semiconductor chip is mounted on the first semiconductor chip, and a portion of the through silicon plugs of two semiconductor chips are electrically connected with each other.
摘要翻译： 提供半导体封装结构及其制造方法。 半导体封装结构包括衬底单元和第一芯片堆叠结构。 衬底单元包括具有测试焊盘的电路结构。 第一芯片堆叠结构包括芯片，并且每个芯片具有多个通硅插头。 两个相邻芯片的贯穿硅插头电连接并且进一步电连接到用于电测试的衬底单元的测试焊盘。 由本发明提供的另一半导体封装结构包括第一半导体芯片和第二半导体芯片。 每个半导体芯片具有用于电测试的测试焊盘和连接到测试焊盘的多个穿硅插头。 第二半导体芯片安装在第一半导体芯片上，并且两个半导体芯片的贯穿硅插头的一部分彼此电连接。
-
公开(公告)号：US20090283905A1
公开(公告)日：2009-11-19
申请号：US12262766
申请日：2008-10-31
申请人： Hsiang-Ming HUANG , An-Hong Liu , Yi-Chang Lee , Hao-Yin Tsai , Shu-Ching Ho
发明人： Hsiang-Ming HUANG , An-Hong Liu , Yi-Chang Lee , Hao-Yin Tsai , Shu-Ching Ho
IPC分类号： H01L23/488
CPC分类号： H01L24/10 , H01L24/13 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05026 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05572 , H01L2224/05644 , H01L2224/05655 , H01L2224/13 , H01L2224/13099 , H01L2224/16 , H01L2924/01005 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/3011 , H01L2924/00 , H01L2924/00014
摘要： A conductive structure of a chip is provided. The conductive structure comprises a ground layer, a dielectric layer, a redistribution layer, an under bump metal and a solder bump. The ground layer electrically connects to the ground pad of the chip, while the dielectric layer overlays the ground layer. Thus, the conductive layer can result in impedance matching, and the packaged chip is adapted to transmit a high frequency signal.
摘要翻译： 提供了芯片的导电结构。 导电结构包括接地层，电介质层，再分配层，凸块下金属和焊料凸块。 接地层电连接到芯片的接地焊盘，而电介质层覆盖接地层。 因此，导电层可以导致阻抗匹配，并且封装的芯片适于传输高频信号。
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.021 秒)
