公开(公告)号：US20210318549A1

公开(公告)日：2021-10-14

申请号：US16894062

申请日：2020-06-05

申请人： Qingming Zhang ,  Jinghui Li ,  Shouli Tang ,  Xiaodong Huang ,  Wen Lu ,  Yaozhong Lin

发明人： Qingming Zhang ,  Jinghui Li ,  Shouli Tang ,  Xiaodong Huang ,  Wen Lu ,  Yaozhong Lin

IPC分类号： G02B27/10 ,  G02B27/14

摘要： Embodiment of present invention provide a micro-optics module. The module includes a glass body of pentagon shape having five side surfaces including an upper side surface, a left side and a right side surface next to the upper side surface, a lower side surface next to the left side surface, and a 5th side surface next to and between the lower side surface and the right side surface. The glass body is adapted to, upon incident of a first optical signal at the left side surface, cause the first optical signal to propagate toward and exit the glass body at the right side surface and, upon incident of a second optical signal at the right side surface, cause the second optical signal to reflect back at the left side surface; reflect back at the 5th side surface; and finally exit the glass body at the upper side surface.

公开(公告)号：US09295180B2

公开(公告)日：2016-03-22

申请号：US13614081

申请日：2012-09-13

申请人： Chao-Wen Lu

发明人： Chao-Wen Lu

IPC分类号： F04D29/42 ,  H01L23/467 ,  H05K7/20 ,  G06F1/20 ,  H01L23/427

CPC分类号： H05K7/20172 ,  G06F1/203 ,  H01L23/427 ,  H01L23/467 ,  H01L2924/0002 ,  H01L2924/00

摘要： A centrifugal fan is provided. The centrifugal fan includes an impeller and a housing. The impeller has an impeller diameter. The housing includes an upper plate, a lower plate and a side wall, wherein the upper plate axially corresponds to the lower plate, a side wall is formed between the upper plate and the lower plate, an axial inlet is formed on the upper plate, a lateral outlet is formed on the side wall, the impeller is disposed in the housing and corresponds to the inlet, and a flow path communicates the inlet to the outlet, wherein a greatest width of the inlet is greater than or equal to the impeller diameter.

摘要翻译： 提供离心风机。 离心风扇包括叶轮和壳体。 叶轮具有叶轮直径。 壳体包括上板，下板和侧壁，其中上板轴向对应于下板，在上板和下板之间形成侧壁，在上板上形成轴向入口， 横向出口形成在侧壁上，叶轮设置在壳体中并且对应于入口，并且流动路径将入口连通到出口，其中入口的最大宽度大于或等于叶轮直径 。

公开(公告)号：US20150069667A1

公开(公告)日：2015-03-12

申请号：US13987879

申请日：2013-09-12

申请人： Yi Li ,  Jieran Li ,  Wen Lu

发明人： Yi Li ,  Jieran Li ,  Wen Lu

IPC分类号： C23C14/46 ,  C23C14/08 ,  C23C14/14 ,  C23C14/00

CPC分类号： C23C14/0005 ,  C23C14/024

摘要： Embodiments of present invention provide a method of forming nano-parts through vacuum coating technology. The method includes creating a set of openings in a substrate, the set of openings having a set of shapes that are complimentary to shapes of a set of nano-parts and the nano-parts having a size between 1 nm and 1000 nm; lining the set of openings with a thin layer of oleic acid of a single molecule thickness; depositing a metal-oxide material inside the set of openings to form the set of nano-parts; immersing the substrate together with the set of nano-parts in a solution; applying a supersonic vibration to the substrate via the solution causing the set of nano-parts to detach from the substrate; and separating the set of nano-parts from the substrate.

摘要翻译： 本发明的实施例提供了一种通过真空镀膜技术形成纳米零件的方法。 该方法包括在基底中形成一组开口，该组开口具有与一组纳米部分的形状互补的一组形状，并且纳米部分的尺寸在1nm和1000nm之间; 用单分子厚度的薄层油酸衬套该组开口; 在该组开口内沉积金属氧化物材料以形成该组纳米零件; 将衬底与该组纳米零件一起浸入溶液中; 通过溶液对衬底施加超音速振动，使得该组纳米部分与衬底分离; 并将该组纳米部分与基底分离。

公开(公告)号：US08921238B2

公开(公告)日：2014-12-30

申请号：US13235515

申请日：2011-09-19

申请人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen

发明人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen

IPC分类号： H01L21/31 ,  H01L21/3105 ,  H01L21/02

CPC分类号： H01L21/3105 ,  H01L21/02148 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02192 ,  H01L21/02197 ,  H01L21/0228

摘要： A method for processing a high-k dielectric layer includes the following steps. A semiconductor substrate is provided, and a high-k dielectric layer is formed thereon. The high-k dielectric layer has a crystalline temperature. Subsequently, a first annealing process is performed, and a process temperature of the first annealing process is substantially smaller than the crystalline temperature. A second annealing process is performed, and a process temperature of the second annealing process is substantially larger than the crystalline temperature.

摘要翻译： 一种用于处理高k电介质层的方法包括以下步骤。 提供半导体衬底，并且在其上形成高k电介质层。 高k电介质层具有结晶温度。 随后，进行第一退火处理，并且第一退火工艺的处理温度显着小于结晶温度。 进行第二退火处理，第二退火处理的工艺温度显着大于结晶温度。

公开(公告)号：US08674452B2

公开(公告)日：2014-03-18

申请号：US13167738

申请日：2011-06-24

申请人： Chin-Cheng Chien ,  Tzung-Ying Lee ,  Tsuo-Wen Lu ,  Shu-Yen Chan ,  Jei-Ming Chen ,  Yu-Min Lin ,  Chun-Wei Hsu

发明人： Chin-Cheng Chien ,  Tzung-Ying Lee ,  Tsuo-Wen Lu ,  Shu-Yen Chan ,  Jei-Ming Chen ,  Yu-Min Lin ,  Chun-Wei Hsu

IPC分类号： H01L21/70

CPC分类号： H01L29/7833 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

摘要： A semiconductor device includes: a substrate having a first region and a second region; a first gate structure disposed on the first region, wherein the first gate structure comprises a first high-k dielectric layer, a first work function metal layer, and a first metal layer disposed between the first high-k dielectric layer and the first work function metal layer; and a second gate structure disposed on the second region, wherein the second gate structure comprises a second high-k dielectric layer, a second work function metal layer, and a second metal layer disposed between the second high-k dielectric layer and the second work function metal layer, wherein the thickness of the second metal layer is lower than the thickness of the first metal layer.

摘要翻译： 半导体器件包括：具有第一区域和第二区域的衬底; 设置在所述第一区域上的第一栅极结构，其中所述第一栅极结构包括第一高k介电层，第一功函数金属层和设置在所述第一高k介电层与所述第一功函数之间的第一金属层 金属层 以及设置在所述第二区域上的第二栅极结构，其中所述第二栅极结构包括第二高k电介质层，第二功函数金属层和设置在所述第二高k电介质层和所述第二工件之间的第二金属层 功能金属层，其中所述第二金属层的厚度低于所述第一金属层的厚度。

公开(公告)号：US08560979B2

公开(公告)日：2013-10-15

申请号：US13541638

申请日：2012-07-03

申请人： William S. Wong ,  Fei Liu ,  Been-Der Chen ,  Yen-Wen Lu

发明人： William S. Wong ,  Fei Liu ,  Been-Der Chen ,  Yen-Wen Lu

IPC分类号： G06F17/50

CPC分类号： G03F1/36

摘要： A multivariable solver for proximity correction uses a Jacobian matrix to approximate effects of perturbations of segment locations in successive iterations of a design loop. The problem is formulated as a constrained minimization problem with box, linear equality, and linear inequality constraints. To improve computational efficiency, non-local interactions are ignored, which results in a sparse Jacobian matrix.

摘要翻译： 用于近程校正的多变量求解器使用雅可比矩阵近似设计循环的连续迭代中的段位置的扰动效应。 该问题被形成为具有框，线性等式和线性不等式约束的约束最小化问题。 为了提高计算效率，忽略非局部相互作用，这导致了稀疏的雅可比矩阵。

公开(公告)号：USD690674S1

公开(公告)日：2013-10-01

申请号：US29394819

申请日：2011-06-21

申请人： Yen-Wen Lu ,  Hao-Jen Chang

设计人： Yen-Wen Lu ,  Hao-Jen Chang

公开(公告)号：US08536038B2

公开(公告)日：2013-09-17

申请号：US13164781

申请日：2011-06-21

申请人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen ,  Yu-Min Lin ,  Chin-Cheng Chien ,  Jei-Ming Chen ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Yi-Ching Wu ,  Shu-Yen Chan

发明人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen ,  Yu-Min Lin ,  Chin-Cheng Chien ,  Jei-Ming Chen ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Yi-Ching Wu ,  Shu-Yen Chan

IPC分类号： H01L21/3205 ,  H01L21/425

CPC分类号： H01L29/7833 ,  H01L21/265 ,  H01L21/3215 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659

摘要： A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.

摘要翻译： 一种金属栅极的制造方法，包括提供具有至少形成有导电类型的半导体器件的衬底，在该半导体器件中形成栅极沟槽，形成具有导电类型的功函数金属层和对应于 栅极沟槽中的导电类型，并且执行离子注入以将功函数金属层的固有功函数调整到目标功函数。

公开(公告)号：USD685805S1

公开(公告)日：2013-07-09

申请号：US29431413

申请日：2012-09-07

申请人： Yen-Wen Lu ,  Chia-Chen Yang

设计人： Yen-Wen Lu ,  Chia-Chen Yang

公开(公告)号：US20130113048A1

公开(公告)日：2013-05-09

申请号：US13288072

申请日：2011-11-03

申请人： Fu-Chun CHIEN ,  Ching-Wei Teng ,  Nien-Chung Li ,  Chih-Chung Wang ,  Te-Yuan Wu ,  Li-Che Chen ,  Chih-Chun Pu ,  Yu-Ting Yeh ,  Kuan-Wen Lu

发明人： Fu-Chun CHIEN ,  Ching-Wei Teng ,  Nien-Chung Li ,  Chih-Chung Wang ,  Te-Yuan Wu ,  Li-Che Chen ,  Chih-Chun Pu ,  Yu-Ting Yeh ,  Kuan-Wen Lu

IPC分类号： H01L27/092 ,  H01L21/8238

CPC分类号： H01L21/823481 ,  H01L21/823418 ,  H01L21/823493 ,  H01L27/088

摘要： A method for fabricating a high voltage semiconductor device is provided. Firstly, a substrate is provided, wherein the substrate has a first active zone and a second active zone. Then, a first ion implantation process is performed to dope the substrate by a first mask layer, thereby forming a first-polarity doped region at the two ends of the first active zone and a periphery of the second active zone. After the first mask layer is removed, a second ion implantation process is performed to dope the substrate by a second mask layer, thereby forming a second-polarity doped region at the two ends of the second active zone and a periphery of the first active zone. After the second mask layer is removed, a first gate conductor structure and a second gate conductor structure are formed over the middle segments of the first active zone and the second active zone, respectively.

摘要翻译： 提供一种制造高电压半导体器件的方法。 首先，提供衬底，其中衬底具有第一有源区和第二有源区。 然后，进行第一离子注入工艺以通过第一掩模层掺杂衬底，从而在第一有源区的两端和第二有源区的周边形成第一极性掺杂区。 在去除第一掩模层之后，执行第二离子注入工艺以通过第二掩模层掺杂衬底，从而在第二有源区的两端和第一有源区的周边形成第二极性掺杂区 。 在去除第二掩模层之后，分别在第一有源区和第二有源区的中间段上形成第一栅极导体结构和第二栅极导体结构。