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    Variable resistance memory devices and methods of manufacturing the same
    1.
    发明授权
    Variable resistance memory devices and methods of manufacturing the same 有权
    可变电阻存储器件及其制造方法

    公开(公告)号：US09373664B2

    公开(公告)日：2016-06-21

    申请号：US14682506

    申请日：2015-04-09

    申请人： Dong-Jun Seong ,  Youn-Seon Kang ,  Seung-Jae Jung ,  Jung-Dal Choi

    发明人： Dong-Jun Seong ,  Youn-Seon Kang ,  Seung-Jae Jung ,  Jung-Dal Choi

    IPC分类号： H01L29/06 ,  H01L27/24 ,  H01L45/00

    CPC分类号： H01L27/2463 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

    摘要： A variable resistance memory device, and methods of manufacturing the same, include a plurality of first conductive structures extending in a first direction, a plurality of second conductive structures extending in a second direction crossing the first direction over the first conductive structures, the second conductive structures, and a plurality of memory cells that are formed at intersections at which the first conductive structures and the second conductive structures overlap each other, and each includes a selection element and a variable resistance element sequentially stacked. An upper surface of each of the first conductive structures has a width in the second direction less than a width of a bottom surface of each of the selection elements.

    摘要翻译： 可变电阻存储器件及其制造方法包括沿第一方向延伸的多个第一导电结构，沿与第一导电结构相交的第一方向的第二方向延伸的多个第二导电结构，第二导电 结构和形成在第一导电结构和第二导电结构彼此重叠的交点处的多个存储单元，并且每个存储单元包括依次堆叠的选择元件和可变电阻元件。 每个第一导电结构的上表面在第二方向上的宽度小于每个选择元件的底表面的宽度。

    Phase change material layer and phase change memory device including the same
    4.
    发明申请
    Phase change material layer and phase change memory device including the same 审中-公开
    相变材料层和包括其的相变存储器件

    公开(公告)号：US20090159868A1

    公开(公告)日：2009-06-25

    申请号：US12153559

    申请日：2008-05-21

    申请人： Youn-seon Kang ,  Tae-yon Lee

    发明人： Youn-seon Kang ,  Tae-yon Lee

    IPC分类号： H01L47/00

    CPC分类号： H01L45/148 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1625

    摘要： Provided are a phase change material layer and a phase change random access memory (PRAM) device including the same. By providing a phase change material layer formed of a III-V family material and a chalcogenide, a PRAM device with a set time shorter than that of a conventional PRAM device and improved retention characteristics can be provided.

    摘要翻译： 提供了一种相变材料层和包括该相变材料层的相变随机存取存储器（PRAM）装置。 通过提供由III-V族材料和硫族化物形成的相变材料层，可以提供比常规PRAM器件短的设定时间的PRAM器件和改进的保持特性。

    Variable resistance memory devices and methods of manufacturing the same
    6.
    发明授权
    Variable resistance memory devices and methods of manufacturing the same 有权

    公开(公告)号：US09685609B2

    公开(公告)日：2017-06-20

    申请号：US14963947

    申请日：2015-12-09

    申请人： Seung-Jae Jung ,  Youn-Seon Kang

    发明人： Seung-Jae Jung ,  Youn-Seon Kang

    IPC分类号： H01L27/24 ,  H01L45/00

    CPC分类号： H01L45/147 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

    摘要： A variable resistance memory device includes a plurality of first conductive lines, each of the first conductive lines extends in a first direction, a plurality of second conductive lines are above the first conductive lines, and each of the second conductive lines extend in a second direction transverse to the first direction. A plurality of first memory cells are at intersections where the first and second conductive lines overlap each other, each of the first memory cells including a first variable resistance structure having a first variable resistance pattern, a first sacrificial pattern and a second variable resistance pattern sequentially stacked in the first direction on a first plane. A plurality of third conductive lines are above the second conductive lines, each of the third conductive lines extend in the first direction, and a plurality of second memory cells are at intersections where the second and the third conductive lines overlap each other. Each of the second memory cells includes a second variable resistance structure having a third variable resistance pattern, a second sacrificial pattern and a fourth variable resistance pattern sequentially stacked in the first direction on second plane.

    VARIABLE RESISTANCE MEMORY DEVICES
    7.
    发明申请
    VARIABLE RESISTANCE MEMORY DEVICES 有权
    可变电阻存储器件

    公开(公告)号：US20150214478A1

    公开(公告)日：2015-07-30

    申请号：US14457439

    申请日：2014-08-12

    申请人： Jung-Moo Lee ,  Youn-Seon Kang ,  Seung-Jae Jung ,  Jung-Dal Choi

    发明人： Jung-Moo Lee ,  Youn-Seon Kang ,  Seung-Jae Jung ,  Jung-Dal Choi

    IPC分类号： H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/1233 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1675

    摘要： A variable resistance memory device includes a plurality of first conductive lines, a plurality of second conductive lines, a plurality of memory cells, a plurality of first air gaps and a plurality of second air gaps. The first conductive line extends in a first direction. The second conductive line is over the first conductive line and extends in a second direction crossing the first direction. The memory cell includes a variable resistance device. The memory cell is located at an intersection region of the first conductive line and the second conductive line. The first air gap extends in the first direction between the memory cells. The second air gap extends in the second direction between the memory cells.

    摘要翻译： 可变电阻存储器件包括多个第一导线，多个第二导线，多个存储单元，多个第一气隙和多个第二气隙。 第一导线沿第一方向延伸。 第二导线在第一导线上方并且沿与第一方向交叉的第二方向延伸。 存储单元包括可变电阻器件。 存储单元位于第一导线和第二导线的交叉区域。 第一气隙在存储单元之间沿第一方向延伸。 第二气隙沿第二方向在存储单元之间延伸。

    Phase change layer and method of manufacturing the same and phase change memory device comprising phase change layer and methods of manufacturing and operating phase change memory device
    8.
    发明申请
    Phase change layer and method of manufacturing the same and phase change memory device comprising phase change layer and methods of manufacturing and operating phase change memory device 有权
    相变层及其制造方法以及包括相变层的相变存储器件以及制造和操作相变存储器件的方法

    公开(公告)号：US20100273306A1

    公开(公告)日：2010-10-28

    申请号：US12801936

    申请日：2010-07-02

    申请人： Youn-seon Kang ,  Jin-seo Noh

    发明人： Youn-seon Kang ,  Jin-seo Noh

    IPC分类号： H01L45/00

    CPC分类号： C23C14/0623 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625

    摘要： Provided are a phase change layer and a method of forming the phase change layer and a phase change memory device including the phase change layer, and methods of manufacturing and operating the phase change memory device. The phase change layer may be formed of a quaternary compound including an amount of indium (In) ranging from about 15 at. % to about 20 at. %. The phase change layer may be InaGebSbcTed, wherein an amount of germanium (Ge) ranges from about 10 at. %≦b≦about 15 at. %, an amount of antimony (Sb) ranges from about 20 at. %≦c≦about 25 at. %, and an amount of tellurium (Te) ranges from about 40 at. %≦d≦about 55 at. %.

    摘要翻译： 提供了相变层和形成相变层的方法以及包括相变层的相变存储器件，以及制造和操作相变存储器件的方法。 相变层可以由包含一定量的铟（In）的季铵化合物形成，其范围为约15at。 ％至20左右。 ％。 相变层可以是InaGebSbcTed，其中锗（Ge）的量的范围为约10at。 ％＆nlE; b＆nlE;约15 at。 ％，锑（Sb）的量为约20吋。 ％＆nlE; c＆nlE;约25 at。 ％，碲（Te）的量为约40at。 ％＆nlE; d＆nlE;约55 at。 ％。

    Method of forming a phase change layer and method of manufacturing a storage node having the phase change layer
    9.
    发明申请
    Method of forming a phase change layer and method of manufacturing a storage node having the phase change layer 失效
    形成相变层的方法和制造具有相变层的存储节点的方法

    公开(公告)号：US20080108175A1

    公开(公告)日：2008-05-08

    申请号：US11976130

    申请日：2007-10-22

    申请人： Woong-chul Shin ,  Jae-ho Lee ,  Youn-seon Kang

    发明人： Woong-chul Shin ,  Jae-ho Lee ,  Youn-seon Kang

    IPC分类号： H01L45/00 ,  C23C16/00

    CPC分类号： C23C16/305 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1683

    摘要： A method of forming a phase change layer may include providing a bivalent first precursor having germanium (Ge), a second precursor having antimony (Sb), and a third precursor having tellurium (Te) onto a surface on which the phase change layer is to be formed. The phase change layer may be formed by CVD (e.g., MOCVD, cyclic-CVD) or ALD. The composition of the phase change layer may be varied by modifying the deposition pressure, deposition temperature, and/or supply rate of reaction gas. The deposition pressure may range from about 0.001-10 torr, the deposition temperature may range from about 150-350° C., and the supply rate of the reaction gas may range from about 0-1 slm. Additionally, the above phase change layer may be provided in a via hole and bounded by top and bottom electrodes to form a storage node.

    摘要翻译： 形成相变层的方法可以包括将具有锗（Ge）的二价第一前体，具有锑（Sb）的第二前体和具有碲（Te）的第三前体提供到相变层上的表面上 形成。 相变层可以通过CVD（例如MOCVD，循环CVD）或ALD形成。 可以通过改变沉积压力，沉积温度和/或反应气体的供应速率来改变相变层的组成。 沉积压力可以在约0.001-10托的范围内，沉积温度可以在约150-350℃的范围内，并且反应气体的供应速率可以在约0-1slm的范围内。 此外，上述相变层可以设置在通孔中并且由顶部和底部电极限定以形成存储节点。