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    Semiconductor device having plural penetration electrodes penetrating through semiconductor substrate and testing method thereof
    2.
    发明授权
    Semiconductor device having plural penetration electrodes penetrating through semiconductor substrate and testing method thereof 失效
    具有穿透半导体衬底的多个穿透电极的半导体器件及其测试方法

    公开(公告)号：US08717839B2

    公开(公告)日：2014-05-06

    申请号：US13398702

    申请日：2012-02-16

    申请人： Hideyuki Yokou ,  Yasuyuki Shigezane

    发明人： Hideyuki Yokou ,  Yasuyuki Shigezane

    IPC分类号： G11C29/00 ,  G11C5/06 ,  G11C7/06 ,  G11C7/10 ,  G11C29/02

    CPC分类号： G11C29/00 ,  G11C5/04 ,  G11C29/022 ,  G11C29/025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00

    摘要： Disclosed herein is a device that includes first and second current paths, first and second latch circuits electrically connected to the first and second current paths, respectively, a driver circuit supplying first data to the first latch circuit, and supplying second data representing a logical value opposite to a logical value of the first data to the second latch circuit, a control circuit controlling the driver circuit to be alternately and repeatedly in a first period in which the driver circuit supplies the first data to the first latch circuit and does not supply the second data to the second latch circuit, and in a second period in which the driver circuit supplies the second data to the second latch circuit and does not supply the first data to the first latch circuit, and a monitor circuit.

    摘要翻译： 本文公开了一种包括第一和第二电流路径的装置，分别与第一和第二电流路径电连接的第一和第二锁存电路，向第一锁存电路提供第一数据的驱动电路，以及提供表示逻辑值的第二数据 与第一数据的逻辑值相对的第二锁存电路的控制电路，控制电路在驱动电路将第一数据提供给第一锁存电路的第一时段中交替重复地进行控制，并且不提供 第二数据到第二锁存电路，以及在第二周期中，驱动电路将第二数据提供给第二锁存电路，并且不向第一锁存电路提供第一数据，以及监视电路。

    SEMICONDUCTOR DEVICE HAVING PLURAL PENETRATION ELECTRODES PENETRATING THROUGH SEMICONDUCTOR SUBSTRATE AND TESTING METHOD THEREOF
    5.
    发明申请
    SEMICONDUCTOR DEVICE HAVING PLURAL PENETRATION ELECTRODES PENETRATING THROUGH SEMICONDUCTOR SUBSTRATE AND TESTING METHOD THEREOF 失效
    具有通过半导体基板穿透的多孔渗透电极的半导体器件及其测试方法

    公开(公告)号：US20120212272A1

    公开(公告)日：2012-08-23

    申请号：US13398702

    申请日：2012-02-16

    申请人： Hideyuki YOKOU ,  Yasuyuki Shigezane

    发明人： Hideyuki YOKOU ,  Yasuyuki Shigezane

    IPC分类号： H03K3/027 ,  H03K3/00

    CPC分类号： G11C29/00 ,  G11C5/04 ,  G11C29/022 ,  G11C29/025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00

    摘要： Disclosed herein is a device that includes first and second current paths, first and second latch circuits electrically connected to the first and second current paths, respectively, a driver circuit supplying first data to the first latch circuit, and supplying second data representing a logical value opposite to a logical value of the first data to the second latch circuit, a control circuit controlling the driver circuit to be alternately and repeatedly in a first period in which the driver circuit supplies the first data to the first latch circuit and does not supply the second data to the second latch circuit, and in a second period in which the driver circuit supplies the second data to the second latch circuit and does not supply the first data to the first latch circuit, and a monitor circuit.

    摘要翻译： 本文公开了一种包括第一和第二电流路径的装置，分别与第一和第二电流路径电连接的第一和第二锁存电路，向第一锁存电路提供第一数据的驱动电路，以及提供表示逻辑值的第二数据 与第一数据的逻辑值相对的第二锁存电路的控制电路，控制电路在驱动电路将第一数据提供给第一锁存电路的第一时段中交替重复地进行控制，并且不提供 第二数据到第二锁存电路，以及在第二周期中，驱动电路将第二数据提供给第二锁存电路，并且不向第一锁存电路提供第一数据，以及监视电路。