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公开(公告)号：US08878077B2
公开(公告)日：2014-11-04
申请号：US13279501
申请日：2011-10-24
申请人： Takashi Ito , Tomoo Yamasaki , Yuta Sakaguchi
发明人： Takashi Ito , Tomoo Yamasaki , Yuta Sakaguchi
CPC分类号： H05K3/4652 , H01L21/4857 , H01L21/486 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H05K3/108 , Y10T29/49165 , H01L2924/00012 , H01L2924/00
摘要： A method of manufacturing a wiring substrate, includes forming a laminated body in which a nickel copper alloy layer is formed via an insulating resin layer, on a first wiring layer, forming a via hole reaching the first wiring layer in the nickel copper alloy layer and the insulating resin layer, applying a desmear process to an inside of the via hole, forming a seed layer on the nickel copper alloy layer and an inner surface of the via hole, forming a plating resist in which an opening portion is provided on a part containing the via hole, forming a metal plating layer in the opening portion in the plating resist by an electroplating, removing the plating resist, and forming a second wiring layer by etching the seed layer and the nickel copper alloy layer while using the metal plating layer as a mask.
摘要翻译： 一种制造布线基板的方法包括：在第一布线层上形成经由绝缘树脂层形成有镍铜合金层的层叠体，形成到达铜铜合金层中的第一布线层的通孔，以及 所述绝缘树脂层对所述通孔的内部进行去污处理，在所述镍铜合金层和所述通孔的内表面上形成种子层，形成电镀抗蚀剂，在所述电镀抗蚀剂上形成开口部， 包含通孔，通过电镀在电镀抗蚀剂的开口部中形成金属镀层，除去电镀抗蚀剂，并且通过在使用金属镀层的同时蚀刻种子层和镍铜合金层来形成第二配线层 作为面具。
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公开(公告)号：US20110018144A1
公开(公告)日：2011-01-27
申请号：US12813692
申请日：2010-06-11
CPC分类号： H01L23/49827 , H01L23/49838 , H01L23/50 , H01L24/16 , H01L2224/16225 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H05K1/0227 , H05K1/162 , H05K3/4605 , H05K2201/09236 , H05K2201/093 , H05K2201/09309 , H05K2201/09345 , H05K2201/09609
摘要： A wiring board includes a core substrate including an insulation base member; linear conductors configured to pierce from a first surface of the insulation base member to a second surface of the insulation base member; a ground wiring group including a first ground wiring formed on the first surface of the core substrate, and a belt-shaped second ground wiring formed on the second surface of the core substrate and electrically connected to the first ground wiring by way of a part of the linear conductors; and an electric power supply wiring group including a first electric power supply wiring formed on the first surface, and a second electric power supply wiring formed on the second surface and electrically connected to the first electric power supply wiring by way of a part of the plural linear conductors.
摘要翻译： 布线基板包括：具有绝缘基体的芯基板; 构造成从所述绝缘基材的第一表面刺穿到所述绝缘基材的第二表面的线状导体; 包括形成在芯基板的第一表面上的第一接地布线的接地布线组和形成在芯基板的第二表面上的带状第二接地布线，并且通过一部分电连接到第一接地布线 线性导体; 以及电源布线组，其包括形成在第一表面上的第一电力供给布线和形成在第二表面上的第二电力供应布线，并且通过多个部分中的一部分电连接到第一电力布线 线性导体。
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公开(公告)号：US20110013340A1
公开(公告)日：2011-01-20
申请号：US12833185
申请日：2010-07-09
申请人： Michio HORIUCHI , Yasue Tokutake , Yuichi Matsuda , Yukio Shimizu , Tomoo Yamasaki , Yuta Sakaguchi
发明人： Michio HORIUCHI , Yasue Tokutake , Yuichi Matsuda , Yukio Shimizu , Tomoo Yamasaki , Yuta Sakaguchi
CPC分类号： H05K1/162 , H01G4/012 , H01G4/232 , H01G4/302 , H05K1/0287 , H05K1/0306 , H05K2201/09263 , H05K2201/09563 , H05K2201/09609 , H05K2201/097 , H05K2201/09945
摘要： A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
摘要翻译： 电容器包括电介质基板和形成为在其厚度方向上穿过电介质基板的大量丝状导体。 电极仅与构成一组各自由多根丝状导体构成的多个丝状导体的相应一端连接。 电极设置在电介质基板的两个表面的每一个上的至少一个位置，或者在其中一个表面上的至少两个位置。 此外，在电介质基板的两个表面的每个表面上形成绝缘层，以覆盖电极之间的区域，并且在相应的绝缘层上形成与期望数量的电极一体的导体层。
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公开(公告)号：US20110012266A1
公开(公告)日：2011-01-20
申请号：US12832177
申请日：2010-07-08
IPC分类号： H01L23/538 , H01L21/50
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/09701 , H05K1/0306 , H05K1/185 , H05K3/4605 , H05K2201/0116 , H05K2201/09609 , H05K2201/09945 , H05K2201/10674 , H05K2203/0315 , H05K2203/1142 , H01L2924/00
摘要： In a semiconductor device, a substrate includes a plurality of line conductors which penetrate the substrate from a top surface to a bottom surface of the substrate. A semiconductor chip is secured in a hole of the substrate. A first insulating layer is formed on the top surfaces of the substrate and the semiconductor chip. A first wiring layer is formed on the first insulating layer and electrically connected via through holes of the first insulating layer to the semiconductor chip and some line conductors exposed to one of the through holes. A second insulating layer is formed on the bottom surfaces of the substrate and the semiconductor chip. A second wiring layer is formed on the second insulating layer and electrically connected via a through hole of the second insulating layer to some line conductors exposed to the through hole.
摘要翻译： 在半导体器件中，衬底包括从衬底的顶表面到底表面穿透衬底的多个线导体。 半导体芯片固定在基板的孔中。 在衬底和半导体芯片的顶表面上形成第一绝缘层。 第一布线层形成在第一绝缘层上，并且经由第一绝缘层的通孔与半导体芯片电连接，一些线导体暴露于一个通孔。 在基板和半导体芯片的底面上形成第二绝缘层。 第二布线层形成在第二绝缘层上，并且经由第二绝缘层的通孔与暴露于通孔的一些线导体电连接。
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公开(公告)号：US08138609B2
公开(公告)日：2012-03-20
申请号：US12832177
申请日：2010-07-08
IPC分类号： H01L23/48
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/09701 , H05K1/0306 , H05K1/185 , H05K3/4605 , H05K2201/0116 , H05K2201/09609 , H05K2201/09945 , H05K2201/10674 , H05K2203/0315 , H05K2203/1142 , H01L2924/00
摘要： In a semiconductor device, a substrate includes a plurality of line conductors which penetrate the substrate from a top surface to a bottom surface of the substrate. A semiconductor chip is secured in a hole of the substrate. A first insulating layer is formed on the top surfaces of the substrate and the semiconductor chip. A first wiring layer is formed on the first insulating layer and electrically connected via through holes of the first insulating layer to the semiconductor chip and some line conductors exposed to one of the through holes. A second insulating layer is formed on the bottom surfaces of the substrate and the semiconductor chip. A second wiring layer is formed on the second insulating layer and electrically connected via a through hole of the second insulating layer to some line conductors exposed to the through hole.
摘要翻译： 在半导体器件中，衬底包括从衬底的顶表面到底表面穿透衬底的多个线导体。 半导体芯片固定在基板的孔中。 在衬底和半导体芯片的顶表面上形成第一绝缘层。 第一布线层形成在第一绝缘层上，并且经由第一绝缘层的通孔与半导体芯片电连接，一些线导体暴露于一个通孔。 在基板和半导体芯片的底面上形成第二绝缘层。 第二布线层形成在第二绝缘层上，并且经由第二绝缘层的通孔与暴露于通孔的一些线导体电连接。
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6.发明授权Wiring board having piercing linear conductors and semiconductor device using the same 有权具有穿孔线性导体的接线板和使用其的半导体器件公开(公告)号：US08242612B2
公开(公告)日：2012-08-14
申请号：US12813692
申请日：2010-06-11
CPC分类号： H01L23/49827 , H01L23/49838 , H01L23/50 , H01L24/16 , H01L2224/16225 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H05K1/0227 , H05K1/162 , H05K3/4605 , H05K2201/09236 , H05K2201/093 , H05K2201/09309 , H05K2201/09345 , H05K2201/09609
摘要： A wiring board includes a core substrate including an insulation base member; linear conductors configured to pierce from a first surface of the insulation base member to a second surface of the insulation base member; a ground wiring group including a first ground wiring formed on the first surface of the core substrate, and a belt-shaped second ground wiring formed on the second surface of the core substrate and electrically connected to the first ground wiring by way of a part of the linear conductors; and an electric power supply wiring group including a first electric power supply wiring formed on the first surface, and a second electric power supply wiring formed on the second surface and electrically connected to the first electric power supply wiring by way of a part of the plural linear conductors.
摘要翻译： 布线基板包括：具有绝缘基体的芯基板; 构造成从所述绝缘基材的第一表面刺穿到所述绝缘基材的第二表面的线状导体; 包括形成在芯基板的第一表面上的第一接地布线的接地布线组和形成在芯基板的第二表面上的带状第二接地布线，并且通过一部分电连接到第一接地布线 线性导体; 以及电源布线组，其包括形成在第一表面上的第一电力供给布线和形成在第二表面上的第二电力供应布线，并且通过多个部分中的一部分电连接到第一电力布线 线性导体。
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7.发明授权公开(公告)号：US08638542B2
公开(公告)日：2014-01-28
申请号：US12833185
申请日：2010-07-09
申请人： Michio Horiuchi , Yasue Tokutake , Yuichi Matsuda , Yukio Shimizu , Tomoo Yamasaki , Yuta Sakaguchi
发明人： Michio Horiuchi , Yasue Tokutake , Yuichi Matsuda , Yukio Shimizu , Tomoo Yamasaki , Yuta Sakaguchi
CPC分类号： H05K1/162 , H01G4/012 , H01G4/232 , H01G4/302 , H05K1/0287 , H05K1/0306 , H05K2201/09263 , H05K2201/09563 , H05K2201/09609 , H05K2201/097 , H05K2201/09945
摘要： A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
摘要翻译： 电容器包括电介质基板和形成为在其厚度方向上穿过电介质基板的大量丝状导体。 电极仅与构成一组各自由多根丝状导体构成的多个丝状导体的相应一端连接。 电极设置在电介质基板的两个表面的每一个上的至少一个位置，或者在其中一个表面上的至少两个位置。 此外，在电介质基板的两个表面的每个表面上形成绝缘层，以覆盖电极之间的区域，并且在相应的绝缘层上形成与期望数量的电极一体的导体层。
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公开(公告)号：US20120103667A1
公开(公告)日：2012-05-03
申请号：US13279501
申请日：2011-10-24
申请人： Takashi ITO , Tomoo YAMASAKI , Yuta SAKAGUCHI
发明人： Takashi ITO , Tomoo YAMASAKI , Yuta SAKAGUCHI
CPC分类号： H05K3/4652 , H01L21/4857 , H01L21/486 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H05K3/108 , Y10T29/49165 , H01L2924/00012 , H01L2924/00
摘要： A method of manufacturing a wiring substrate, includes forming a laminated body in which a nickel copper alloy layer is formed via an insulating resin layer, on a first wiring layer, forming a via hole reaching the first wiring layer in the nickel copper alloy layer and the insulating resin layer, applying a desmear process to an inside of the via hole, forming a seed layer on the nickel copper alloy layer and an inner surface of the via hole, forming a plating resist in which an opening portion is provided on a part containing the via hole, forming a metal plating layer in the opening portion in the plating resist by an electroplating, removing the plating resist, and forming a second wiring layer by etching the seed layer and the nickel copper alloy layer while using the metal plating layer as a mask.
摘要翻译： 一种制造布线基板的方法包括：在第一布线层上形成经由绝缘树脂层形成有镍铜合金层的层叠体，形成到达铜铜合金层中的第一布线层的通孔，以及 所述绝缘树脂层对所述通孔的内部进行去污处理，在所述镍铜合金层和所述通孔的内表面上形成种子层，形成电镀抗蚀剂，在所述电镀抗蚀剂上形成开口部， 包含通孔，通过电镀在电镀抗蚀剂的开口部中形成金属镀层，除去电镀抗蚀剂，并且通过在使用金属镀层的同时蚀刻种子层和镍铜合金层来形成第二配线层 作为面具。
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