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公开(公告)号：US11527671B2
公开(公告)日：2022-12-13
申请号：US16732161
申请日：2019-12-31
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Chi Sheng Tseng , Hui-Chung Liu , Ching-Han Huang
IPC: H01L31/12 , H01L31/18 , H01L31/153
Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.
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公开(公告)号：US11101189B2
公开(公告)日：2021-08-24
申请号：US16885150
申请日：2020-05-27
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Ming Yen Lee , Chia-Hao Sung , Ching-Han Huang , Yu-Hsuan Tsai
IPC: H01L21/31 , H01L23/31 , B81B3/00 , B81C1/00 , H01L23/538 , H01L23/48 , H01L23/522 , H01L23/52 , H01L23/525 , H01L21/66 , B81C3/00 , H01L23/13 , H01L23/12 , H01L23/28 , B81B7/00
Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.
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公开(公告)号：US11014806B2
公开(公告)日：2021-05-25
申请号：US15599377
申请日：2017-05-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Hsu-Liang Hsiao , Lu-Ming Lai , Ching-Han Huang , Chia-Hung Shen
Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate with a first groove and a semiconductor device. The first groove has a first portion, a second portion, and a third portion, and the second portion is between the first portion and the third portion. The semiconductor device includes a membrane and is disposed on the second portion of the first groove. The semiconductor device has a first surface adjacent to the substrate and opposite to the membrane. The membrane is exposed by the first surface.
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4.发明授权公开(公告)号：US09850124B2
公开(公告)日：2017-12-26
申请号：US14923602
申请日：2015-10-27
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Ching-Han Huang , Hsun-Wei Chan , Yu-Hsuan Tsai
IPC: H01L31/0232 , B81B7/00 , B81C1/00
CPC classification number: B81B7/0067 , B81B2201/0292 , B81C1/00317 , B81C2203/0109 , H01L31/0203 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2924/16151 , H01L2924/16195 , H01L2924/00014
Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.
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公开(公告)号：US11588470B2
公开(公告)日：2023-02-21
申请号：US16794112
申请日：2020-02-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Chi Sheng Tseng , Lu-Ming Lai , Ching-Han Huang , Kuo-Hua Lai , Hui-Chung Liu
Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
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Patent Agency Ranking
6.发明授权公开(公告)号：US11133278B2
公开(公告)日：2021-09-28
申请号：US16583006
申请日：2019-09-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Yu-Che Huang , Ching-Han Huang , An-Nong Wen , Po-Ming Huang
IPC: H01L23/00 , H01L21/768
Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.
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公开(公告)号：US11081413B2
公开(公告)日：2021-08-03
申请号：US16282147
申请日：2019-02-21
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Hsin Lin Wu , Yu-Hsuan Tsai , Chang Chin Tsai , Lu-Ming Lai , Ching-Han Huang
IPC: H01L23/20 , H01L23/043 , H01L21/48 , H01L23/10 , H01L23/26 , H01L23/053
Abstract: A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.
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公开(公告)号：US09881845B1
公开(公告)日：2018-01-30
申请号：US15291971
申请日：2016-10-12
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Yung-Yi Chang , Hsun-Wei Chan , Ching-Han Huang
IPC: H01L27/14 , H01L23/055 , G01N27/12 , G01N33/00
CPC classification number: H01L23/055 , G01N27/12 , G01N27/125 , G01N33/0011 , G01N33/0027
Abstract: An electronic device includes a transducer including a sensing area and a covering structure that covers the transducer. The covering structure includes a shelter portion and defines at least one aperture. The shelter portion covers the sensing area. The aperture includes a first curved surface and a second curved surface farther away from the sensing area than the first curved surface, and a first center of a first curvature of the first curved surface is at a different location than a second center of a second curvature of the second curved surface.
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公开(公告)号：US20170073221A1
公开(公告)日：2017-03-16
申请号：US14855684
申请日：2015-09-16
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Ching-Han Huang , Hsun-Wei Chan , Lu-Ming Lai
Abstract: A semiconductor device package includes a carrier, a wall disposed on a top surface of the carrier, a cover, and a sensor element. The cover includes a portion protruding from a bottom surface of the cover, where the protruding portion of the cover contacts a top surface of the wall to define a space. The sensor element is positioned in the space.
Abstract translation: 半导体器件封装包括载体，设置在载体的顶表面上的壁，盖和传感器元件。 所述盖包括从所述盖的底表面突出的部分，其中所述盖的突出部分接触所述壁的顶表面以限定空间。 传感器元件位于空间中。
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公开(公告)号：US11171108B2
公开(公告)日：2021-11-09
申请号：US16592683
申请日：2019-10-03
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： An-Nong Wen , Ching-Han Huang , Ching-Ho Chang
Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.
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