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公开(公告)号：US20060024869A1
公开(公告)日：2006-02-02
申请号：US11237175
申请日：2005-09-28
IPC分类号： H01L21/84
CPC分类号： H01L29/7842 , H01L21/28079 , H01L21/28097 , H01L21/823807 , H01L21/823814 , H01L21/823828 , H01L21/823842 , H01L29/1054 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/66583 , H01L29/78654 , Y10S438/938
摘要： In forming an electronic device, a semiconductor layer is pre-doped and a dopant distribution anneal is performed prior to gate definition. Alternatively, the gate is formed from a metal. Subsequently formed shallow sources and drains, therefore, are not affected by the gate annealing step.
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2.发明申请Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for Fabricating Same 有权采用具有定义杂质梯度的应变材料层的半导体结构及其制造方法公开(公告)号：US20110095363A1
公开(公告)日：2011-04-28
申请号：US12982101
申请日：2010-12-30
IPC分类号： H01L29/78
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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公开(公告)号：US20060292719A1
公开(公告)日：2006-12-28
申请号：US11436198
申请日：2006-05-17
申请人： Anthony Lochtefeld , Matthew Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas Langdo
发明人： Anthony Lochtefeld , Matthew Currie , Zhiyuan Cheng , James Fiorenza , Glyn Braithwaite , Thomas Langdo
IPC分类号： H01L21/00
CPC分类号： H01L21/02647 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/0254 , H01L21/02639 , H01L21/7624 , H01L21/8258 , H01L29/66795 , H01L29/785
摘要： Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
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4.发明申请Methods for preserving strained semiconductor substrate layers during CMOS processing 有权在CMOS处理期间保留应变半导体衬底层的方法公开(公告)号：US20050215069A1
公开(公告)日：2005-09-29
申请号：US11132856
申请日：2005-05-19
申请人： Matthew Currie , Anthony Lochtefeld
发明人： Matthew Currie , Anthony Lochtefeld
IPC分类号： H01L21/20 , H01L21/265 , H01L21/31 , H01L21/469
CPC分类号： H01L21/02532 , H01L21/0237 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02521 , H01L21/02538 , H01L21/02664 , H01L21/2652 , H01L21/823807 , H01L29/1054
摘要： Oxidation methods, which avoid consuming undesirably large amounts of surface material in Si/SiGe heterostructure-based wafers, replace various intermediate CMOS thermal oxidation steps. First, by using oxide deposition methods, arbitrarily thick oxides may be formed with little or no consumption of surface silicon. These oxides, such as screening oxide and pad oxide, are formed by deposition onto, rather than reaction with and consumption of the surface layer. Alternatively, oxide deposition is preceded by a thermal oxidation step of short duration, e.g., rapid thermal oxidation. Here, the short thermal oxidation consumes little surface Si, and the Si/oxide interface is of high quality. The oxide may then be thickened to a desired final thickness by deposition. Furthermore, the thin thermal oxide may act as a barrier layer to prevent contamination associated with subsequent oxide deposition.
摘要翻译： 避免在Si / SiGe异质结构基晶片中消耗不希望的大量表面材料的氧化方法代替了各种中间CMOS热氧化步骤。 首先，通过使用氧化物沉积方法，可以形成少量或不消耗表面硅的任意厚的氧化物。 这些氧化物，例如筛选氧化物和氧化垫，通过沉积到表面层上而不是与表面层反应并消耗而形成。 或者，氧化物沉积之前是短时间的热氧化步骤，例如快速热氧化。 这里，短的热氧化消耗很少的表面Si，并且Si /氧化物界面是高质量的。 然后可以通过沉积将氧化物增稠至所需的最终厚度。 此外，薄的热氧化物可以用作阻挡层，以防止与随后的氧化物沉积相关的污染。
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5.发明申请Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes 有权通过使用分裂面形成绝缘体上半导体器件结构的方法公开(公告)号：US20050212061A1
公开(公告)日：2005-09-29
申请号：US11127508
申请日：2005-05-12
IPC分类号： H01L21/20 , H01L21/331 , H01L21/336 , H01L21/337 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/76
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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公开(公告)号：US20050205859A1
公开(公告)日：2005-09-22
申请号：US11130584
申请日：2005-05-17
申请人： Matthew Currie , Anthony Lochtefeld
发明人： Matthew Currie , Anthony Lochtefeld
IPC分类号： H01L20060101 , H01L21/00 , H01L21/26 , H01L21/336 , H01L21/42 , H01L21/76 , H01L21/762 , H01L21/8234 , H01L21/8238 , H01L27/00 , H01L29/00 , H01L29/06 , H01L29/10 , H01L29/772 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L29/66628 , H01L21/76224 , H01L21/823412 , H01L21/823807 , H01L21/823878 , H01L29/1054 , H01L29/6659 , H01L29/66636 , H01L29/7842 , H01L29/785
摘要： A structure including a transistor and a trench structure, with the trench structure inducing only a portion of the strain in a channel region of the transistor.
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7.发明申请SEMICONDUCTOR STRUCTURES EMPLOYING STRAINED MATERIAL LAYERS WITH DEFINED IMPURITY GRADIENTS AND METHODS FOR FABRICATING SAME 有权使用定义的污染物等级的应变材料层的半导体结构及其制造方法公开(公告)号：US20070293009A1
公开(公告)日：2007-12-20
申请号：US11848642
申请日：2007-08-31
IPC分类号： H01L21/336
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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8.发明申请Methods for forming semiconductor structures with differential surface layer thicknesses 审中-公开用于形成具有差的表面层厚度的半导体结构的方法公开(公告)号：US20060266997A1
公开(公告)日：2006-11-30
申请号：US11498521
申请日：2006-08-03
IPC分类号： H01L31/00
CPC分类号： H01L21/823807 , H01L21/823412 , H01L27/0922
摘要： A semiconductor structure having a substrate with a surface layer including strained silicon. The surface layer has a first region with a first thickness less than a second thickness of a second region. A gate dielectric layer is disposed over a portion of at least the first surface layer region.
摘要翻译： 具有具有包括应变硅的表面层的基板的半导体结构。 表面层具有第一厚度小于第二区域的第二厚度的第一区域。 栅电介质层设置在至少第一表面层区域的一部分上。
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9.发明申请Methods for forming double gate strained-semiconductor-on-insulator device structures 审中-公开用于形成双栅应变半导体绝缘体上器件结构的方法公开(公告)号：US20060197125A1
公开(公告)日：2006-09-07
申请号：US11415784
申请日：2006-05-02
申请人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
发明人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
IPC分类号： H01L21/8234 , H01L29/76 , H01L31/00
CPC分类号： H01L29/785 , H01L21/76254 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66795 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。
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10.发明申请Semiconductor Structures Employing Strained Material Layers with Defined Impurity Gradients and Methods for Fabricating Same 有权采用具有定义杂质梯度的应变材料层的半导体结构及其制造方法公开(公告)号：US20120086047A1
公开(公告)日：2012-04-12
申请号：US13327194
申请日：2011-12-15
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。
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