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公开(公告)号:US10903211B1
公开(公告)日:2021-01-26
申请号:US16542658
申请日:2019-08-16
Applicant: APPLIED Materials, Inc.
Inventor: Anthony Renau , Min Gyu Sung , Sony Varghese , Morgan Evans , Naushad K. Variam , Tassie Andersen
IPC: H01L27/08 , H01L27/088 , H01L29/06 , H01L29/78 , H01L29/66
Abstract: The present disclosure is directed to structures and processing for three-dimensional transistor devices. In some approaches, a method may include providing a plurality of fin structures formed from a substrate, the plurality of fin structures disposed subjacent to a hard mask layer, and directing angled ions at the plurality of fin structures. The angled ions may form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the angled ions etch the plurality of fin structures to form a stack of isolated nanowires within the plurality of fin structures. The method may further include removing the hard mask layer, and forming a stopping layer over the stack of isolated nanowires.
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公开(公告)号:US10607847B1
公开(公告)日:2020-03-31
申请号:US16207932
申请日:2018-12-03
Applicant: APPLIED Materials, Inc.
Inventor: Min Gyu Sung , Sony Varghese , Anthony Renau , Morgan Evans , Joseph C. Olson
IPC: H01L21/3065 , H01L29/78 , H01L29/66 , H01L21/8238 , H01L29/06 , H01L27/092 , H01L21/8234 , H01L29/423
Abstract: A method of forming a three-dimensional transistor device. The method may include providing a fin array on a substrate, the fin array comprising a plurality of fin structures, formed from a monocrystalline semiconductor, and disposed subjacent to a hard mask layer. The method may include directing angled ions at the fin array, wherein the angled ions form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The angled ions may etch the plurality of fin structures to form a stack of isolated nanowires, within a given fin structure.
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公开(公告)号:US11996266B2
公开(公告)日:2024-05-28
申请号:US17093139
申请日:2020-11-09
Applicant: APPLIED Materials, Inc.
Inventor: Anthony Renau , Joseph C. Olson , Peter F. Kurunczi
IPC: H01J37/20 , H01J37/304
CPC classification number: H01J37/304 , H01J37/20 , H01J2237/201
Abstract: A system may include a substrate stage to support a substrate, and a plurality of beam sources. The plurality of beam sources may include an ion beam source, the ion beam source arranged to direct an ion beam to the substrate, and a radical beam source, the radical beam source arranged to direct a radical beam to the substrate. The system may include a controller configured to control the ion beam source and the radical beam source to operate independently of one another, in at least one aspect, wherein the at least one aspect includes beam composition, beam angle of incidence, and relative scanning of a beam source with respect to the substrate.
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公开(公告)号:US10930735B2
公开(公告)日:2021-02-23
申请号:US16793683
申请日:2020-02-18
Applicant: APPLIED Materials, Inc.
Inventor: Min Gyu Sung , Sony Varghese , Anthony Renau , Morgan Evans , Joseph C. Olson
IPC: H01L29/06 , H01L29/78 , H01L29/66 , H01L21/8238 , H01L21/3065 , H01L27/092 , H01L21/8234 , H01L29/423
Abstract: A method of forming a three-dimensional transistor device. The method may include providing a fin array on a substrate, the fin array comprising a plurality of fin structures, formed from a monocrystalline semiconductor, and disposed subjacent to a hard mask layer. The method may include directing angled ions at the fin array, wherein the angled ions form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The angled ions may etch the plurality of fin structures to form a stack of isolated nanowires, within a given fin structure.
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公开(公告)号:US20240339288A1
公开(公告)日:2024-10-10
申请号:US18131287
申请日:2023-04-05
Applicant: Applied Materials, Inc.
Inventor: Alexandre Likhanskii , Peter F. Kurunczi , Nirbhav Singh Chopra , Anthony Renau , Joseph C. Olson , Frank Sinclair
IPC: H01J37/05 , H01J37/147 , H01J37/317
CPC classification number: H01J37/05 , H01J37/1472 , H01J37/3171 , H01J37/09 , H01J37/12 , H01J2237/053 , H01J2237/057 , H01J2237/1207 , H01J2237/2505
Abstract: An apparatus, including an electrodynamic mass analysis (EDMA) assembly. The EDMA assembly may include a first upper electrode, disposed above a beam axis; and a first lower electrode, disposed below the beam axis, opposite the first upper electrode, the EDMA assembly arranged to receive a first RF voltage signal at a first frequency. The apparatus may include a deflection assembly, disposed downstream to the EDMA assembly, the deflection assembly comprising a blocker, disposed along the beam axis. The apparatus may include an energy spread reducer (ESR), disposed downstream to the deflection assembly, the energy spread reducer arranged to receive a second RF voltage signal at a second frequency, twice the first frequency. The ESR may include an upper ESR electrode, disposed above the beam axis; and a lower ESR electrode, disposed below the beam axis.
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公开(公告)号:US20240029997A1
公开(公告)日:2024-01-25
申请号:US18478826
申请日:2023-09-29
Applicant: Applied Materials, Inc.
Inventor: Paul J. Murphy , Frank Sinclair , Jun Lu , Daniel Tieger , Anthony Renau
IPC: H01J37/317 , H01J37/30 , C23C14/48
CPC classification number: H01J37/3171 , H01J37/3007 , C23C14/48 , H01L21/265
Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.
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公开(公告)号:US11569063B2
公开(公告)日:2023-01-31
申请号:US17221033
申请日:2021-04-02
Applicant: Applied Materials, Inc.
Inventor: Paul J. Murphy , Frank Sinclair , Jun Lu , Daniel Tieger , Anthony Renau
IPC: H01J37/08 , H01J37/317 , H01J37/304 , H01J37/32 , H01J37/05
Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.
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公开(公告)号:US20220319806A1
公开(公告)日:2022-10-06
申请号:US17221033
申请日:2021-04-02
Applicant: Applied Materials, Inc.
Inventor: Paul J. Murphy , Frank Sinclair , Jun Lu , Daniel Tieger , Anthony Renau
IPC: H01J37/317 , H01J37/08 , H01J37/05 , H01J37/304 , H01J37/32
Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.
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公开(公告)号:US11217427B1
公开(公告)日:2022-01-04
申请号:US17106016
申请日:2020-11-27
Applicant: Applied Materials, Inc.
Inventor: Anthony Renau
IPC: H01J37/317 , H01J37/304 , H01J37/04 , H01J37/30
Abstract: An apparatus may include a scanner, arranged to receive an ion beam, and arranged to deliver a scan signal, defined by a scan period, to scan the ion beam between a first beamline side and a second beamline side. The apparatus may include a corrector module, disposed downstream of the scanner, and defining a variable path length for the ion beam, between the first beamline side and the second beamline side, wherein a difference in propagation time between a first ion path along the first beamline side and a second ion path along the second beamline side is equal to the scan period.
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公开(公告)号:US20200185228A1
公开(公告)日:2020-06-11
申请号:US16793683
申请日:2020-02-18
Applicant: APPLIED Materials, Inc.
Inventor: Min Gyu Sung , Sony Varghese , Anthony Renau , Morgan Evans , Joseph C. Olson
IPC: H01L21/3065 , H01L29/78 , H01L27/092 , H01L21/8238 , H01L29/06 , H01L21/8234 , H01L29/423 , H01L29/66
Abstract: A method of forming a three-dimensional transistor device. The method may include providing a fin array on a substrate, the fin array comprising a plurality of fin structures, formed from a monocrystalline semiconductor, and disposed subjacent to a hard mask layer. The method may include directing angled ions at the fin array, wherein the angled ions form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The angled ions may etch the plurality of fin structures to form a stack of isolated nanowires, within a given fin structure.
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