Metal oxide temperature monitor
    5.
    发明授权
    Metal oxide temperature monitor 失效
    金属氧化物温度监测仪

    公开(公告)号:US06759260B2

    公开(公告)日:2004-07-06

    申请号:US10421986

    申请日:2003-04-23

    IPC分类号: H01L2166

    CPC分类号: H01L21/67248 H01L21/67098

    摘要: A method, and associated structure, for monitoring temperature and temperature distributions in a heating chamber for a temperature range of 200 to 600° C., wherein the heating chamber may be used in the fabrication of a semiconductor device. A copper layer is deposited over a surface of a semiconductor wafer. Next, the wafer is heated in an ambient oxygen atmosphere to a temperature in the range of 200-600° C. The heating of the wafer oxidizes a portion of the copper layer, which generates an oxide layer. After being heated, the wafer is removed and a sheet resistance is measured at points on the wafer surface. Since the local sheet resistance is a function of the local thickness of the oxide layer, a spatial distribution of sheet resistance over the wafer surface reflects a distribution of wafer temperature across the wafer surface during the heating of the wafer. The measured spatial distribution of sheet resistance may be utilized to readjust the spatial distribution of heat input to another wafer in order to achieve a more uniform temperature across the other wafer's surface. In addition, the monitor may be reconditioned for repeated use by heating the monitor in a hydrogen ambient environment to convert the oxide layer to unoxidized copper. Additionally, the oxide layer has a color that is a function of the oxide layer thickness, where the color may be used to estimate the temperature at which the wafer was heated in the ambient oxygen atmosphere.

    摘要翻译: 一种用于监测加热室中温度范围为200至600℃的温度和温度分布的方法和相关结构,其中加热室可用于制造半导体器件。 铜层沉积在半导体晶片的表面上。 接下来,将晶片在环境氧气氛中加热到200-600℃的温度。晶片的加热使生成氧化物层的铜层的一部分氧化。 加热后,去除晶片,并在晶片表面上的点测量薄层电阻。 由于局部薄层电阻是氧化物层的局部厚度的函数,所以晶片表面上的薄层电阻的空间分布反映了在晶片加热期间晶片温度跨晶片表面的分布。 测量的薄层电阻的空间分布可以用于重新调整输入到另一晶片的热空间分布,以便在另一晶片的表面上实现更均匀的温度。 此外,可以通过在氢环境环境中加热监测器来重新使用监视器以重新使用以将氧化物层转化为未氧化的铜。 此外,氧化物层具有作为氧化物层厚度的函数的颜色,其中可以使用颜色来估计晶片在环境氧气氛中被加热的温度。

    Metal oxide temperature monitor
    7.
    发明授权

    公开(公告)号:US06580140B1

    公开(公告)日:2003-06-17

    申请号:US09665584

    申请日:2000-09-18

    IPC分类号: H01L31058

    CPC分类号: H01L21/67248 H01L21/67098

    摘要: A method, and associated structure, for monitoring temperature and temperature distributions in a heating chamber for a temperature range of 200 to 600° C., wherein the heating chamber may be used in the fabrication of a semiconductor device. A copper layer is deposited over a surface of a semiconductor wafer. Next, the wafer is heated in an ambient oxygen atmosphere to a temperature in the range of 200-600° C. The heating of the wafer oxidizes a portion of the copper layer, which generates an oxide layer. After being heated, the wafer is removed and a sheet resistance is measured at points on the wafer surface. Since the local sheet resistance is a function of the local thickness of the oxide layer, a spatial distribution of sheet resistance over the wafer surface reflects a distribution of wafer temperature across the wafer surface during the heating of the wafer. The measured spatial distribution of sheet resistance may be utilized to readjust the spatial distribution of heat input to another wafer in order to achieve a more uniform temperature across the other wafer's surface. In addition, the monitor may be reconditioned for repeated use by heating the monitor in a hydrogen ambient environment to convert the oxide layer to unoxidized copper. Additionally, the oxide layer has a color that is a function of the oxide layer thickness, where the color may be used to estimate the temperature at which the wafer was heated in the ambient oxygen atmosphere.

    Multiple threshold voltage FET using multiple work-function gate materials
    10.
    发明授权
    Multiple threshold voltage FET using multiple work-function gate materials 失效
    多阈值电压FET采用多功能栅极材料

    公开(公告)号:US06448590B1

    公开(公告)日:2002-09-10

    申请号:US09695199

    申请日:2000-10-24

    IPC分类号: H01L2710

    摘要: A shorter gate length FET for very large scale integrated circuit chips is achieved by providing a wafer with multiple threshold voltages. Multiple threshold voltages are developed by combining multiple work function gate materials. The gate materials are geometrically aligned in a predetermined pattern so that each gate material is adjacent to other gate materials. A patterned linear array embodiment is developed for a multiple threshold voltage design. The method of forming a multiple threshold voltage FET requires disposing different gate materials in aligned trenches within a semiconductor wafer, wherein each gate material represents a separate work function. The gate materials are arranged to be in close proximity to one another to accommodate small gate length designs.

    摘要翻译: 通过提供具有多个阈值电压的晶片来实现用于非常大规模集成电路芯片的较短栅长FET。 通过组合多个功能门极材料来开发多个阈值电压。 栅极材料以预定图案几何对准,使得每个栅极材料与其它栅极材料相邻。 开发了用于多阈值电压设计的图案化线性阵列实施例。 形成多阈值电压FET的方法需要在半导体晶片内的对准沟槽中布置不同的栅极材料,其中每个栅极材料表示单独的功函数。 栅极材料被布置成彼此靠近以适应小栅极长度设计。