-
公开(公告)号：US09761615B2
公开(公告)日：2017-09-12
申请号：US14769658
申请日：2014-10-27
Inventor： Xiaohui Jiang , Changjiang Yan , Jiaxiang Zhang
IPC: H01L27/12 , H01L21/77 , H01L21/311 , H01L21/768
CPC classification number: H01L27/1248 , H01L21/31116 , H01L21/31138 , H01L21/76816 , H01L21/77 , H01L27/12 , H01L27/1244 , H01L27/1262 , Y02P80/30
Abstract: An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises: a base substrate (1), thin-film transistors (TFTs), an isolation layer (10) and an organic resin layer (8) formed on the base substrate (1), and a common electrode layer (12) formed on the organic resin layer (8). The isolation layer (10) covers source electrodes (6) and drain electrodes (7) of the TFTs; the organic resin layer (8) covers the isolation layer (10) and is provided with first through holes (9) corresponding to the drain electrodes (7) of the TFTs; the isolation layer (10) is provided with second through holes (11) communicated with the first through holes (9) to expose partial drain electrodes (7); and the dimension of the second through holes (11) is greater than that of the first through holes (9). The array substrate, the manufacturing method thereof and the display device resolve the problem of forming dark dots, ensure the product quality, reduce the waste of production materials, and reduce the production cost.
-
公开(公告)号：US10249734B2
公开(公告)日：2019-04-02
申请号：US14433701
申请日：2014-08-21
Inventor： Xiaohui Jiang , Jiaxiang Zhang
Abstract: A poly-silicon thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The method for manufacturing a poly-silicon thin film transistor includes forming a poly-silicon layer on a base substrate so that the poly-silicon layer includes a first poly-silicon area, second poly-silicon areas located at the both sides of the first poly-silicon area and third poly-silicon areas located at a side of the second poly-silicon areas away from the first poly-silicon area; forming a barrier layer between a gate electrode and a gate insulation layer by a dry etching method so that the barrier layer corresponds to the first poly-silicon area; and with the barrier layer as a mask doping the second poly-silicon areas to form lightly doped areas. By this method, the lightly doped areas may have the same length, and thus the problem of excessive leakage current is avoided.
-
公开(公告)号：US10002889B2
公开(公告)日：2018-06-19
申请号：US14443777
申请日：2014-10-28
Inventor： Jiaxiang Zhang , Xiaohui Jiang , Changjiang Yan
IPC: H01L27/12 , H01L29/786 , H01L29/423 , H01L29/417 , H01L21/77
CPC classification number: H01L27/1248 , H01L21/77 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1262 , H01L27/1274 , H01L29/41733 , H01L29/42384 , H01L29/78633 , H01L29/78645
Abstract: The present invention provides a low-temperature polysilicon thin film transistor array substrate and a method of fabricating the same, and a display device. The array substrate comprises: a substrate; a polysilicon active layer provided on the substrate; a first insulation layer provided on the active layer; a plurality of gates and a gate line provided on the first insulation layer; a second insulation layer provided on the gates; a source, a drain, a data line and a pixel electrode electrically connected with the drain, which are provided on the second insulation layer, the source covers the plurality of gates. The plurality of gates are provided directly below the source, so that the leakage current is reduced and the aperture ratio of panel is improved.
-
公开(公告)号：US09972546B2
公开(公告)日：2018-05-15
申请号：US13984342
申请日：2013-03-12
Inventor： Tiansheng Li , Changjiang Yan , Shaoying Xu , Zhenyu Xie , Xiaohui Jiang
CPC classification number: H01L22/10 , G01N21/59 , H01L21/67253 , H01L22/12 , H01L22/26 , H01L2924/0002 , H01L2924/00
Abstract: An etching time detection means and an etching time detection method for an etching device. The detection means comprises: a light wave emitter fixed on one substrate of the etching device, a light wave receiver fixed on another substrate and opposed to the light wave emitter, a detection system communicated with the light wave emitter and the light wave receiver for receiving light intensity signals and calculating etching time. With the detection means and the detection method, the automatical detection of etching time can be achieved and the deviation caused by visual observation can be effectively avoided.
-
公开(公告)号：US09171879B2
公开(公告)日：2015-10-27
申请号：US14123992
申请日：2012-11-16
Inventor： Tiansheng Li , Xiaohui Jiang , Shaoying Xu , Zhenyu Xie
IPC: H01L27/146
CPC classification number: H01L27/14687 , H01L27/14612 , H01L27/14643 , H01L27/14658 , H01L27/14689 , H01L27/14692
Abstract: A method for fabricating a sensor, comprising: forming a pattern of a bias line on a base substrate by using a first patterning process; forming a pattern of a transparent electrode, a pattern of a photodiode, a pattern of a receive electrode, a pattern of a source electrode, a pattern of a drain electrode, a pattern of a data line and a pattern of an ohmic layer by using a second patterning process; forming a pattern of an active layer, a pattern of a first passivation layer, a pattern of a gate electrode and a pattern of a gate line by using a third patterning process. The above method reduces the number of used mask in the fabrication processes as well as the production cost and simplifies the production process, thereby significantly improves the production capacity and the yield rate.
Abstract translation: 一种用于制造传感器的方法，包括：通过使用第一图案化工艺在基底基板上形成偏置线图案; 通过使用透明电极的图案，光电二极管的图案，接收电极的图案，源极的图案，漏极的图案，数据线的图案和欧姆层的图案 第二图案化过程; 通过使用第三图案化工艺形成有源层的图案，第一钝化层的图案，栅电极的图案和栅极线的图案。 上述方法减少了制造工艺中使用的掩模的数量以及生产成本，并简化了生产过程，从而显着提高了生产能力和产量。
-
Patent Agency Ranking
6.发明申请THIN FILM TRANSISTOR, METHOD FOR FABRICATING THE SAME, ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开薄膜晶体管，其制造方法，阵列基板和显示装置公开(公告)号：US20150214254A1
公开(公告)日：2015-07-30
申请号：US14361751
申请日：2013-12-12
Inventor： Changjiang Yan , Xiaowei Jiang , Xiaohui Jiang , Zhenyu Xie , Xu Cchen
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L29/78633 , H01L27/1262 , H01L29/41733 , H01L29/45 , H01L29/458 , H01L29/66969 , H01L29/7869
Abstract: A thin film transistor (TFT), a method for fabricating the same, an array substrate and a display device are provided. The TFT includes a source electrode and a drain electrode, a semiconductor active layer, a gate insulating layer and a gate electrode. The TFT further includes a light-shielding layer between the source electrode and the drain electrode. The light-shielding layer separates the source electrode and the drain electrode, and the light-shielding layer is disposed on a light incident side of the semiconductor active layer and is used to prevent the incident light from irradiating on the semiconductor active layer.
Abstract translation: 提供薄膜晶体管（TFT），其制造方法，阵列基板和显示装置。 TFT包括源电极和漏电极，半导体有源层，栅极绝缘层和栅电极。 TFT还包括在源电极和漏电极之间的遮光层。 遮光层分离源电极和漏电极，并且遮光层设置在半导体有源层的光入射侧，并用于防止入射光照射在半导体有源层上。
-
7.发明申请CAPACITIVE TOUCH PANEL, DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE TOUCH PANEL 有权电容触控面板，显示装置及制造触控面板的方法公开(公告)号：US20150145811A1
公开(公告)日：2015-05-28
申请号：US14345040
申请日：2013-07-10
Inventor： Jiaxiang Zhang , Xiaohui Jiang , Jian Guo , Xu Chen
CPC classification number: G06F3/044 , C23F1/02 , G06F2203/04103 , G06F2203/04112 , H05K3/06
Abstract: An embodiment of the present application discloses a capacitive touch panel including a base substrate, on which a plurality of transparent conductive patters being capable of transmitting touch signals and not overlapping with each are provided, and each transparent conductive pattern is an integrated pattern made of a same material layer. An embodiment of the present application further provides a method for manufacturing a capacitive touch panel, which includes forming a plurality of transparent conductive patterns on a base substrate through one mask patterning process. An embodiment of the present application further includes a display device comprising the capacitive touch panel as described above. An embodiment of the present application can save masks and can manufacture capacitive touch panels at a low cost. Furthermore, the embodiments of the present application have advantages of high production efficiency and of high yield rate.
Abstract translation: 本申请的一个实施方案公开了一种电容式触摸屏，其包括基底，多个透明导电图案能够传输触摸信号并且不与每个透明导电图案重叠，并且每个透明导电图案是由 相同的材料层。 本申请的实施例还提供了一种用于制造电容式触摸屏的方法，其包括通过一个掩模图案化工艺在基底衬底上形成多个透明导电图案。 本申请的实施例还包括包括如上所述的电容式触摸面板的显示装置。 本申请的实施例可以节省掩模并且可以以低成本制造电容式触摸面板。 此外，本申请的实施方案具有生产效率高，产率高的优点。
-
8.发明授权公开(公告)号：US10043911B2
公开(公告)日：2018-08-07
申请号：US14361751
申请日：2013-12-12
Inventor： Changjiang Yan , Xiaowei Jiang , Xiaohui Jiang , Zhenyu Xie , Xu Chen
IPC: H01L29/786 , H01L29/417 , H01L29/45 , H01L27/12 , H01L29/66
Abstract: A thin film transistor (TFT), a method for fabricating the same, an array substrate and a display device are provided. The TFT includes a source electrode and a drain electrode, a semiconductor active layer, a gate insulating layer and a gate electrode. The TFT further includes a light-shielding layer between the source electrode and the drain electrode. The light-shielding layer separates the source electrode and the drain electrode, and the light-shielding layer is disposed on a light incident side of the semiconductor active layer and is used to prevent the incident light from irradiating on the semiconductor active layer.
-
公开(公告)号：US20150303225A1
公开(公告)日：2015-10-22
申请号：US14439999
申请日：2014-09-05
Inventor： Xiaohui Jiang , Jian Guo , Tiansheng Li
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/1262 , G02F1/136286 , G02F1/1368 , G02F2001/136295 , H01L27/124 , H01L27/1288 , H01L29/66765
Abstract: An array substrate and a fabrication method thereof and a display device are provided. The fabrication method comprises: preparing a base substrate, the base substrate including a pixel region and a gate on array region; forming a pattern including a gate electrode and a pattern of an active layer on the base substrate, and forming a gate lead on the gate on array region, by a first patterning process; forming a pattern of a gate insulating layer by a second patterning process; forming a pattern including a source/drain electrode by a third patterning process; forming a pattern of a planarization layer by a fourth patterning layer; and forming a pattern including a pixel electrode by a fifth patterning layer.
Abstract translation: 提供阵列基板及其制造方法和显示装置。 所述制造方法包括：准备基底基板，所述基底基板包括像素区域和阵列区域上的栅极; 在基底基板上形成包括栅电极和有源层图形的图案，并通过第一图案化工艺在阵列区上的栅极上形成栅极引线; 通过第二图案化工艺形成栅极绝缘层的图案; 通过第三图案化工艺形成包括源极/漏极的图案; 通过第四图案形成层形成平坦化层的图案; 以及通过第五图案形成层形成包括像素电极的图案。
-
10.发明申请公开(公告)号：US20150279870A1
公开(公告)日：2015-10-01
申请号：US14437016
申请日：2014-07-22
Inventor： Xiaohui Jiang
IPC: H01L27/12 , H01L29/51 , H01L29/423 , H01L29/24 , H01L21/4757 , H01L21/477 , H01L21/768 , H01L21/441 , H01L29/49 , H01L29/786 , H01L29/66
CPC classification number: H01L27/1248 , H01L21/28008 , H01L21/441 , H01L21/47573 , H01L21/477 , H01L21/76897 , H01L27/127 , H01L27/1288 , H01L29/24 , H01L29/42384 , H01L29/4908 , H01L29/512 , H01L29/517 , H01L29/518 , H01L29/66969 , H01L29/7869
Abstract: The present invention provides an array substrate, a method for manufacturing the same, and a display device, and relates to the field of a technology for manufacturing a display device. The present invention can solve the problem of high power consumption of an existing array substrate. The array substrate according to the present invention includes a gate, an active layer, and a gate insulating layer separating the gate and the active layer from each other. The gate insulating layer includes a two-layer structure consisted of an organic resin material layer and a protection layer. The organic resin material layer is in contact with the gate; and the protection layer is in contact with the active layer.
Abstract translation: 本发明提供一种阵列基板及其制造方法以及显示装置，涉及显示装置的制造技术领域。 本发明可以解决现有阵列基板的高功耗问题。 根据本发明的阵列基板包括将栅极和有源层彼此分离的栅极，有源层和栅极绝缘层。 栅绝缘层包括由有机树脂材料层和保护层组成的两层结构。 有机树脂材料层与栅极接触; 保护层与有源层接触。
-
-
-
-
-
-
-
-
-
Search Results
22
records
(took 0.017 seconds)
