公开(公告)号：US09728562B2

公开(公告)日：2017-08-08

申请号：US15088296

申请日：2016-04-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jian Min

IPC: H01L21/02 ,  H01L27/12

CPC classification number: H01L27/1285 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02675 ,  H01L21/02678 ,  H01L21/0268 ,  H01L21/02691

Abstract: A manufacturing method and apparatus of low temperature polycrystalline silicon, and a polycrystalline silicon are provided. The manufacturing method of low temperature polycrystalline silicon includes forming an amorphous silicon layer on a substrate; scanning the amorphous silicon layer by using a laser to emit a strip-shaped laser beam to go through a mask which includes transmissive stripes and partially-transmissive stripes arranged alternately, to form low temperature fusion regions and high temperature fusion regions which are arranged alternately on the amorphous silicon layer; recrystallizing the amorphous silicon layer from the low temperature fusion regions to the high temperature fusion regions.

公开(公告)号：US20160336358A1

公开(公告)日：2016-11-17

申请号：US15088296

申请日：2016-04-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jian Min

IPC: H01L27/12

CPC classification number: H01L27/1285 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02675 ,  H01L21/02678 ,  H01L21/0268 ,  H01L21/02691

Abstract: A manufacturing method and apparatus of low temperature polycrystalline silicon, and a polycrystalline silicon are provided. The manufacturing method of low temperature polycrystalline silicon includes forming an amorphous silicon layer on a substrate; scanning the amorphous silicon layer by using a laser to emit a strip-shaped laser beam to go through a mask which includes transmissive stripes and partially-transmissive stripes arranged alternately, to form low temperature fusion regions and high temperature fusion regions which are arranged alternately on the amorphous silicon layer; recrystallizing the amorphous silicon layer from the low temperature fusion regions to the high temperature fusion regions.

Abstract translation: 提供了低温多晶硅和多晶硅的制造方法和装置。 低温多晶硅的制造方法包括在基板上形成非晶硅层; 通过使用激光来扫描非晶硅层以发射带状激光束以通过包括交替布置的透射条纹和部分透射条纹的掩模，以形成交替地布置的低温熔融区域和高温熔融区域 非晶硅层; 将非晶硅层从低温熔融区域重结晶到高温熔融区域。

公开(公告)号：US10164214B2

公开(公告)日：2018-12-25

申请号：US15714081

申请日：2017-09-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ping Song ,  Feifei Wang ,  Youwei Wang ,  Peng Cai ,  Jian Min

IPC: H01L29/08 ,  H01L51/52 ,  H01L27/32 ,  H01L51/00 ,  H01L51/56

Abstract: The disclosure provides a display panel and a method for manufacturing the same. The display panel includes: an underlying substrate; thin film transistors, a light emission layer, a first inorganic moisture-blocking layer successively arranged on the underlying substrate; an organic buffer layer arranged on the first inorganic moisture-blocking layer, the organic buffer layer comprises: droplet micro-structures for decentralizing a stress on the organic buffer layer; a second inorganic moisture-blocking layer arranged on the organic buffer layer; and a blocking layer, and a glass cover plate successively arranged on the second inorganic moisture-blocking layer.

公开(公告)号：US10355107B2

公开(公告)日：2019-07-16

申请号：US15543726

申请日：2016-07-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jian Min ,  Xiaolong Li ,  Tao Gao ,  Liangjian Li ,  Zhengyin Xu

IPC: H01L21/02 ,  H01L21/30 ,  H01L27/12 ,  H01L29/36 ,  H01L29/66 ,  H01L21/027 ,  H01L29/786

Abstract: The present application discloses a method of fabricating a polycrystalline silicon thin film transistor, the method including forming an amorphous silicon layer on a base substrate having a pattern corresponding to a polycrystalline silicon active layer of the thin film transistor; the amorphous silicon layer having a first region corresponding to a source electrode and drain electrode contact region in the polycrystalline silicon active layer and a second region corresponding to a channel region in the polycrystalline silicon active layer; forming a first dopant layer on a side of the second region distal to the base substrate; forming a second dopant layer on a side of the first region distal to the base substrate; and crystallizing the amorphous silicon layer, the first dopant layer, and the second dopant layer to form the polycrystalline silicon active layer, the polycrystalline silicon active layer being doped with a dopant of the first dopant layer in the second region and doped with a dopant of the second dopant layer in the first region during the step of crystallizing the amorphous silicon layer.

公开(公告)号：US10249735B2

公开(公告)日：2019-04-02

申请号：US15236696

申请日：2016-08-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jian Min ,  Xiaolong Li ,  Zhengyin Xu ,  Ping Song ,  Youwei Wang

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/28 ,  H01L21/3105 ,  H01L27/12 ,  H01L29/786 ,  H01L29/423

Abstract: The present disclosure provides a TFT, its manufacturing method, an array substrate and a display device. The method includes steps of: forming a pattern of a gate electrode on a base substrate; forming a gate insulation layer with an even surface; forming a pattern of a polysilicon semiconductor layer; and forming patterns of a source electrode and a drain electrode. The step of forming the pattern of the polysilicon semiconductor layer includes: crystallizing the amorphous silicon layer, so as to form the polysilicon semiconductor layer.

公开(公告)号：US10355022B2

公开(公告)日：2019-07-16

申请号：US15393030

申请日：2016-12-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jian Min ,  Xiaolong Li ,  Zhengyin Xu ,  Tao Gao ,  Dong Li ,  Shuai Zhang

IPC: H01L27/12 ,  H01L29/78 ,  H01L21/00 ,  H01L29/786

Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The method comprises forming an active layer on a substrate, wherein source-and-drain-to-be-formed regions of the active layer are thicker than a semiconductor region between the source-and-drain-to-be-formed regions, and by a patterning process, forming a gate on the active layer, and forming a pattern of source and drain in the source-and-drain-to-be-formed regions of the active layer.

公开(公告)号：US09923075B2

公开(公告)日：2018-03-20

申请号：US15322461

申请日：2015-10-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jian Min

IPC: H01L29/76 ,  H01L29/45 ,  H01L29/786 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L29/458 ,  H01L21/28525 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76895 ,  H01L29/45 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78675

Abstract: A low temperature poly-silicon thin film transistor and a manufacturing method thereof are disclosed. The method includes forming an active layer on a base substrate, forming an ohmic contact layer on the active layer through an atomic layer deposition process, and forming a source electrode and a drain electrode on the ohmic contact layer. The ohmic contact layer includes a plurality of conductive ionic layers and a plurality of monocrystalline silicon layers/poly-silicon layers. The source electrode and the drain electrode are in contact with the active layer through the ohmic contact layer.

公开(公告)号：US20170194461A1

公开(公告)日：2017-07-06

申请号：US15350844

申请日：2016-11-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong Li ,  Zheng Liu ,  Dong Li ,  Huijuan Zhang ,  Jian Min

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/786 ,  H01L21/3065

CPC classification number: H01L29/66757 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/3065 ,  H01L21/32115 ,  H01L21/32132 ,  H01L29/78675

Abstract: A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0° and less than 90°.

公开(公告)号：US09985116B2

公开(公告)日：2018-05-29

申请号：US15350844

申请日：2016-11-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong Li ,  Zheng Liu ,  Dong Li ,  Huijuan Zhang ,  Jian Min

IPC: H01L21/00 ,  H01L29/66 ,  H01L21/3065 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66757 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/3065 ,  H01L21/32115 ,  H01L21/32132 ,  H01L29/78675

Abstract: A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0° and less than 90°.