公开(公告)号：US06547452B1

公开(公告)日：2003-04-15

申请号：US09568978

申请日：2000-05-11

申请人： Benson Chan ,  Paul F. Fortier ,  Francois M. Guindon ,  Glen W. Johnson ,  Martial A. Letourneau ,  John H. Sherman ,  Real Tetreault

发明人： Benson Chan ,  Paul F. Fortier ,  Francois M. Guindon ,  Glen W. Johnson ,  Martial A. Letourneau ,  John H. Sherman ,  Real Tetreault

IPC分类号： G02B636

CPC分类号： B29C45/14655 ,  B29C45/14065 ,  G02B6/4201 ,  G02B6/421 ,  G02B6/423 ,  G02B6/4231 ,  G02B6/4239 ,  G02B6/4255 ,  G02B6/4277 ,  G02B6/4281 ,  G02B6/4283 ,  G02B6/4292

摘要： Alignment systems for optoelectronic modules with overmolded chip carriers include drilled or milled substrate corners for engaging dowel pins to precisely align the substrate in a mold for molding an overmold frame on the substrate. The overmold frame includes slot and trilobe holes for receiving retainer posts to precisely align a retainer assembly on the overmold frame. Cooperating standoff pads on the overmold frame and on the retainer assembly stabilize the assembly of these components and provide a precise gap for receiving an adhesive to permanently attach these two components. The retainer assembly carries optoelectronic components that include a flexible circuit, and a distal end portion of this flexible circuit and walls of a receiving cavity in the overmold frame have cooperating features for precisely aligning distal electrical leads of the flexible circuit with an array of electrical pads on the substrate. A permanent shroud on a proximate end portion of the flexible circuit protects and helps align proximate electrical leads with electrical pads on optic dies and their carriers.

摘要翻译： 用于具有包覆成型芯片载体的光电子模块的对准系统包括用于接合定位销的钻孔或铣削基板拐角，以将基板精确地对准模具中用于模制基板上的二次模制框架。 包覆模制框架包括用于接收保持器柱的狭槽和三叶孔，以将保持器组件精确对准在包覆模制框架上。 包覆模制框架和保持器组件上的合作支座稳定了这些组件的组装，并提供了一个精确的间隙，用于接收粘合剂以永久地附接这两个部件。 保持器组件携载包括柔性电路的光电子部件，并且该柔性电路的远端部分和包覆模制框架中的接收腔的壁具有用于将柔性电路的远端电引线与电极焊盘阵列精确对准的配合特征 在基板上。 柔性电路的近端部分上的永久性护罩保护并有助于使邻近的电引线与光学管芯及其载体上的电焊盘对准。

公开(公告)号：US06712527B1

公开(公告)日：2004-03-30

申请号：US09481903

申请日：2000-01-12

申请人： Benson Chan ,  Mitchell S. Cohen ,  Paul F. Fortier ,  Ladd W. Freitag ,  Richard R. Hall ,  Glen W. Johnson ,  How Tzu Lin ,  John H. Sherman

发明人： Benson Chan ,  Mitchell S. Cohen ,  Paul F. Fortier ,  Ladd W. Freitag ,  Richard R. Hall ,  Glen W. Johnson ,  How Tzu Lin ,  John H. Sherman

IPC分类号： G02B636

CPC分类号： G02B6/4201 ,  G02B6/3885 ,  G02B6/421 ,  G02B6/4246 ,  G02B6/4261 ,  G02B6/4268 ,  G02B6/4277 ,  G02B6/4281 ,  G02B6/4283 ,  G02B6/4292 ,  H05K1/189

摘要： A package is described that couples a twelve channel wide fiber optic cable to a twelve channel Vertical Cavity Surface Emitting Laser (VCSEL) transmitter and a multiple channel Perpendicularly Aligned Integrated Die (PAID) receiver. The package allows for reduction in the height of the assembly package by vertically orienting certain dies parallel to the fiber optic cable and horizontally orienting certain other dies. The assembly allows the vertically oriented optoelectronic dies to be perpendicularly attached to the horizontally oriented laminate via a flexible circuit.

摘要翻译： 描述了将十二通道宽光纤电缆耦合到十二通道垂直腔面发射激光器（VCSEL）发射器和多通道垂直对准集成管芯（PAID）接收器的封装。 该封装允许通过垂直定向平行于光纤电缆的某些管芯并水平地定向某些其他管芯来降低组件封装的高度。 组件允许垂直定向的光电管芯通过柔性电路垂直地附接到水平取向的层压板。

公开(公告)号：US06652159B2

公开(公告)日：2003-11-25

申请号：US09894934

申请日：2001-06-28

申请人： Benson Chan ,  Paul F. Fortier ,  Francois Guindon ,  Glen Walden Johnson ,  Joseph Kuczynski ,  Gerald Daniel Malagrino, Jr. ,  James Robert Moon ,  David Roy Motschman ,  John Henry Sherman

发明人： Benson Chan ,  Paul F. Fortier ,  Francois Guindon ,  Glen Walden Johnson ,  Joseph Kuczynski ,  Gerald Daniel Malagrino, Jr. ,  James Robert Moon ,  David Roy Motschman ,  John Henry Sherman

IPC分类号： G02B642

CPC分类号： G02B6/4277 ,  G02B6/3849 ,  G02B6/4201 ,  G02B6/421 ,  G02B6/4246 ,  G02B6/4292

摘要： An optical transceiver arrangement includes a retainer assembly. The retainer assembly includes at least one housing adapted to be coupled to a fiber optic cable, and at least one carrier assembly having a carrier, and a die chip attached to the carrier. The die chip has at least one active region. The optical transceiver arrangement further includes at least one optical coupler disposed within the housing for optically coupling the at least one active region to the fiber optic cable. The optical transceiver arrangement also includes a laminate assembly having the retainer assembly disposed thereon. The die chip is electrically coupled to the laminate assembly.

摘要翻译： 光收发器装置包括保持器组件。 保持器组件包括适于联接到光纤电缆的至少一个壳体，以及具有载体的至少一个载体组件和附接到载体的芯片芯片。 芯片芯片具有至少一个有源区域。 光收发器装置还包括设置在壳体内的至少一个光耦合器，用于将至少一个有源区域光耦合到光纤电缆。 光收发器装置还包括其上设置有保持器组件的层压组件。 芯片芯片电耦合到层叠组件。

公开(公告)号：US06516129B2

公开(公告)日：2003-02-04

申请号：US09893812

申请日：2001-06-28

申请人： Benson Chan ,  Paul F. Fortier ,  Francois Guindon ,  Gerald Daniel Malagrino, Jr. ,  James Robert Moon ,  James Earl Olson ,  John Henry Sherman

发明人： Benson Chan ,  Paul F. Fortier ,  Francois Guindon ,  Gerald Daniel Malagrino, Jr. ,  James Robert Moon ,  James Earl Olson ,  John Henry Sherman

IPC分类号： G02B600

CPC分类号： G02B6/42 ,  G02B6/3807 ,  G02B6/4251 ,  G02B6/4255 ,  G02B6/4261 ,  G02B2006/4297

摘要： A plug which has a plugging portion and a stem extending therefrom is formed of an elastomeric material in order to deform to create a wiping engagement and a seal with the walls of a receiving cavity. The stem and plugging portion include both cavities for receiving alignment pins in the device being plugged and a manually engageable portion on a distal end of the stem for removing the plug from the sealed cavity, such as within an optical subassembly module. The side edges of the plugging member conform to the cavity cross-section to enhance the sealing yet do not unduly deform the member. The sealing member is formed with one or more standoffs to engage an end face of the cavity, assuring no contact between the optical elements and the plug. The edges of the plug deform upon insertion to create the seal and form a wiping engagement with the cavity interior.

摘要翻译： 具有堵塞部分和从其延伸的杆的塞子由弹性体材料形成，以便变形以产生与接收腔壁的擦拭接合和密封。 杆和堵塞部分包括用于接收被堵塞的装置中的对准销的两个空腔和用于从密封空腔（例如在光学子组件模块内）移除插头的杆的远端上的可手动接合部分。 堵塞构件的侧边缘符合空腔横截面以增强密封，但不要使构件过度变形。 密封构件形成有一个或多个支座以接合空腔的端面，确保光学元件和插头之间没有接触。 插头的边缘在插入时变形以产生密封并与腔体内部形成擦拭接合。

公开(公告)号：US20120292375A1

公开(公告)日：2012-11-22

申请号：US13566467

申请日：2012-08-03

申请人： Pascal P. Blais ,  Paul F. Fortier ,  Kang-Wook Lee ,  Jae-Woong Nah ,  Soojae Park ,  Robert L. Toutant ,  Alain A. Warren

发明人： Pascal P. Blais ,  Paul F. Fortier ,  Kang-Wook Lee ,  Jae-Woong Nah ,  Soojae Park ,  Robert L. Toutant ,  Alain A. Warren

IPC分类号： B23K37/04

CPC分类号： B23K1/0016 ,  H01L21/563 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/73204 ,  H01L2224/75704 ,  H01L2224/75985 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15787 ,  H01L2924/3511 ,  H01L2924/01026 ,  H01L2924/00

摘要： A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.

摘要翻译： 公开了一种用于制造芯片组件的方法和装置，其防止或减少在芯片组装过程中可能发生的Si芯片中后端的超低k电介质的开裂和分层。 该方法和装置在芯片接合过程期间对基板的顶表面和底表面施加压力，使得组装的模块的弯曲和翘曲减小。 减小的弯曲和翘曲防止或减少超低k电介质的开裂和分层。

公开(公告)号：US20110049221A1

公开(公告)日：2011-03-03

申请号：US12551960

申请日：2009-09-01

申请人： Pascal P. Blais ,  Paul F. Fortier ,  Kang-Wook Lee ,  Jae-Woong Nah ,  Soojae Park ,  Robert L. Toutant ,  Alain A. Warren

发明人： Pascal P. Blais ,  Paul F. Fortier ,  Kang-Wook Lee ,  Jae-Woong Nah ,  Soojae Park ,  Robert L. Toutant ,  Alain A. Warren

IPC分类号： B23K37/04 ,  B23K31/00

CPC分类号： B23K1/0016 ,  H01L21/563 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/73204 ,  H01L2224/75704 ,  H01L2224/75985 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15787 ,  H01L2924/3511 ,  H01L2924/01026 ,  H01L2924/00

摘要： A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.

摘要翻译： 公开了一种用于制造芯片组件的方法和装置，其防止或减少在芯片组装过程中可能发生的Si芯片中后端的超低k电介质的开裂和分层。 该方法和装置在芯片接合过程期间对基板的顶表面和底表面施加压力，使得组装的模块的弯曲和翘曲减小。 减少弯曲和翘曲防止或减少超低k电介质的开裂和分层。