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公开(公告)号：US20110049221A1
公开(公告)日：2011-03-03
申请号：US12551960
申请日：2009-09-01
申请人： Pascal P. Blais , Paul F. Fortier , Kang-Wook Lee , Jae-Woong Nah , Soojae Park , Robert L. Toutant , Alain A. Warren
发明人： Pascal P. Blais , Paul F. Fortier , Kang-Wook Lee , Jae-Woong Nah , Soojae Park , Robert L. Toutant , Alain A. Warren
CPC分类号： B23K1/0016 , H01L21/563 , H01L24/75 , H01L24/81 , H01L2224/13099 , H01L2224/131 , H01L2224/73204 , H01L2224/75704 , H01L2224/75985 , H01L2224/81005 , H01L2224/81191 , H01L2224/81815 , H01L2224/8191 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01076 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/15787 , H01L2924/3511 , H01L2924/01026 , H01L2924/00
摘要： A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.
摘要翻译： 公开了一种用于制造芯片组件的方法和装置，其防止或减少在芯片组装过程中可能发生的Si芯片中后端的超低k电介质的开裂和分层。 该方法和装置在芯片接合过程期间对基板的顶表面和底表面施加压力，使得组装的模块的弯曲和翘曲减小。 减少弯曲和翘曲防止或减少超低k电介质的开裂和分层。
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公开(公告)号：US20120292375A1
公开(公告)日：2012-11-22
申请号：US13566467
申请日：2012-08-03
申请人： Pascal P. Blais , Paul F. Fortier , Kang-Wook Lee , Jae-Woong Nah , Soojae Park , Robert L. Toutant , Alain A. Warren
发明人： Pascal P. Blais , Paul F. Fortier , Kang-Wook Lee , Jae-Woong Nah , Soojae Park , Robert L. Toutant , Alain A. Warren
IPC分类号： B23K37/04
CPC分类号： B23K1/0016 , H01L21/563 , H01L24/75 , H01L24/81 , H01L2224/13099 , H01L2224/131 , H01L2224/73204 , H01L2224/75704 , H01L2224/75985 , H01L2224/81005 , H01L2224/81191 , H01L2224/81815 , H01L2224/8191 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01076 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/15787 , H01L2924/3511 , H01L2924/01026 , H01L2924/00
摘要： A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.
摘要翻译： 公开了一种用于制造芯片组件的方法和装置，其防止或减少在芯片组装过程中可能发生的Si芯片中后端的超低k电介质的开裂和分层。 该方法和装置在芯片接合过程期间对基板的顶表面和底表面施加压力，使得组装的模块的弯曲和翘曲减小。 减小的弯曲和翘曲防止或减少超低k电介质的开裂和分层。
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公开(公告)号：US09393633B2
公开(公告)日：2016-07-19
申请号：US12551960
申请日：2009-09-01
申请人： Pascal P Blais , Paul F Fortier , Kang-Wook Lee , Jae-Woong Nah , Soojae Park , Robert L Toutant , Alain A Warren
发明人： Pascal P Blais , Paul F Fortier , Kang-Wook Lee , Jae-Woong Nah , Soojae Park , Robert L Toutant , Alain A Warren
CPC分类号： B23K1/0016 , H01L21/563 , H01L24/75 , H01L24/81 , H01L2224/13099 , H01L2224/131 , H01L2224/73204 , H01L2224/75704 , H01L2224/75985 , H01L2224/81005 , H01L2224/81191 , H01L2224/81815 , H01L2224/8191 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01076 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/15787 , H01L2924/3511 , H01L2924/01026 , H01L2924/00
摘要： A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.
摘要翻译： 公开了一种用于制造芯片组件的方法和装置，其防止或减少在芯片组装过程中可能发生的Si芯片中后端的超低k电介质的开裂和分层。 该方法和装置在芯片接合过程期间对基板的顶表面和底表面施加压力，使得组装的模块的弯曲和翘曲减小。 减少弯曲和翘曲防止或减少超低k电介质的开裂和分层。
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公开(公告)号：US09808874B2
公开(公告)日：2017-11-07
申请号：US13613000
申请日：2012-09-13
IPC分类号： B23K1/00 , B23K35/36 , B23K35/362
CPC分类号： B23K1/0016 , B23K35/3601 , B23K35/362
摘要： The present invention is directed to a soldering method for joining objects is also provided, comprising the steps of applying a flux composition to at least a portion of one or more of the objects, and joining the objects.
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公开(公告)号：US09579738B2
公开(公告)日：2017-02-28
申请号：US13034932
申请日：2011-02-25
IPC分类号： B23K1/00 , B23K35/36 , B23K35/362
CPC分类号： B23K1/0016 , B23K35/3601 , B23K35/362
摘要： The present invention is directed to flux compositions. One composition comprises an activator, a medium-viscosity solvent being a polymer, and a high-viscosity solvent being a copolymer containing first monomers and second monomers. Another composition comprises an activator, and a high-viscosity solvent comprising a copolymer containing first monomers and second monomers. Another composition comprises an activator of 6-12 percent by weight of glutaric acid, pimelic acid, tartaric acid, or mixtures thereof, and a medium-viscosity solvent of 88-94 percent by weight comprising a polymer with hydroxyl end groups. Another composition comprises an activator in a liquid state comprising poly(ethylene glycol)-diacid, and a medium-viscosity solvent comprising a polymer with hydroxyl end groups.
摘要翻译： 本发明涉及助焊剂组合物。 一种组合物包含活化剂，中等粘度溶剂为聚合物，高粘度溶剂为包含第一单体和第二单体的共聚物。 另一组合物包含活化剂和包含含有第一单体和第二单体的共聚物的高粘度溶剂。 另一组合物包含6-12重量％的戊二酸，庚二酸，酒石酸或其混合物的活化剂和88-94重量％的中等粘度溶剂，其包含具有羟基端基的聚合物。 另一种组合物包含液态的活化剂，其包含聚（乙二醇） - 二酸，以及包含具有羟基端基的聚合物的中等粘度溶剂。
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公开(公告)号：US20120217289A1
公开(公告)日：2012-08-30
申请号：US13034932
申请日：2011-02-25
IPC分类号： B23K35/363 , B23K1/20
CPC分类号： B23K1/0016 , B23K35/3601 , B23K35/362
摘要： The present invention is directed to flux compositions and uses thereof. One composition comprises an activator, a medium-viscosity solvent being a polymer, and a high-viscosity solvent being a copolymer containing first monomers and second monomers. Another composition comprises an activator, and a high-viscosity solvent comprising a copolymer containing first monomers and second monomers. Another composition comprises an activator of 6-12 percent by weight of glutaric acid, pimelic acid, tartaric acid, or mixtures thereof, and a medium-viscosity solvent of 88-94 percent by weight comprising a polymer with hydroxyl end groups. Another composition comprises an activator in a liquid state comprising poly(ethylene glycol)-diacid, and a medium-viscosity solvent comprising a polymer with hydroxyl end groups. A soldering method for joining objects is also provided, comprising the steps of applying a flux composition to at least a portion of one or more of the objects, and joining the objects.
摘要翻译： 本发明涉及助焊剂组合物及其用途。 一种组合物包含活化剂，中等粘度溶剂为聚合物，高粘度溶剂为包含第一单体和第二单体的共聚物。 另一组合物包含活化剂和包含含有第一单体和第二单体的共聚物的高粘度溶剂。 另一组合物包含6-12重量％的戊二酸，庚二酸，酒石酸或其混合物的活化剂和88-94重量％的中等粘度溶剂，其包含具有羟基端基的聚合物。 另一种组合物包含液态的活化剂，其包含聚（乙二醇） - 二酸，以及包含具有羟基端基的聚合物的中等粘度溶剂。 还提供了一种用于接合物体的焊接方法，包括以下步骤：将焊剂组合物施加到一个或多个物体的至少一部分，并且连接物体。
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公开(公告)号：US20130001279A1
公开(公告)日：2013-01-03
申请号：US13613000
申请日：2012-09-13
IPC分类号： B23K31/02
CPC分类号： B23K1/0016 , B23K35/3601 , B23K35/362
摘要： The present invention is directed to a soldering method for joining objects is also provided, comprising the steps of applying a flux composition to at least a portion of one or more of the objects, and joining the objects.
摘要翻译： 本发明还涉及一种用于接合物体的焊接方法，其包括以下步骤：将焊剂组合物施加到一个或多个物体的至少一部分上并连接物体。
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公开(公告)号：US09343423B2
公开(公告)日：2016-05-17
申请号：US14526268
申请日：2014-10-28
IPC分类号： H01L21/50 , H01L21/48 , H01L23/00 , H01L23/498 , H01L21/463 , H01L23/544
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another.
摘要翻译： 预组装半导体器件包括半导体芯片上的芯片焊接结构和对应于芯片焊接结构的衬底上的衬底焊接结构。 衬底焊接结构朝着芯片焊接结构延伸，以形成与芯片焊接结构的焊接连接。 芯片和衬底相对于彼此处于预组装位置。 基板焊接结构的高度大于芯片焊接结构的高度。 预先施加的底部填充物与基底相邻并且足够厚以便基本上不超过基底焊接结构的全高度延伸。 在另一个实施例中，芯片焊接结构的高度大于衬底焊接结构的高度，并且预先施加的底部填充物与半导体芯片邻接并且足够厚以便基本上不超过芯片焊接的全部高度 结构。 一种方法包括通过将芯片和衬底彼此焊接来从这些器件制造半导体组件。
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公开(公告)号：US09082754B2
公开(公告)日：2015-07-14
申请号：US13565982
申请日：2012-08-03
申请人： Peter A. Gruber , Jae-Woong Nah
发明人： Peter A. Gruber , Jae-Woong Nah
IPC分类号： H01L21/44 , H01L23/48 , H01L23/00 , B23K3/06 , H01L23/498 , H01L21/48 , B23K1/00 , B23K26/38 , B23K26/40
CPC分类号： H01L23/48 , B23K1/0016 , B23K3/0607 , B23K3/0623 , B23K26/384 , B23K26/389 , B23K26/40 , B23K2101/42 , B23K2103/16 , H01L21/4853 , H01L23/14 , H01L23/147 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/0345 , H01L2224/03464 , H01L2224/0347 , H01L2224/0401 , H01L2224/056 , H01L2224/11003 , H01L2224/11005 , H01L2224/111 , H01L2224/1112 , H01L2224/11436 , H01L2224/11472 , H01L2224/11849 , H01L2224/13017 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13551 , H01L2224/13561 , H01L2224/136 , H01L2224/81101 , H01L2224/81191 , H01L2924/01322 , H01L2924/12042 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L2924/00
摘要： A method and system of producing metal cored solder structures on a substrate which includes: providing a decal having a plurality of apertures, the apertures being tapered from a top surface to a bottom surface; positioning a carrier beneath the bottom of the decal, the carrier having cavities located in alignment with the apertures of the decal; positioning the decal on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities; positioning a plurality of metal elements in the feature cavities; filling the feature cavities with molten solder and cooling the solder; separating the decal from the carrier to partially expose metal core solder contacts; positioning the metal core solder contacts on receiving elements of a substrate; and exposing the metal core solder contacts on the substrate.
摘要翻译： 一种在衬底上制造金属芯焊料结构的方法和系统，包括：提供具有多个孔的贴花，所述孔从顶表面到底表面渐缩; 将载体定位在贴花底部的下方，载体具有与贴花的孔对准的空腔; 将贴花定位在具有贴花底表面的载体上，与载体顶表面接触以形成由贴花孔和载体空腔限定的特征空腔; 将多个金属元件定位在特征腔中; 用熔融焊料填充特征腔并冷却焊料; 将贴花从载体分离以部分地暴露金属芯焊料触点; 将金属芯焊料触点定位在基板的接收元件上; 并将金属芯焊料触点暴露在基板上。
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公开(公告)号：US20150147851A1
公开(公告)日：2015-05-28
申请号：US14526268
申请日：2014-10-28
申请人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
发明人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another
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