Method for etching deep, high-aspect ratio features into silicon carbide and gallium nitride

    公开(公告)号:US11049725B1

    公开(公告)日:2021-06-29

    申请号:US14290317

    申请日:2014-05-29

    摘要: A method for the etching of deep, high-aspect ratio features into silicon carbide (SiC), gallium nitride (GaN) and similar materials using an Inductively-Coupled Plasma (ICP) etch process technology is described. This technology can also be used to etch features in silicon carbide and gallium nitride having near vertical sidewalls. The disclosed method has application in the fabrication of electronics, microelectronics, power electronics, Monolithic Microwave Integrated Circuits (MMICs), high-voltage electronics, high-temperature electronics, high-power electronics, Light-Emitting Diodes (LEDs), Micro-Electro-Mechanical Systems (MEMS), micro-mechanical devices, microelectronic devices and systems, nanotechnology devices and systems, Nano-Electro-Mechanical Systems (NEMS), photonic devices, and any devices and/or structures made from silicon carbide and/or gallium nitride. The disclosed method also has application in the fabrication of through-substrate vias and through-wafer vias, including those that are subsequently filled with electrically conductive materials.

    Method for the fabrication of electron field emission devices including carbon nanotube electron field emission devices

    公开(公告)号:US10910185B2

    公开(公告)日:2021-02-02

    申请号:US16527533

    申请日:2019-07-31

    摘要: The present invention is directed to a method for the fabrication of electron field emitter devices, including carbon nanotube (CNT) field emission devices. The method of the present invention involves depositing one or more electrically conductive thin-film layers onto an electrically conductive substrate and performing lithography and etching on these thin film layers to pattern them into the desired shapes. The top-most layer may be of a material type that acts as a catalyst for the growth of single- or multiple-walled carbon nanotubes (CNTs). Subsequently, the substrate is etched to form a high-aspect ratio post or pillar structure onto which the previously patterned thin film layers are positioned. Carbon nanotubes may be grown on the catalyst material layer. The present invention also described methods by which the individual field emission devices may be singulated into individual die from a substrate.

    Method for the fabrication of electron field emission devices including carbon nanotube electron field emission devices

    公开(公告)号:US10403463B2

    公开(公告)日:2019-09-03

    申请号:US15853485

    申请日:2017-12-22

    摘要: The present invention is directed to a method for the fabrication of electron field emitter devices, including carbon nanotube (CNT) field emission devices. The method of the present invention involves depositing one or more electrically conductive thin-film layers onto a electrically conductive substrate and performing lithography and etching on these thin film layers to pattern them into the desired shapes. The top-most layer may be of a material type that acts as a catalyst for the growth of single- or multiple-walled carbon nanotubes (CNTs). Subsequently, the substrate is etched to form a high-aspect ratio post or pillar structure onto which the previously patterned thin film layers are positioned. Carbon nanotubes may be grown on the catalyst material layer. The present invention also described methods by which the individual field emission devices may be singulated into individual die from a substrate.

    METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO GLASS, FUSED SILICA, AND QUARTZ MATERIALS
    5.
    发明申请
    METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO GLASS, FUSED SILICA, AND QUARTZ MATERIALS 有权
    将深层浸泡,玻璃,高分子二氧化硅和石墨材料的高比例特征的方法

    公开(公告)号:US20150034592A1

    公开(公告)日:2015-02-05

    申请号:US13954057

    申请日:2013-07-30

    IPC分类号: H01J37/32 H01L21/308

    摘要: A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch.

    摘要翻译: 公开了一种用于使用等离子体蚀刻技术将深的高纵横比特征蚀刻成二氧化硅材料层和衬底(包括玻璃,熔融石英,石英或类似材料)的方法或工艺。 该方法在MEMS,微电子,微机械,光子和纳米技术设备的制造和制造中的应用,其中使用二氧化硅材料层或衬底并且必须进行图案化和蚀刻。 受益于本发明描述的方法的装置包括例如制造MEMS陀螺仪,谐振器,振荡器,微量平衡,加速度计。 蚀刻方法或工艺允许蚀刻深度范围从低于10微米至超过1毫米,纵横比小于1至1至超过10比1,具有垂直或近似垂直角的蚀刻特征侧壁。 另外,所公开的方法提供蚀刻的衬底的要求以减少或消除不期望的蚀刻效应。

    Method for etching deep, high-aspect ratio features into silicon carbide and gallium nitride

    公开(公告)号:US11984321B1

    公开(公告)日:2024-05-14

    申请号:US17358140

    申请日:2021-06-25

    摘要: A method for the etching of deep, high-aspect ratio features into silicon carbide (SiC), gallium nitride (GaN) and similar materials using an Inductively-Coupled Plasma (ICP) etch process technology is described. This technology can also be used to etch features in silicon carbide and gallium nitride having near vertical sidewalls. The disclosed method has application in the fabrication of electronics, microelectronics, power electronics, Monolithic Microwave Integrated Circuits (MMICs), high-voltage electronics, high-temperature electronics, high-power electronics, Light-Emitting Diodes (LEDs), Micro-Electro-Mechanical Systems (MEMS), micro-mechanical devices, microelectronic devices and systems, nanotechnology devices and systems, Nano-Electro-Mechanical Systems (NEMS), photonic devices, and any devices and/or structures made from silicon carbide and/or gallium nitride. The disclosed method also has application in the fabrication of through-substrate vias and through-wafer vias, including those that are subsequently filled with electrically conductive materials.

    Self-aligned dynamic pattern generator device and method of fabrication
    7.
    发明授权
    Self-aligned dynamic pattern generator device and method of fabrication 有权
    自对准动态图案发生器装置及其制造方法

    公开(公告)号:US09312103B2

    公开(公告)日:2016-04-12

    申请号:US13838453

    申请日:2013-03-15

    摘要: A dynamic pattern generator (DPG) device and method of making a DPG device are disclosed. The DPG device is used in semiconductor processing tools that require multiple electron-beams, such as direct-write lithography. The device is a self-aligned DPG device that enormously reduces the required tolerances for aligning the various electrode layers, as compared to other design configurations including the non-self-aligned approach and also greatly simplifies the process complexity and cost. A process sequence for both integrated and non-integrated versions of the self-aligned DPG device is described. Additionally, an advanced self-aligned DPG device that eliminates the need for a charge dissipating coating or layer to be used on the device is described. Finally, a fabrication process for the implementation of both integrated and non-integrated versions of the advanced self-aligned DPG device is described.

    摘要翻译: 公开了一种动态图案发生器(DPG)装置和制造DPG装置的方法。 DPG器件用于需要多个电子束的半导体处理工具,例如直写光刻。 与其他设计配置(包括非自对准方法)相比,该器件是一种自对准DPG器件,极大地减少了对准各种电极层所需的公差,并大大简化了工艺的复杂性和成本。 描述了自对准DPG设备的集成和非集成版本的处理顺序。 另外,描述了一种先进的自对准DPG器件,其不需要在器件上使用的电荷消散涂层或层。 最后,描述了用于实现高级自对准DPG设备的集成和非集成版本的制造过程。

    Method for etching deep, high-aspect ratio features into silicon carbide and gallium nitride

    公开(公告)号:US11075086B1

    公开(公告)日:2021-07-27

    申请号:US15894067

    申请日:2018-02-12

    摘要: A method for the etching of deep, high-aspect ratio features into silicon carbide (SiC), gallium nitride (GaN) and similar materials using an Inductively-Coupled Plasma (ICP) etch process technology is described. This technology can also be used to etch features in silicon carbide and gallium nitride having near vertical sidewalls. The disclosed method has application in the fabrication of electronics, microelectronics, power electronics, Monolithic Microwave Integrated Circuits (MMICs), high-voltage electronics, high-temperature electronics, high-power electronics, Light-Emitting Diodes (LEDs), Micro-Electro-Mechanical Systems (MEMS), micro-mechanical devices, microelectronic devices and systems, nanotechnology devices and systems, Nano-Electro-Mechanical Systems (NEMS), photonic devices, and any devices and/or structures made from silicon carbide and/or gallium nitride. The disclosed method also has application in the fabrication of through-substrate vias and through-wafer vias, including those that are subsequently filled with electrically conductive materials.

    Method for etching deep, high-aspect ratio features into glass, fused silica, and quartz materials
    10.
    发明授权
    Method for etching deep, high-aspect ratio features into glass, fused silica, and quartz materials 有权
    将深,高纵横比特征蚀刻成玻璃,熔融石英和石英材料的方法

    公开(公告)号:US09576773B2

    公开(公告)日:2017-02-21

    申请号:US13954057

    申请日:2013-07-30

    摘要: A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch.

    摘要翻译: 公开了一种用于使用等离子体蚀刻技术将深的高纵横比特征蚀刻成二氧化硅材料层和衬底(包括玻璃,熔融石英,石英或类似材料)的方法或工艺。 该方法在MEMS,微电子,微机械,光子和纳米技术设备的制造和制造中的应用,其中使用二氧化硅材料层或衬底并且必须进行图案化和蚀刻。 受益于本发明描述的方法的装置包括例如制造MEMS陀螺仪,谐振器,振荡器,微量平衡,加速度计。 蚀刻方法或工艺允许蚀刻深度范围从低于10微米至超过1毫米,纵横比小于1至1至超过10比1,具有垂直或近似垂直角的蚀刻特征侧壁。 另外,所公开的方法提供蚀刻的衬底的要求以减少或消除不期望的蚀刻效应。