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    SOLID STATE LIGHTING DIES WITH QUANTUM EMITTERS AND ASSOCIATED METHODS OF MANUFACTURING
    2.
    发明申请
    SOLID STATE LIGHTING DIES WITH QUANTUM EMITTERS AND ASSOCIATED METHODS OF MANUFACTURING 有权
    具有量子发射体和相关制造方法的固态照明灯

    公开(公告)号：US20120056206A1

    公开(公告)日：2012-03-08

    申请号：US12874360

    申请日：2010-09-02

    申请人： Cem Basceri ,  Casey Kurth ,  Thomas Gehrke ,  Kevin Tetz

    发明人： Cem Basceri ,  Casey Kurth ,  Thomas Gehrke ,  Kevin Tetz

    IPC分类号： H01L33/08 ,  H01L33/00 ,  H01L33/32

    CPC分类号： H01L33/007 ,  H01L33/02 ,  H01L33/08 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Solid state lighting dies and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting die includes a substrate material, a first semiconductor material, a second semiconductor material, and an active region between the first and second semiconductor materials. The second semiconductor material has a surface facing away from the substrate material. The solid state lighting die also includes a plurality of openings extending from the surface of the second semiconductor material toward the substrate material.

    摘要翻译： 本文公开了固态照明管芯及其相关的制造方法。 在一个实施例中，固态照明管芯包括衬底材料，第一半导体材料，第二半导体材料以及第一和第二半导体材料之间的有源区。 第二半导体材料具有背离衬底材料的表面。 固态照明裸片还包括从第二半导体材料的表面向衬底材料延伸的多个开口。

    BACK-TO-BACK SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS
    3.
    发明申请
    BACK-TO-BACK SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS 有权
    背靠背固态照明设备及相关方法

    公开(公告)号：US20120056219A1

    公开(公告)日：2012-03-08

    申请号：US12874396

    申请日：2010-09-02

    申请人： Cem Basceri ,  Casey Kurth ,  Kevin Tetz

    发明人： Cem Basceri ,  Casey Kurth ,  Kevin Tetz

    IPC分类号： H01L33/00 ,  H01L21/18

    CPC分类号： H01L25/50 ,  H01L25/0756 ,  H01L33/382 ,  H01L33/486 ,  H01L33/501 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/0041 ,  H05K1/0203 ,  H05K1/0306 ,  H05K2201/10106 ,  H01L2924/00

    摘要： Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.

    摘要翻译： 本文公开了包括背对背固态发射器（SSEs）和相关方法的固态光（SSL）。 在各种实施例中，SSL可以包括具有不同于第一表面的第一表面和第二表面的载体衬底。 第一和第二通过衬底互连（TSI）可以从载体衬底的第一表面延伸到第二表面。 SSL还可以包括第一和第二SSE，每个SSE具有与前侧相对的前侧和后侧。 第一SSE的背面面向载体基板的第一表面，并且第一SSE电耦合到第一和第二TSI。 第二SSE的背面面向载体基板的第二表面，而第二SSE电耦合到第一和第二TSI。

    Back-to-back solid state lighting devices and associated methods
    4.
    发明授权
    Back-to-back solid state lighting devices and associated methods 有权
    背靠背固态照明装置及相关方法

    公开(公告)号：US09443834B2

    公开(公告)日：2016-09-13

    申请号：US12874396

    申请日：2010-09-02

    申请人： Cem Basceri ,  Casey Kurth ,  Kevin Tetz

    发明人： Cem Basceri ,  Casey Kurth ,  Kevin Tetz

    IPC分类号： H01L25/075 ,  H01L33/38 ,  H05K1/02 ,  H05K1/03

    CPC分类号： H01L25/50 ,  H01L25/0756 ,  H01L33/382 ,  H01L33/486 ,  H01L33/501 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/0041 ,  H05K1/0203 ,  H05K1/0306 ,  H05K2201/10106 ,  H01L2924/00

    摘要： Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.

    摘要翻译： 本文公开了包括背对背固态发射器（SSEs）和相关方法的固态光（SSL）。 在各种实施例中，SSL可以包括具有不同于第一表面的第一表面和第二表面的载体衬底。 第一和第二通过衬底互连（TSI）可以从载体衬底的第一表面延伸到第二表面。 SSL还可以包括第一和第二SSE，每个SSE具有与前侧相对的前侧和后侧。 第一SSE的背面面向载体基板的第一表面，并且第一SSE电耦合到第一和第二TSI。 第二SSE的背面面向载体基板的第二表面，而第二SSE电耦合到第一和第二TSI。

    ENGINEERED SUBSTRATES FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS
    6.
    发明申请
    ENGINEERED SUBSTRATES FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS 有权
    用于半导体器件和相关系统的工程衬底和方法

    公开(公告)号：US20130049043A1

    公开(公告)日：2013-02-28

    申请号：US13223162

    申请日：2011-08-31

    申请人： Martin F. Schubert ,  Cem Basceri ,  Vladimir Odnoblyudov ,  Casey Kurth ,  Thomas Gehrke

    发明人： Martin F. Schubert ,  Cem Basceri ,  Vladimir Odnoblyudov ,  Casey Kurth ,  Thomas Gehrke

    IPC分类号： H01L33/60 ,  H01L33/48 ,  H01L33/00 ,  H01L21/20

    CPC分类号： H01L33/0079 ,  H01L33/0062 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0095 ,  H01L33/02 ,  H01L33/16 ,  H01L33/46

    摘要： Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light.

    摘要翻译： 本文公开了用于半导体器件的工程衬底。 根据特定实施例的装置包括具有包括发射辐射有源区域的多个半导体材料的换能器结构。 所述装置还包括具有第一材料和第二材料的工程衬底，所述第一材料和所述第二材料中的至少一个具有与所述多个材料中的至少一个的热膨胀系数至少近似匹配的热膨胀系数 的半导体材料。 第一材料和第二材料中的至少一个被定位成接收来自有源区域的辐射并改变光的特性。

    ROM embedded DRAM with bias sensing
    7.
    发明授权
    ROM embedded DRAM with bias sensing 有权

    公开(公告)号：US06771529B2

    公开(公告)日：2004-08-03

    申请号：US10376768

    申请日：2003-02-28

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C1700

    CPC分类号： G11C7/14 ,  G11C7/06 ,  G11C17/12 ,  G11C17/18 ,  G11C2207/104

    摘要： A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.

    DRAM with bias sensing
    9.
    发明授权
    DRAM with bias sensing 失效
    具有偏置感测的DRAM

    公开(公告)号：US06603693B2

    公开(公告)日：2003-08-05

    申请号：US10017868

    申请日：2001-12-12

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C702

    CPC分类号： G11C7/14 ,  G11C11/4099

    摘要： A DRAM improves cell read margins using bias, or reference, circuitry. The reference circuitry is coupled to a complimentary digit line to improve a differential voltage with an active digit line. One embodiment, improves one's margin by decreasing the complimentary digit line voltage. The reference circuitry can be an un-programmed DRAM cell, a non-volatile ROM memory cell or a conductor coupled to a reference voltage.

    摘要翻译： DRAM使用偏置或参考电路来提高单元读取余量。 参考电路耦合到互补数字线，以利用有源数字线来提高差分电压。 一个实施例，通过减少补充数字线电压来提高余量。 参考电路可以是未编程的DRAM单元，非易失性ROM存储器单元或耦合到参考电压的导体。