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1.发明申请EPITAXIAL METHODS FOR REDUCING SURFACE DISLOCATION DENSITY IN SEMICONDUCTOR MATERIALS 审中-公开用于减少半导体材料中表面偏心密度的外延方法公开(公告)号：US20120187541A1
公开(公告)日：2012-07-26
申请号：US13440749
申请日：2012-04-05
申请人： Chantal Arena , Laurent Clavelier , Marc Rabarot
发明人： Chantal Arena , Laurent Clavelier , Marc Rabarot
IPC分类号： H01L29/20
CPC分类号： H01L29/2003 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639
摘要： The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer of material into a following semiconductor layer of material.
摘要翻译： 本发明提供了用于减少半导体层的表面位错的方法和结构，并且可以在半导体结构和包含III族氮化物材料的层的外延生长期间使用。 实施例涉及形成多个位错坑塞，以防止位错从材料的下层扩散到随后的材料半导体层中。
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2.发明申请EPITAXIAL METHODS AND STRUCTURES FOR REDUCING SURFACE DISLOCATION DENSITY IN SEMICONDUCTOR MATERIALS 失效用于减少半导体材料表面偏离密度的外延方法和结构公开(公告)号：US20100244197A1
公开(公告)日：2010-09-30
申请号：US12721461
申请日：2010-03-10
申请人： Chantal Arena , Laurent Clavelier , Marc Rabarot
发明人： Chantal Arena , Laurent Clavelier , Marc Rabarot
IPC分类号： H01L29/20 , H01L21/302
CPC分类号： H01L29/2003 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639
摘要： The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer of material into a following semiconductor layer of material.
摘要翻译： 本发明提供了用于减少半导体层的表面位错的方法和结构，并且可以在半导体结构和包含III族氮化物材料的层的外延生长期间使用。 实施例涉及形成多个位错坑塞，以防止位错从材料的下层扩散到随后的材料半导体层中。
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3.发明授权Epitaxial methods for reducing surface dislocation density in semiconductor materials 失效降低半导体材料表面位错密度的外延方法公开(公告)号：US08178427B2
公开(公告)日：2012-05-15
申请号：US12721461
申请日：2010-03-10
申请人： Chantal Arena , Laurent Clavelier , Marc Rabarot
发明人： Chantal Arena , Laurent Clavelier , Marc Rabarot
IPC分类号： H01L21/20
CPC分类号： H01L29/2003 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639
摘要： The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer of material into a following semiconductor layer of material.
摘要翻译： 本发明提供了用于减少半导体层的表面位错的方法和结构，并且可以在半导体结构和包含III族氮化物材料的层的外延生长期间使用。 实施例涉及形成多个位错坑塞，以防止位错从材料的下层扩散到随后的材料半导体层中。
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4.发明授权Equipment for high volume manufacture of group III-V semiconductor materials 有权III-V族III族半导体材料大批量生产设备公开(公告)号：US09580836B2
公开(公告)日：2017-02-28
申请号：US12305574
申请日：2007-11-16
CPC分类号： C30B25/14 , C30B29/406 , C30B35/00
摘要： The invention relates to methods and apparatus that are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically GaN wafers. Specifically, the methods relate to substantially preventing the formation of unwanted materials on an isolation valve fixture within a chemical vapor deposition (CVD) reactor. The invention provides apparatus and methods for limiting deposition/condensation of GaCl3 and reaction by-products on an isolation valve that is used in the system and method for forming a monocrystalline Group III-V semiconductor material by reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber.
摘要翻译： 本发明涉及为生产III-N（氮）化合物半导体晶片，特别是GaN晶片而优化的方法和装置。 具体地说，这些方法涉及基本上防止在化学气相沉积（CVD）反应器内的隔离阀装置上形成不需要的材料。 本发明提供了用于限制用于该系统的隔离阀上的GaCl 3和反应副产物的沉积/冷凝的装置和方法以及通过使一定量的第III族前体气体反应形成单晶III-V族半导体材料的方法 作为一种反应物，其具有一定量的气态V族组分作为反应室中的另一反应物。
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5.发明授权Methods for forming group III-nitride materials and structures formed by such methods 有权通过这种方法形成III族氮化物材料和结构的方法公开(公告)号：US09412580B2
公开(公告)日：2016-08-09
申请号：US13988996
申请日：2011-11-23
CPC分类号： H01L21/02104 , C30B25/02 , C30B29/403 , C30B29/406 , H01L29/2003
摘要： Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer.
摘要翻译： 本发明的实施方案包括使用卤化物气相外延（HVPE）方法形成III族氮化物半导体结构的方法。 所述方法包括在非天然生长衬底的表面上形成连续的III族氮化物成核层，所述连续III族氮化物成核层隐藏非天然生长衬底的上表面。 形成连续的III族氮化物成核层可以包括形成III族氮化物层并热处理所述III族氮化物层。 方法还可以包括在连续的III族氮化物成核层上形成另外的III族氮化物层。
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6.发明授权Methods of fabricating semiconductor structures and devices using quantum dot structures and related structures 有权使用量子点结构和相关结构制造半导体结构和器件的方法公开(公告)号：US09178091B2
公开(公告)日：2015-11-03
申请号：US13377931
申请日：2010-05-26
申请人： Chantal Arena , Heather McFelea
发明人： Chantal Arena , Heather McFelea
IPC分类号： H01L31/0368 , H01L31/04 , H01L31/18 , H01L21/02 , H01L31/0304 , H01L31/0352
CPC分类号： H01L31/04 , H01L21/0237 , H01L21/02458 , H01L21/02507 , H01L21/02513 , H01L21/0254 , H01L21/0262 , H01L31/03048 , H01L31/035218 , H01L31/184 , H01L31/1848 , H01L31/1892 , Y02E10/544
摘要： Methods of fabricating photovoltaic devices include forming a plurality of subcells in a vertically stacked arrangement on a semiconductor material, each of the subcells being formed at a different temperature than an adjacent subcell such that the adjacent subcells have differing effective band-gaps. The methods of fabricating also include inverting the structure, attaching another substrate to a second semiconductor material, and removing the substrate. For example, each of the subcells may comprise a III-nitride material, and each subsequent subcell may include an indium content different than the adjacent subcell. Novel structures may be formed using such methods.
摘要翻译： 制造光伏器件的方法包括在半导体材料上以垂直堆叠布置形成多个子电池，每个子电池形成在与相邻子电池不同的温度下，使得相邻的子电池具有不同的有效带隙。 制造方法还包括翻转结构，将另一衬底附接到第二半导体材料，以及去除衬底。 例如，每个子电池可以包括III族氮化物材料，并且每个后续子电池可以包括不同于相邻子电池的铟含量。 可以使用这种方法形成新的结构。
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7.发明授权Methods for improving the quality of structures comprising semiconductor materials 有权提高包含半导体材料的结构质量的方法公开(公告)号：US08598019B2
公开(公告)日：2013-12-03
申请号：US13552303
申请日：2012-07-18
申请人： Chantal Arena
发明人： Chantal Arena
IPC分类号： H01L21/20
CPC分类号： H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02639 , H01L21/02647
摘要： Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods.
摘要翻译： 可以在半导体结构和III族氮化物材料层的外延生长期间应用的方法，使得连续层的质量连续改善。 在初始表面上生长中间外延层，使得在初始表面中存在的表面位错处形成生长坑。 然后根据已知的外延横向过度生长现象在中间层上生长随后的层，因此其横向延伸并且至少包围相交的生长凹坑的聚集体。 优选地，在生长下一层之前，沉积介电材料的不连续膜，使得电介质材料不连续地沉积，以减少侧向生长材料中位错的数量。 本发明的方法可以多次进行到相同的结构。 此外，通过这些方法制造的半导体结构。
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公开(公告)号：US08585820B2
公开(公告)日：2013-11-19
申请号：US12305495
申请日：2007-11-15
CPC分类号： C30B25/14 , C23C16/4412 , C30B25/08 , C30B25/165 , C30B29/40 , C30B29/403
摘要： Methods for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, or for wafers. The equipment and methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. The method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber to form the semiconductor material; removing exhaust gases including unreacted Group III precursor, unreacted Group V component and reaction byproducts; and heating the exhaust gases to a temperature sufficient to reduce condensation thereof and enhance manufacture of the semiconductor material. Advantageously, the exhaust gases are heated to sufficiently avoid condensation to facilitate sustained high volume manufacture of the semiconductor material.
摘要翻译： 用于持续，大批量生产适用于制造光学和电子部件的III-V族化合物半导体材料，用作外延沉积的基底或用于晶片的方法。 该设备和方法被优化用于生产III-N（氮）化合物半导体晶片，并专门用于生产GaN晶片。 该方法包括将一定量的作为一种反应物的气态III族前体与一定量的气态V族组分作为反应室中的另一反应物反应以形成半导体材料; 去除废气，包括未反应的III族前体，未反应的V族组分和反应副产物; 并将废气加热到足以减少其冷凝的温度，并且增强半导体材料的制造。 有利地，排气被加热以充分避免冷凝，以促进半导体材料的持续高容量制造。
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9.发明授权Methods for high volume manufacture of group III-V semiconductor materials 有权III-V族III族半导体材料大批量生产的方法公开(公告)号：US08382898B2
公开(公告)日：2013-02-26
申请号：US12305394
申请日：2007-11-15
CPC分类号： C30B25/02 , C30B29/403
摘要： The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber under conditions sufficient to provide sustained high volume manufacture of the semiconductor material on one or more substrates, with the gaseous Group III precursor continuously provided at a mass flow of 50 g Group III element/hour for at least 48 hours.
摘要翻译： 本发明涉及半导体处理设备和方法的领域，并且特别地提供了用于持续，大批量生产适用于制造光学和电子部件的III-V族化合物半导体材料用作基板的方法 用于外延沉积，用于晶片等。 在优选的实施方案中，这些方法被优化用于生产III-N（氮）化合物半导体晶片，并且专门用于生产GaN晶片。 具体地说，该方法包括将一定量的作为一种反应物的气态III族前体与一定量的气态V族组分作为另外的反应物在反应室中反应，条件足以在一个或多个反应器上提供持续的大量制造半导体材料 底物，气态III族前体以50g III族元素/小时的质量流量连续提供至少48小时。
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10.发明授权公开(公告)号：US08318612B2
公开(公告)日：2012-11-27
申请号：US12937192
申请日：2008-11-14
申请人： Chantal Arena , Subhash Mahajan
发明人： Chantal Arena , Subhash Mahajan
IPC分类号： H01L21/469
CPC分类号： H01L21/0254 , H01L21/0242 , H01L21/02458 , H01L21/02639 , H01L21/02647
摘要： The invention provides methods which can be applied during the epitaxial growth of two or more layers of Group III-nitride semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects interact with a protective layer of a protective material to form amorphous complex regions capable of preventing the further propagation of defects and dislocations. The invention also includes semiconductor structures fabricated by these methods.
摘要翻译： 本发明提供了可以在两层或更多层III族氮化物半导体材料的外延生长期间应用的方法，使得连续层的质量连续改善。 在优选的实施方案中，表面缺陷与保护材料的保护层相互作用以形成能够防止缺陷和位错进一步扩散的非晶复合区。 本发明还包括通过这些方法制造的半导体结构。
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