公开(公告)号：US07365441B2

公开(公告)日：2008-04-29

申请号：US11362783

申请日：2006-02-28

申请人： Chikao Ikenaga ,  You Shimazaki ,  Masachika Masuda ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  You Shimazaki ,  Masachika Masuda ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85001 ,  H01L2224/85385 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2924/20752 ,  H01L2924/00012

摘要： A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.

摘要翻译： 一种半导体器件制造方法，包括在粘合片50所包含的粘合剂层上形成多个单独的导电焊盘20的基板形成工序，以及半导体芯片安装工序，将半导体芯片与未设置的表面接合， 任何电极与粘合片50接触，并且用导线30将形成在半导体芯片10上的电极11和导电焊盘20的上部电连接。 将半导体芯片10，导线30和导电焊盘20密封在密封树脂模制件40中，然后将粘合片50与密封树脂模制件40分离。 每个导电焊盘20具有缩小部分20b，以及从缩小部分20b突出的突出部分20a。 具有这种结构的导电垫20可以牢固地结合到密封树脂模制件40上。

公开(公告)号：US20060145363A1

公开(公告)日：2006-07-06

申请号：US11362783

申请日：2006-02-28

申请人： Chikao Ikenaga ,  You Shimazaki ,  Masachika Masuda ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  You Shimazaki ,  Masachika Masuda ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/28 ,  H01L23/52 ,  H01L23/48

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85001 ,  H01L2224/85385 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2924/20752 ,  H01L2924/00012

摘要： A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.

摘要翻译： 一种半导体器件制造方法，包括在粘合片50所包含的粘合剂层上形成多个单独的导电焊盘20的基板形成工序，以及半导体芯片安装工序，将半导体芯片与未设置的表面接合在粘合片50上 任何电极与粘合片50接触，并且用导线30将形成在半导体芯片10上的电极11和导电焊盘20的上部电连接。 将半导体芯片10，导线30和导电焊盘20密封在密封树脂模制件40中，然后将粘合片50与密封树脂模制件40分离。 每个导电焊盘20具有缩小部分20b，以及从缩小部分20b突出的突出部分20a。 具有这种结构的导电垫20可以牢固地结合到密封树脂模制件40上。

公开(公告)号：US07064011B2

公开(公告)日：2006-06-20

申请号：US10781947

申请日：2004-02-20

申请人： Chikao Ikenaga ,  You Shimazaki ,  Masachika Masuda ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  You Shimazaki ,  Masachika Masuda ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L21/44 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85001 ,  H01L2224/85385 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2924/20752 ,  H01L2924/00012

摘要： A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.

公开(公告)号：US07943427B2

公开(公告)日：2011-05-17

申请号：US11632131

申请日：2005-07-13

申请人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L21/00

CPC分类号： H01L21/6835 ,  H01L21/4828 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/20305 ,  H01L2924/00012

摘要： A substrate B for use in production of a semiconductor device is used, which substrate includes an adhesive sheet 50 having a base layer 51 and an adhesive layer 52, and a plurality of independently provided electrically conductive portions 20. A semiconductor element having electrodes 11 formed thereon is firmly fixed onto the substrate B, and upper portions of the plurality of electrically conductive portions 20 and the electrodes 11 of the semiconductor element 10 are electrically connected by using wires 30. The semiconductor element 10, wires 30 and electrically conductive portions 20 are sealed by using a sealing resin 40. Each of the electrically conductive portions 20 has overhanging portions 20a, and a side face 60a of the electrically conductive portion 20 is roughened, thus enhancing the joining strength between each electrically conductive portion 20 and the sealing resin 40.

摘要翻译： 使用用于制造半导体器件的基板B，该基板包括具有基底层51和粘合层52的粘合片50以及多个独立设置的导电部分20.具有形成电极11的半导体元件 其上牢固地固定在基板B上，并且多个导电部分20的上部和半导体元件10的电极11通过使用导线30电连接。半导体元件10，导线30和导电部分20是 通过使用密封树脂40密封。每个导电部分20具有突出部分20a，并且导电部分20的侧面60a被粗糙化，从而增强每个导电部分20和密封树脂40之间的接合强度 。

公开(公告)号：US08018044B2

公开(公告)日：2011-09-13

申请号：US11632348

申请日：2005-07-13

申请人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/48

CPC分类号： H01L21/568 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/62 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85001 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A semiconductor device P includes a die pad 20, a semiconductor element 30 which is loaded on the die pad 20, and a sealing resin 40. A plurality of electrically conductive portions 10 each having a layered structure including a metal foil 1 comprising copper or a copper alloy, and electrically conductive portion plating layers 2 provided at both upper and lower ends of the metal foil 1 are arranged around the die pad 20. The die pad 20 has a lower die pad plating layer 2b, and the semiconductor element 30 is loaded on the die pad 20 comprising such a die pad plating layer 2b. Electrodes 30a provided on the semiconductor element 30 are electrically connected with top ends of the electrically conductive portions 10 via wires 3, respectively. The lower electrically conductive portion plating layers 2 of the electrically conductive portions 10 and the die pad plating layer 2b of the die pad 20 are exposed outside from the sealing resin 40 on their back faces.

摘要翻译： 半导体器件P包括管芯焊盘20，负载在管芯焊盘20上的半导体元件30和密封树脂40.多个导电部分10，每个导电部分10具有包括铜或金属箔的金属箔1的层状结构 铜合金和设置在金属箔1的上端和下端的导电部分电镀层2布置在管芯焊盘20周围。管芯焊盘20具有下焊盘镀层2b，并且半导体元件30被加载 在包括这种裸片焊盘镀层2b的芯片焊盘20上。 设置在半导体元件30上的电极30a分别经由导线3与导电部10的顶端电连接。 导电部分10的下部导电部分电镀层2和芯片焊盘20的芯片焊盘镀层2b在其背面从密封树脂40的外部露出。

公开(公告)号：US20070241445A1

公开(公告)日：2007-10-18

申请号：US11632348

申请日：2005-07-13

申请人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L21/568 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/62 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85001 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A semiconductor device P includes a die pad 20, a semiconductor element 30 which is loaded on the die pad 20, and a sealing resin 40. A plurality of electrically conductive portions 10 each having a layered structure including a metal foil 1 comprising copper or a copper alloy, and electrically conductive portion plating layers 2 provided at both upper and lower ends of the metal foil 1 are arranged around the die pad 20. The die pad 20 has a lower die pad plating layer 2b, and the semiconductor element 30 is loaded on the die pad 20 comprising such a die pad plating layer 2b. Electrodes 30a provided on the semiconductor element 30 are electrically connected with top ends of the electrically conductive portions 10 via wires 3, respectively. The lower electrically conductive portion plating layers 2 of the electrically conductive portions 10 and the die pad plating layer 2b of the die pad 20 are exposed outside from the sealing resin 40 on their back faces.

摘要翻译： 半导体器件P包括管芯焊盘20，负载在管芯焊盘20上的半导体元件30和密封树脂40。 每个具有包括铜或铜合金的金属箔1的层状结构的多个导电部分10和设置在金属箔1的上端和下端的导电部分镀层2围绕管芯焊盘20布置 。 管芯焊盘20具有下焊盘镀覆层2b，并且将半导体元件30装载在包括这种管芯焊盘镀层2b的管芯焊盘20上。 设置在半导体元件30上的电极30a分别经由导线3与导电部10的顶端电连接。 导电部分10的下部导电部分电镀层2和芯片焊盘20的芯片焊盘镀层2b在其背面从密封树脂40的外部露出。

公开(公告)号：US20110291303A1

公开(公告)日：2011-12-01

申请号：US13207096

申请日：2011-08-10

申请人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L21/568 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/62 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85001 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.

摘要翻译： 半导体器件包括管芯焊盘，负载在管芯焊盘上的半导体元件和密封树脂。 多个导电部分，每个导电部分具有包括铜或铜合金的金属箔的层状结构，以及设置在金属箔的上端和下端的导电部分镀层围绕芯片焊盘。 芯片焊盘具有下模板镀层，半导体元件被装载在包括这样的芯片焊盘镀层的芯片焊盘上。 设置在半导体元件上的电极分别通过导线与导电部分的顶端电连接。 导电部分的下部导电部分电镀层和芯片焊盘的芯片焊盘镀层在其背面上从密封树脂的外部露出。

公开(公告)号：US08525351B2

公开(公告)日：2013-09-03

申请号：US13207096

申请日：2011-08-10

申请人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/485

CPC分类号： H01L21/568 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/62 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85001 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.

摘要翻译： 半导体器件包括管芯焊盘，负载在管芯焊盘上的半导体元件和密封树脂。 多个导电部分，每个导电部分具有包括铜或铜合金的金属箔的层状结构，以及设置在金属箔的上端和下端的导电部分镀层围绕芯片焊盘。 芯片焊盘具有下模板镀层，半导体元件被装载在包括这样的芯片焊盘镀层的芯片焊盘上。 设置在半导体元件上的电极分别通过导线与导电部分的顶端电连接。 导电部分的下部导电部分电镀层和芯片焊盘的芯片焊盘镀层在其背面上从密封树脂的外部露出。

公开(公告)号：US20080048311A1

公开(公告)日：2008-02-28

申请号：US11632131

申请日：2005-07-13

申请人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

发明人： Chikao Ikenaga ,  Kentarou Seki ,  Kazuhito Hosokawa ,  Takuji Okeyui ,  Keisuke Yoshikawa ,  Kazuhiro Ikemura

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L21/6835 ,  H01L21/4828 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/20305 ,  H01L2924/00012

摘要： A substrate B for use in production of a semiconductor device is used, which substrate includes an adhesive sheet 50 having a base layer 51 and an adhesive layer 52, and a plurality of independently provided electrically conductive portions 20. A semiconductor element having electrodes 11 formed thereon is firmly fixed onto the substrate B, and upper portions of the plurality of electrically conductive portions 20 and the electrodes 11 of the semiconductor element 10 are electrically connected by using wires 30. The semiconductor element 10, wires 30 and electrically conductive portions 20 are sealed by using a sealing resin 40. Each of the electrically conductive portions 20 has overhanging portions 20a, and a side face 60a of the electrically conductive portion 20 is roughened, thus enhancing the joining strength between each electrically conductive portion 20 and the sealing resin 40.

摘要翻译： 使用用于制造半导体器件的基板B，该基板包括具有基底层51和粘合层52的粘合片50以及多个独立设置的导电部分20.具有形成电极11的半导体元件 其上牢固地固定在基板B上，并且多个导电部分20的上部和半导体元件10的电极11通过使用导线30电连接。半导体元件10，导线30和导电部分20是 通过使用密封树脂40密封。每个导电部分20具有突出部分20a，并且导电部分20的侧面60a被粗糙化，从而增强每个导电部分20与密封件之间的接合强度 树脂40。

公开(公告)号：US20080251902A1

公开(公告)日：2008-10-16

申请号：US12213277

申请日：2008-06-17

申请人： Masachika Masuda ,  Chikao Ikenaga

发明人： Masachika Masuda ,  Chikao Ikenaga

IPC分类号： H01L23/28 ,  H01L21/48

CPC分类号： H01L24/06 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A plastic package includes a plurality of terminal members each having an outer terminal, an inner terminal, and a connecting part connecting the outer and the inner terminal; a semiconductor device provided with terminal pads connected to the inner terminals with bond wires; and a resin molding sealing the terminal members, the semiconductor device and the bond wires therein. The inner terminals of the terminal members are thinner than the outer terminals and have contact surfaces. The upper, the lower and the outer side surfaces of the outer terminals, and the lower surfaces of the semiconductor device are exposed outside. The inner terminals, the bond wires, the semiconductor device and the resin molding are included in the thickness of the outer terminals.

摘要翻译： 塑料包装件包括多个端子构件，每个端子构件具有外端子，内端子和连接外端子和内端子的连接部件; 半导体器件，其具有用接合线连接到内部端子的端子焊盘; 以及密封端子部件，半导体器件和接合线的树脂成型体。 端子构件的内部端子比外部端子薄，并且具有接触表面。 外部端子的上部，下部和外侧表面以及半导体器件的下表面暴露在外部。 内端子，接合线，半导体器件和树脂模制件包括在外端子的厚度中。