公开(公告)号：US08592315B2

公开(公告)日：2013-11-26

申请号：US12711344

申请日：2010-02-24

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/302 ,  H01L21/461 ,  C23F1/00 ,  C23F3/00

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

摘要翻译： 在一个实施方案中，一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺，使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理，直到阶梯部分的上表面露出。

公开(公告)号：US07589013B2

公开(公告)日：2009-09-15

申请号：US11484676

申请日：2006-07-12

申请人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/4763

CPC分类号： H01L45/143 ,  H01L21/76834 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675

摘要： Example embodiments of the present invention relate to an electrode structure, a method of manufacturing the electrode structure, a phase-change memory device having the electrode structure and a method of manufacturing the phase-change memory device. The electrode structure may include a pad, a first insulation layer pattern, a second insulation layer pattern and/or an electrode. The first insulation layer pattern may be formed on the pad. The first insulation layer pattern may have a first opening that partially exposes the pad. The second insulation layer pattern may be formed on the first insulation layer pattern. The second insulation layer pattern may have a second opening connected to the first opening. The electrode may be formed on the pad and filling the first and the second openings.

摘要翻译： 本发明的示例性实施例涉及电极结构，制造电极结构的方法，具有电极结构的相变存储器件和制造相变存储器件的方法。 电极结构可以包括焊盘，第一绝缘层图案，第二绝缘层图案和/或电极。 第一绝缘层图案可以形成在垫上。 第一绝缘层图案可以具有部分地暴露垫的第一开口。 第二绝缘层图案可以形成在第一绝缘层图案上。 第二绝缘层图案可以具有连接到第一开口的第二开口。 电极可以形成在垫上并填充第一和第二开口。

公开(公告)号：US20060141790A1

公开(公告)日：2006-06-29

申请号：US11321848

申请日：2005-12-28

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

公开(公告)号：US07713879B2

公开(公告)日：2010-05-11

申请号：US11321848

申请日：2005-12-28

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/302

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

摘要翻译： 在一个实施方案中，一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺，使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理，直到阶梯部分的上表面露出。

公开(公告)号：US20080029754A1

公开(公告)日：2008-02-07

申请号：US11829556

申请日：2007-07-27

申请人： Chung-Ki Min ,  Tae-Eun Kim ,  Byoung-Moon Yoon

发明人： Chung-Ki Min ,  Tae-Eun Kim ,  Byoung-Moon Yoon

IPC分类号： H01L45/00

CPC分类号： H01L45/144 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/1675

摘要： A phase changeable memory device is manufactured by forming at least one insulating layer on a substrate. A preliminary first electrode is formed on the insulating layer. The preliminary first electrode is partially etched to form a first electrode electrically connected to the substrate. After the preliminary first electrode is formed, both sidewalls of the preliminary first electrode are partially etched isotropically to form a first electrode having a uniform width and height. A phase changeable material layer pattern and a second electrode are subsequently formed on the first electrode. Related devices also are described.

摘要翻译： 通过在基板上形成至少一个绝缘层来制造相变存储器件。 在绝缘层上形成初步的第一电极。 部分蚀刻预备的第一电极以形成电连接到衬底的第一电极。 在初步第一电极形成之后，预成型第一电极的两个侧壁被各向同性地部分蚀刻以形成具有均匀宽度和高度的第一电极。 随后在第一电极上形成相变材料层图案和第二电极。 还描述了相关设备。

公开(公告)号：US20070063247A1

公开(公告)日：2007-03-22

申请号：US11450269

申请日：2006-06-12

申请人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852

摘要： Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

摘要翻译： 提供一种包括在基板表面上方延伸的垂直取向的电容器的半导体器件以及制造这样的器件的方法，其中在半导体衬底上限定了单元和外围区域之间的单元，外围和边界区域。 电容器形成在电池区域中，在外围区域设置模具图案，并且在边界区域中设置细长的虚拟图案。 虚拟图案包括边界开口，其中在形成下电极期间在细长的内侧壁上和在基板的暴露部分上形成薄层。 然后形成具有基本上相同高度的模具图案和下部电极结构，使得随后的绝缘中间层呈现大致平坦的表面，即在电池区域和外围区域之间没有显着的步进差异。

公开(公告)号：US07025493B2

公开(公告)日：2006-04-11

申请号：US10147351

申请日：2002-05-17

申请人： Chung-Ki Min ,  Yong-Sun Ko ,  In-Seak Hwang

发明人： Chung-Ki Min ,  Yong-Sun Ko ,  In-Seak Hwang

IPC分类号： B01F7/00 ,  B01F15/02

CPC分类号： B01F7/06 ,  B01F3/2261 ,  B01F2215/0096

摘要： A chemical supply system includes at least two supply pipes for supplying at least two different chemicals; a mixing unit connected to the supply pipes for mixing at least two different chemicals to form a chemical mixture, an exhausting unit for exhausing the chemical mixture externally; and a filtering unit provided between the mixing unit and the exhausting unit for filtering the chemical mixture to prevent chemical particles having more than a predetermined size from being exhausted.

公开(公告)号：US08975731B2

公开(公告)日：2015-03-10

申请号：US14106095

申请日：2013-12-13

申请人： Chung-Ki Min

发明人： Chung-Ki Min

IPC分类号： H01L21/3105 ,  H01L21/311 ,  H01L27/108 ,  H01L27/115

CPC分类号： H01L21/31051 ,  H01L21/31056 ,  H01L21/31144 ,  H01L21/76819 ,  H01L27/10894 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582

摘要： In a semiconductor device having an insulating layer structure and method of manufacturing the same, a substrate including a first region and a second region may be provided. A first pattern structure may be formed on the first region of the substrate. A second pattern structure may be formed on the second region of the substrate, and have a height that is greater than the height of the first pattern structure. An insulating layer structure is formed on the first and second pattern structures and includes a protrusion near an area at which the first and second regions meet each other. An upper surface of the insulating interlayer structure is higher than a top surface of the second pattern structure. The protrusion may have at least one side surface having a staircase shape. A planarized insulating interlayer may be formed without substantial damage to the infrastructure by using the insulating layer structure in accordance with example embodiments.

摘要翻译： 在具有绝缘层结构的半导体器件及其制造方法中，可以提供包括第一区域和第二区域的衬底。 可以在衬底的第一区域上形成第一图案结构。 第二图案结构可以形成在基板的第二区域上，并且具有大于第一图案结构的高度的高度。 在第一和第二图案结构上形成绝缘层结构，并且在第一和第二区域彼此相遇的区域附近包括突起。 绝缘层间结构的上表面高于第二图案结构的顶面。 突起可以具有至少一个具有阶梯形状的侧表面。 通过使用根据示例性实施例的绝缘层结构，可以形成平坦化的绝缘中间层，而不会对基础设施造成实质的损害。

公开(公告)号：US20140239460A1

公开(公告)日：2014-08-28

申请号：US14106095

申请日：2013-12-13

申请人： Chung-Ki Min

发明人： Chung-Ki Min

IPC分类号： H01L29/06 ,  H01L21/3105

CPC分类号： H01L21/31051 ,  H01L21/31056 ,  H01L21/31144 ,  H01L21/76819 ,  H01L27/10894 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582

摘要： In a semiconductor device having an insulating layer structure and method of manufacturing the same, a substrate including a first region and a second region may be provided. A first pattern structure may be formed on the first region of the substrate. A second pattern structure may be formed on the second region of the substrate, and have a height that is greater than the height of the first pattern structure. An insulating layer structure is formed on the first and second pattern structures and includes a protrusion near an area at which the first and second regions meet each other. An upper surface of the insulating interlayer structure is higher than a top surface of the second pattern structure. The protrusion may have at least one side surface having a staircase shape. A planarized insulating interlayer may be formed without substantial damage to the infrastructure by using the insulating layer structure in accordance with example embodiments.

摘要翻译： 在具有绝缘层结构的半导体器件及其制造方法中，可以提供包括第一区域和第二区域的衬底。 可以在衬底的第一区域上形成第一图案结构。 第二图案结构可以形成在基板的第二区域上，并且具有大于第一图案结构的高度的高度。 在第一和第二图案结构上形成绝缘层结构，并且在第一和第二区域彼此相遇的区域附近包括突起。 绝缘层间结构的上表面高于第二图案结构的顶面。 突起可以具有至少一个具有阶梯形状的侧表面。 通过使用根据示例性实施例的绝缘层结构，可以形成平坦化的绝缘中间层，而不会对基础设施造成实质的损害。

公开(公告)号：US20080081460A1

公开(公告)日：2008-04-03

申请号：US11903610

申请日：2007-09-24

申请人： Chang-Yeon Yoo ,  Chung-Ki Min ,  Yung-Jun Kim ,  Joon-Sang Park ,  Dong-Keun Kim ,  Tae-Eun Kim

发明人： Chang-Yeon Yoo ,  Chung-Ki Min ,  Yung-Jun Kim ,  Joon-Sang Park ,  Dong-Keun Kim ,  Tae-Eun Kim

IPC分类号： H01L21/4763

CPC分类号： H01L21/76819

摘要： In a method of manufacturing a semiconductor device, a preliminary insulating layer is formed on a substrate. A photoresist pattern is formed on the preliminary insulating layer. A central portion of the preliminary insulating layer is partially etched using the photoresist pattern as an etch mask to form a preliminary insulating layer pattern including a central portion and a peripheral portion on the substrate. The peripheral portion of the photoresist pattern is higher than that of the central portion of the preliminary insulating layer pattern. The preliminary insulating layer pattern is polished to form a planarized insulating layer on the substrate.

摘要翻译： 在半导体装置的制造方法中，在基板上形成预备绝缘层。 在初级绝缘层上形成光刻胶图形。 使用光致抗蚀剂图案作为蚀刻掩模来部分地蚀刻初步绝缘层的中心部分，以在衬底上形成包括中心部分和周边部分的初步绝缘层图案。 光致抗蚀剂图案的周边部分比初级绝缘层图案的中心部分高​​。 对初始绝缘层图案进行研磨以在基板上形成平坦化的绝缘层。