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    Plasma etch process in a single inter-level dielectric etch
    6.
    发明授权
    Plasma etch process in a single inter-level dielectric etch 失效
    在单层电介质蚀刻中的等离子体蚀刻工艺

    公开(公告)号：US06399511B2

    公开(公告)日：2002-06-04

    申请号：US09728294

    申请日：2000-12-01

    申请人： Betty Tang ,  Jian Ding

    发明人： Betty Tang ,  Jian Ding

    IPC分类号： H01L213065

    CPC分类号： H01L21/76807 ,  H01L21/31116

    摘要： A dielectric etch process applicable etching a dielectric layer with an underlying stop layer. It is particularly though not necessarily applicable to forming a dual-damascene interconnect structure by a counterbore process, in which a deep via is etched prior to the formation of a trench connecting two of more vias. A single metallization fills the dual-damascene structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. For example, the dielectric layers may be silicon dioxide, and the stop layers, silicon nitride. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer. For the oxide/nitride compositions, the selective etch is based on a fluorocarbon and argon chemistry, preferably with a lean etchant of CHF3 combined with a polymer former, such as C2F6, C4F8, or CH2F2, and the non-selective etch includes a fluorocarbon or hydrocarbon, argon and an oxygen-containing gas, such as CO. The counterbore etch is preferably performed in a high-density plasma reactor which allows the plasma source region to be powered separately from a sheath bias located adjacent to the wafer pedestal.

    摘要翻译： 电介质蚀刻工艺可以用下面的停止层蚀刻电介质层。 特别地，不一定适用于通过沉孔工艺形成双镶嵌互连结构，其中在形成连接两个更多通孔的沟槽之前蚀刻深通孔。 单一的金属化填充了双镶嵌结构。 衬底形成有下停止层，下介电层，上阻挡层和上电介质层。 例如，电介质层可以是二氧化硅，并且阻挡层，氮化硅。 初始深通孔蚀刻包括至少两个子步骤。 第一子步骤包括通过上停止层的非选择性蚀刻，然后是选择性蚀刻穿过下介电层并停止在下停止层上的第二子步骤。 第一子步骤之前可以有另一子步骤，其中包括通过上电介质层的选择性蚀刻部分。 对于氧化物/氮化物组合物，选择性蚀刻基于碳氟化合物和氩气化学，优选用与聚合物形成剂如C 2 F 6，C 4 F 8或CH 2 F 2结合的CHF 3的贫蚀刻剂，并且非选择性蚀刻包括碳氟化合物 或烃，氩气和含氧气体，例如CO。沉孔蚀刻优选在高密度等离子体反应器中进行，其允许等离子体源区域与位于晶片基座附近的护套偏压分开供电。

    Light-triggered tattoo process
    7.
    发明申请
    Light-triggered tattoo process 失效
    光触发纹身过程

    公开(公告)号：US20050234528A1

    公开(公告)日：2005-10-20

    申请号：US10810778

    申请日：2004-03-25

    申请人： Kenneth Tang ,  Allen Hunter ,  Betty Tang

    发明人： Kenneth Tang ,  Allen Hunter ,  Betty Tang

    IPC分类号： A61B18/18 ,  A61B18/20

    CPC分类号： A61B18/203 ,  A61B2018/00452

    摘要： A light-triggered tattoo process. A strong absorber of light energy and tattoo material are sandwiched under pressure between a skin region and a transparent window. Short pulses of light, at frequencies strongly absorbed by the strong absorber, illuminates the strong absorber through the window creating micro-explosions in the strong absorber that drive particles of the tattoo material into the skin region producing a tattoo.

    摘要翻译： 光触发纹身过程。 强力的光能吸收体和纹身材料在皮肤区域和透明窗口之间的压力下夹在中间。 在强吸收体强烈吸收的频率下，短脉冲光通过窗口照亮强吸收体，在强吸收体中产生微量的爆炸，将纹身材料的颗粒驱动到产生纹身的皮肤区域。

    Counterbore dielectric plasma etch process particularly useful for dual damascene
    8.
    发明授权
    Counterbore dielectric plasma etch process particularly useful for dual damascene 失效
    沉孔等离子体蚀刻工艺特别适用于双镶嵌

    公开(公告)号：US06211092B1

    公开(公告)日：2001-04-03

    申请号：US09112864

    申请日：1998-07-09

    申请人： Betty Tang ,  Jian Ding

    发明人： Betty Tang ,  Jian Ding

    IPC分类号： H01L213065

    CPC分类号： H01L21/76807 ,  H01L21/31116

    摘要： A dielectric etch process particularly applicable to forming a dual-damascene interconnect structure by a counterbore process, in which a deep via is etched prior to the formation of a trench connecting two of more vias. A single metallization fills the dual-damascene structure. The substrate is formed with a lower stop layer, a lower dielectric layer, an upper stop layer, and an upper dielectric layer. For example, the dielectric layers may be silicon dioxide, and the stop layers, silicon nitride. The initial deep via etch includes at least two substeps. A first substep includes a non-selective etch through the upper stop layer followed by a second substep of selectively etching through the lower dielectric layer and stopping on the lower stop layer. The first substep may be preceded by yet another substep including a selective etch part ways through the upper dielectric layer. For the oxide/nitride compositions, the selective etch is based on a fluorocarbon and argon chemistry, preferably with a lean etchant of CHF3 combined with a polymer former, such as C2F6, C4F8, or CH2F2, and the non-selective etch includes a fluorocarbon or hydrocarbon, argon and an oxygen-containing gas, such as CO. The counterbore etch is preferably performed in a high-density plasma reactor which allows the plasma source region to be powered separately from a sheath bias located adjacent to the wafer pedestal.

    摘要翻译： 特别适用于通过沉孔工艺形成双镶嵌互连结构的电介质蚀刻工艺，其中在形成连接两个更多通孔的沟槽之前蚀刻深通孔。 单一的金属化填充了双镶嵌结构。 衬底形成有下停止层，下介电层，上阻挡层和上电介质层。 例如，电介质层可以是二氧化硅，并且阻挡层，氮化硅。 初始深通孔蚀刻包括至少两个子步骤。 第一子步骤包括通过上停止层的非选择性蚀刻，然后是选择性蚀刻穿过下介电层并停止在下停止层上的第二子步骤。 第一子步骤之前可以有另一子步骤，其中包括通过上电介质层的选择性蚀刻部分。 对于氧化物/氮化物组合物，选择性蚀刻基于碳氟化合物和氩气化学，优选用与聚合物形成剂如C 2 F 6，C 4 F 8或CH 2 F 2结合的CHF 3的贫蚀刻剂，并且非选择性蚀刻包括碳氟化合物 或烃，氩气和含氧气体，例如CO。沉孔蚀刻优选在高密度等离子体反应器中进行，其允许等离子体源区域与位于晶片基座附近的护套偏压分开供电。