公开(公告)号：US20210272747A1

公开(公告)日：2021-09-02

申请号：US16870969

申请日：2020-05-10

Applicant: CYNTEC CO., LTD.

Inventor： DA-JUNG CHEN ,  CHI-FENG HUANG

IPC: H01F27/32 ,  H01F27/29 ,  H05K1/16

Abstract: An electronic structure comprises: a circuit board, wherein a plurality of electronic devices and a transformer are disposed on the circuit board, the transformer comprises a first coil, a second coil, and a magnetic body, wherein a molding body encapsulates at least one portion of the outer surface of the first coil, at least one portion of the outer surface of the second coil, and the plurality of electronic devices for electrically isolating the plurality of electronic devices from the transformer.

公开(公告)号：US20180168045A1

公开(公告)日：2018-06-14

申请号：US15836860

申请日：2017-12-09

Applicant: CYNTEC CO., LTD.

Inventor： BAU-RU LU ,  CHUN HSIEN LU ,  DA-JUNG CHEN

IPC: H05K1/18 ,  H05K1/14 ,  H05K1/11

CPC classification number: H01F27/022 ,  H01F17/04 ,  H01F27/24 ,  H01F27/28 ,  H01F27/2823 ,  H01F27/32 ,  H01F27/36 ,  H01F41/00 ,  H05K1/111 ,  H05K1/115 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/041 ,  H05K2201/09063 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10522 ,  H05K2201/10545

Abstract: An electronic module is disclosed, wherein the electronic module comprises: a module board and a connection board, wherein a plurality of first electronic devices are disposed over a top surface of the module board, and a plurality of second electronic devices are disposed on a bottom surface of the module board, wherein a plurality of first contact points are disposed on the bottom surface of the module board and electrically connected to a plurality of second contact points on a top surface of the connection board, wherein a plurality of third contact points are on a bottom surface of the connection board for connecting with an external circuit.

公开(公告)号：US20210105898A1

公开(公告)日：2021-04-08

申请号：US16592786

申请日：2019-10-04

Applicant: CYNTEC CO., LTD.

Inventor： KAIPENG CHIANG ,  DA-JUNG CHEN ,  BAU-RU LU ,  CHUN HSIEN LU

IPC: H05K1/18 ,  H05K1/02 ,  H05K7/20 ,  H05K3/34 ,  H02M3/156

Abstract: An electronic module, such as a VRM, has a power inductor and power wave pins disposed on a bottom surface of a circuit board so as to reduce the size and increase the heat dissipation capability of the VRM.

公开(公告)号：US20170316954A1

公开(公告)日：2017-11-02

申请号：US15654703

申请日：2017-07-20

Applicant: CYNTEC CO., LTD.

Inventor： BAU-RU LU ,  DA-JUNG CHEN ,  YI-CHENG LIN

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/495 ,  H01L25/16 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer over the top surface or the bottom surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.

公开(公告)号：US20220007502A1

公开(公告)日：2022-01-06

申请号：US17477530

申请日：2021-09-17

Applicant: CYNTEC CO., LTD.

Inventor： KAIPENG CHIANG ,  DA-JUNG CHEN ,  BAU-RU LU ,  CHUN HSIEN LU

IPC: H05K1/02 ,  H05K1/14

Abstract: An electronic module, such as a VRM, has a power inductor and power wave pins disposed on a bottom surface of a circuit board so as to reduce the size and increase the heat dissipation capability of the VRM.

公开(公告)号：US20170047229A1

公开(公告)日：2017-02-16

申请号：US15334307

申请日：2016-10-26

Applicant: CYNTEC CO., LTD.

Inventor： BAU-RU LU ,  DA-JUNG CHEN ,  YI-CHENG LIN

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.

Abstract translation: 公开了一种形成导电结构的方法，所述方法包括以下步骤：形成具有彼此分离的多个金属部件的金属框架; 在所述多个金属部件的顶表面上形成绝缘层; 以及在所述绝缘层上形成导电图案层，用于与所述多个金属部件的至少一部分进行电连接。

公开(公告)号：US20230049094A1

公开(公告)日：2023-02-16

申请号：US17883648

申请日：2022-08-09

Applicant: CYNTEC CO., LTD.

Inventor： CHIEN MING CHEN ,  DA-JUNG CHEN

IPC: H05K1/14 ,  H05K1/18

Abstract: An electronic module, comprising an inductor, a first circuit board, and a second circuit board, wherein the first circuit board is disposed on a lateral surface of the body of the inductor with at least one electronic device being disposed on the first circuit board, wherein the second circuit board is disposed under the body of the inductor and electrically connected to the inductor.

公开(公告)号：US20220130585A1

公开(公告)日：2022-04-28

申请号：US17317902

申请日：2021-05-12

Applicant: CYNTEC CO., LTD.

Inventor： DA-JUNG CHEN ,  Chien Ming Chen

IPC: H01F27/02 ,  H01L25/16 ,  H01L49/02 ,  H01F27/29 ,  H01F27/28 ,  H01F27/26 ,  H01F41/00

Abstract: A stacked electronic module includes a magnetic device comprising a magnetic body with electrodes of the magnetic device being disposed on a top and bottom surface of the magnetic body, wherein a molding body encapsulates the magnetic body, wherein conductive layers are disposed on a top and bottom surface of the molding body for electrically connected to the electrodes of the magnetic device.

公开(公告)号：US20200176270A1

公开(公告)日：2020-06-04

申请号：US16782039

申请日：2020-02-04

Applicant: CYNTEC CO., LTD.

Inventor： BAU-RU LU ,  DA-JUNG CHEN ,  YI-CHENG LIN

IPC: H01L21/48 ,  H01L23/495 ,  H01L21/768 ,  H01L25/00 ,  H01L25/16 ,  H01L23/00

Abstract: A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.

公开(公告)号：US20170223834A1

公开(公告)日：2017-08-03

申请号：US15297190

申请日：2016-10-19

Applicant: CYNTEC CO., LTD.

Inventor： CHI-FENG HUANG ,  BAU-RU LU ,  DA-JUNG CHEN

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01F27/06 ,  H01F27/292 ,  H01F2027/065 ,  H01F2027/297 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10166 ,  H05K2201/10174

Abstract: A stacked electronic structure is provided. The stacked electronic structure includes: a magnetic device, electronic devices, and a substrate. The substrate is disposed under the magnetic device. First and second electronic devices are disposed between a bottom surface of the magnetic device and a top surface of the substrate. The first and second electronic devices comprise first and third terminals, disposed on first and second surfaces thereof, respectively, electrically connected to the magnetic device without using the substrate. The first and second electronic devices also comprise second and fourth terminals, disposed on second and fourth surfaces thereof, respectively, electrically connected to the substrate.