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公开(公告)号:US20140239489A1
公开(公告)日:2014-08-28
申请号:US14183754
申请日:2014-02-19
Applicant: DENSO CORPORATION
Inventor: Shuji YONEDA
IPC: H01L23/482
CPC classification number: H01L23/4822 , H01L23/49524 , H01L23/49551 , H01L23/49555 , H01L23/49562 , H01L23/49575 , H01L25/0655 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a semiconductor chip, multiple terminals arranged in a first direction, a resin portion sealing the semiconductor chip and the terminals. The terminals are projected from a side surface of the resin portion in a second direction, and include at least one subject terminal having a first portion and a second portion. In the subject terminal, a first longitudinal end of the first portion is positioned inside of the resin portion and a second longitudinal end of the first portion is positioned outside of the resin portion, and the second portion is arranged adjacent to the first portion. Further, a length of the first portion is greater than a length of the second portion in the third direction, and a length of the first portion is smaller than a length of the second portion in the first direction.
Abstract translation: 半导体器件包括半导体芯片,沿第一方向布置的多个端子,密封半导体芯片和端子的树脂部分。 端子从树脂部分的侧表面沿第二方向突出,并且包括至少一个具有第一部分和第二部分的对象端子。 在被检体端子中,第一部分的第一纵向端部位于树脂部分的内部,第一部分的第二纵向端部位于树脂部分的外侧,第二部分邻近第一部分布置。 此外,第一部分的长度大于第二部分在第三方向上的长度,并且第一部分的长度小于第一部分在第一方向上的长度。
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公开(公告)号:US20230037409A1
公开(公告)日:2023-02-09
申请号:US17972945
申请日:2022-10-25
Applicant: DENSO CORPORATION
Inventor: Masanori MIYATA , Shuji YONEDA , Masaru SENOO , Yuki YAKUSHIGAWA
IPC: H01L27/06 , H01L29/739 , H01L29/861 , H01L29/08
Abstract: In a semiconductor device, a semiconductor substrate has an IGBT region and a FWD, and includes a first conductivity type drift layer, a second conductivity type base layer disposed on the drift layer, a second conductivity type collector layer disposed opposite to the base layer with respect to the drift layer in the IGBT region, and a first conductivity type cathode layer disposed opposite to the base layer with respect to the drift layer in the FWD region. The collector layer includes an extension portion that covers only a part of the cathode layer on a side adjacent to the drift layer. Alternatively, the collector layer includes an extension portion that entirely covers a region of the cathode layer adjacent to the drift layer, and has an area density of 3.5×1012 cm−2 or less.
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公开(公告)号:US20190221658A1
公开(公告)日:2019-07-18
申请号:US16358756
申请日:2019-03-20
Applicant: DENSO CORPORATION
Inventor: Shuji YONEDA
IPC: H01L29/739 , H01L27/07 , H01L29/10 , H01L29/08
CPC classification number: H01L29/7397 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L27/0716 , H01L29/0804 , H01L29/0821 , H01L29/1095 , H01L29/739 , H01L29/78
Abstract: A semiconductor device includes: a semiconductor substrate providing a drift layer; a base layer; a plurality of trenches; an emitter region; an emitter electrode; a collector layer; a collector electrode; a main gate electrode for providing an inversion layer and a dummy gate electrode not providing the inversion layer; a common gate pad; a first element that is arranged between the dummy gate electrode and the gate pad, shuts down or restricts conduction when applying a first voltage, and permits the conduction when applying a second voltage; and a second element that is arranged between the emitter electrode and a connection point between the dummy gate electrode and the first element, permits the conduction when applying the first voltage, and shuts down or restricts the conduction when applying the second voltage.
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公开(公告)号:US20180323125A1
公开(公告)日:2018-11-08
申请号:US15772116
申请日:2017-03-13
Applicant: DENSO CORPORATION
Inventor: Shuji YONEDA , Daisuke FUKUOKA , Eiji HAYASHI
IPC: H01L23/31 , H01L23/00 , H01L23/495
CPC classification number: H01L23/3107 , H01L23/28 , H01L23/48 , H01L23/49537 , H01L23/49541 , H01L23/49562 , H01L23/49575 , H01L23/49582 , H01L24/29 , H01L24/48 , H01L2224/33 , H01L2224/48091 , H01L2224/48247 , H01L2924/181 , H01L2924/18301 , H01L2924/00012
Abstract: In an electronic device, an inner lead of a signal terminal includes a base member, and a film on a surface of the inner lead adjacent to a bonding surface. The film includes a metal thin film disposed on the surface of the base member and having a portion to which a bonding wire is connected, and an oxide film made of an oxide of the same metal as a metal being a main component of the metal thin film, and disposed in at least a part of a region of the metal thin film, excluding a connection region of a bonding wire. The oxide film includes an uneven oxide film having a surface with continuous asperities formed by irradiating the metal thin film with pulsed laser light. The uneven oxide film is disposed in at least a part of a front end region of the bonding surface.
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公开(公告)号:US20180212028A1
公开(公告)日:2018-07-26
申请号:US15878143
申请日:2018-01-23
Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA , DENSO CORPORATION
Inventor: Takashi KUNO , Hiroki TSUMA , Satoshi KUWANO , Akitaka SOENO , Toshitaka KANEMARU , Kenta HASHIMOTO , Noriyuki KAKIMOTO , Shuji YONEDA
IPC: H01L29/417 , H01L23/31 , H01L23/00 , H01L21/285 , H01L29/45 , H01L29/739 , H01L29/66
CPC classification number: H01L29/41708 , H01L21/28518 , H01L21/28568 , H01L21/32133 , H01L23/3157 , H01L23/3171 , H01L23/53223 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/29 , H01L29/0696 , H01L29/417 , H01L29/45 , H01L29/66348 , H01L29/7397 , H01L2224/034 , H01L2224/0361 , H01L2224/0401 , H01L2224/04026 , H01L2224/05018 , H01L2224/05076 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05124 , H01L2224/05155 , H01L2224/05224 , H01L2224/05347 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/05573 , H01L2224/05655 , H01L2924/3512 , H01L2924/00014 , H01L2924/01014
Abstract: A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.
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