公开(公告)号：US20130277850A1

公开(公告)日：2013-10-24

申请号：US13859175

申请日：2013-04-09

申请人： NAPRA CO., LTD.

发明人： Shigenobu Sekine ,  Yurina Sekine

IPC分类号： H01L23/48

CPC分类号： H01L23/48 ,  H01B1/22 ,  H01L21/4867 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49883 ,  H01L23/49894 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/16 ,  H01L31/022425 ,  H01L31/0682 ,  H01L33/62 ,  H01L2224/0332 ,  H01L2224/0341 ,  H01L2224/03848 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05205 ,  H01L2224/05209 ,  H01L2224/05211 ,  H01L2224/05213 ,  H01L2224/05318 ,  H01L2224/05324 ,  H01L2224/05338 ,  H01L2224/05339 ,  H01L2224/05344 ,  H01L2224/05347 ,  H01L2224/05355 ,  H01L2224/0536 ,  H01L2224/05366 ,  H01L2224/05369 ,  H01L2224/05562 ,  H01L2224/0569 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81375 ,  H01L2224/81395 ,  H01L2224/81505 ,  H01L2224/81509 ,  H01L2224/81511 ,  H01L2224/81513 ,  H01L2224/81618 ,  H01L2224/81624 ,  H01L2224/81638 ,  H01L2224/81639 ,  H01L2224/81644 ,  H01L2224/81647 ,  H01L2224/81655 ,  H01L2224/8166 ,  H01L2224/81666 ,  H01L2224/81669 ,  H01L2224/831 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/12041 ,  H01L2924/15747 ,  H01L2933/0016 ,  H01L2933/0066 ,  Y02E10/547 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2224/05552

摘要： An electronic device includes a substrate and an electronic component. The substrate has a metallization trace. The metallization trace has a metallization layer and a synthetic resin layer. The metallization layer has a high-melting-point metallic component and a low-melting-point metallic component. The high-melting-point metallic component and the low-melting-point metallic component are diffusion bonded together and adhered to a surface of the substrate. The synthetic resin layer is formed simultaneously with the metallization layer to cover a surface of the metallization layer with a thickness in the range of 5 nm to 1000 nm. The electronic component is electrically connected to the metallization layer.

摘要翻译： 电子设备包括基板和电子部件。 衬底具有金属化迹线。 金属化迹线具有金属化层和合成树脂层。 金属化层具有高熔点金属成分和低熔点金属成分。 高熔点金属成分和低熔点金属成分被扩散接合在一起并附着在基板的表面。 合成树脂层与金属化层同时形成，以覆盖金属化层的表面，厚度在5nm至1000nm的范围内。 电子部件电连接到金属化层。

公开(公告)号：US20180212028A1

公开(公告)日：2018-07-26

申请号：US15878143

申请日：2018-01-23

申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

发明人： Takashi KUNO ,  Hiroki TSUMA ,  Satoshi KUWANO ,  Akitaka SOENO ,  Toshitaka KANEMARU ,  Kenta HASHIMOTO ,  Noriyuki KAKIMOTO ,  Shuji YONEDA

IPC分类号： H01L29/417 ,  H01L23/31 ,  H01L23/00 ,  H01L21/285 ,  H01L29/45 ,  H01L29/739 ,  H01L29/66

CPC分类号： H01L29/41708 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/32133 ,  H01L23/3157 ,  H01L23/3171 ,  H01L23/53223 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/29 ,  H01L29/0696 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66348 ,  H01L29/7397 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05018 ,  H01L2224/05076 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05224 ,  H01L2224/05347 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/01014

摘要： A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.

公开(公告)号：US20240194623A1

公开(公告)日：2024-06-13

申请号：US18554923

申请日：2022-03-08

申请人： TDK ELECTRONICS AG

发明人： Mehrdad Shayganpoor ,  Guenter Aflenzer ,  Davor Tomassevic ,  Thomas Feichtinger

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L21/784 ,  H01L23/31

CPC分类号： H01L24/05 ,  H01L21/561 ,  H01L23/3171 ,  H01L24/02 ,  H01L24/03 ,  H01L24/06 ,  H01L24/95 ,  H01L21/784 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/03422 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/0529 ,  H01L2224/05339 ,  H01L2224/05347 ,  H01L2224/05548 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/95001 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/1203

摘要： A semiconductor die and a method for manufacturing a semiconductor die are disclosed. In an embodiment a semiconductor die includes a base body having a semiconductor material and a surface with two contact areas having contact pads at which the semiconductor die is electrically contactable and two metal caps arranged directly at the contact pads.

公开(公告)号：US20230411317A1

公开(公告)日：2023-12-21

申请号：US18207658

申请日：2023-06-08

申请人： WALTON ADVANCED ENGINEERING, INC.

发明人： HONG-CHI YU ,  CHUN-JUNG LIN ,  RUEI-TING GU

IPC分类号： H01L23/00

CPC分类号： H01L24/02 ,  H01L2224/13021 ,  H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L2224/0231 ,  H01L2224/0239 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2224/02331 ,  H01L2224/0343 ,  H01L2224/0384 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/0579 ,  H01L2224/05839 ,  H01L2224/05847 ,  H01L2224/05008 ,  H01L2224/05083 ,  H01L2224/0529 ,  H01L2224/05339 ,  H01L2224/05347 ,  H01L2224/05562 ,  H01L2224/05573 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L24/13

摘要： A chip package which includes a chip, at least one first dielectric layer, at least one second dielectric layer, at least one conductive circuit, and at least one third dielectric layer is provide. The conductive circuit is formed by highly concentrated silver paste or copper paste filled in at least one first groove of the first dielectric layer and at least one second groove of the second dielectric layer while at least one die pad of the chip is electrically connected with the conductive circuit for improving electrical conduction efficiency of the conductive circuit. Moreover, at least one die-pad bump is formed in the first groove, arranged at and electrically connected with a surface of the die pad for protecting of the die pad.

公开(公告)号：US20170271285A1

公开(公告)日：2017-09-21

申请号：US15072655

申请日：2016-03-17

申请人： GLOBALFOUNDRIES INC.

发明人： Richard S. Graf ,  Kibby B. Horsford ,  Sudeep Mandal

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0332 ,  H01L2224/03464 ,  H01L2224/0362 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/0519 ,  H01L2224/0529 ,  H01L2224/05339 ,  H01L2224/05344 ,  H01L2224/05347 ,  H01L2224/05355 ,  H01L2224/0539 ,  H01L2224/05444 ,  H01L2224/05455 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1319 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01005 ,  H01L2924/01015

摘要： A conductive polymer-solder ball structure is provided. The conductive polymer-solder ball structure includes a wafer having at least one metal pad providing an electrical conductive path to a substrate layer, a conductive polymer pad located directly on the wafer over the at least one metal pad, an electrolessly plated layer located on a surface of the conductive polymer pad, and a solder ball located on a surface of the electrolessly plated layer.