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公开(公告)号:US11990435B2
公开(公告)日:2024-05-21
申请号:US17867287
申请日:2022-07-18
Applicant: Amkor Technology Singapore Holding Pte. Ltd.
Inventor: Sung Sun Park , Ji Young Chung , Christopher Berry
IPC: G06V40/13 , B81C3/00 , H01L23/00 , H01L23/053 , H01L23/31
CPC classification number: H01L24/05 , B81C3/00 , G06V40/13 , G06V40/1329 , H01L23/053 , H01L24/16 , H01L24/32 , H01L24/73 , H01L23/3128 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/33 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/0345 , H01L2224/03452 , H01L2224/03464 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05684 , H01L2224/1132 , H01L2224/11334 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/119 , H01L2224/13013 , H01L2224/13014 , H01L2224/131 , H01L2224/13111 , H01L2224/13147 , H01L2224/13294 , H01L2224/133 , H01L2224/16227 , H01L2224/27312 , H01L2224/2732 , H01L2224/27622 , H01L2224/2784 , H01L2224/29006 , H01L2224/29007 , H01L2224/29011 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/29299 , H01L2224/2939 , H01L2224/32225 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/8146 , H01L2224/81464 , H01L2224/81466 , H01L2224/81471 , H01L2224/81484 , H01L2224/81815 , H01L2224/8185 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/9211 , H01L2224/92125 , H01L2224/92225 , H01L2924/014 , H01L2924/1815 , H01L2924/18161 , H01L2224/131 , H01L2924/014 , H01L2224/13147 , H01L2924/00014 , H01L2224/13111 , H01L2924/01082 , H01L2224/13111 , H01L2924/01082 , H01L2924/01047 , H01L2224/13111 , H01L2924/01082 , H01L2924/01083 , H01L2224/13111 , H01L2924/01029 , H01L2224/13111 , H01L2924/01047 , H01L2224/13111 , H01L2924/01079 , H01L2224/13111 , H01L2924/01083 , H01L2224/13111 , H01L2924/01047 , H01L2924/01029 , H01L2224/13111 , H01L2924/01047 , H01L2924/01083 , H01L2224/13111 , H01L2924/0103 , H01L2224/13111 , H01L2924/0103 , H01L2924/01083 , H01L2224/11334 , H01L2924/00014 , H01L2224/1146 , H01L2924/00014 , H01L2224/1132 , H01L2924/00014 , H01L2224/11849 , H01L2924/00014 , H01L2224/05647 , H01L2924/00014 , H01L2224/05624 , H01L2924/00014 , H01L2224/05639 , H01L2924/00014 , H01L2224/05644 , H01L2924/00014 , H01L2224/05655 , H01L2924/00014 , H01L2224/0345 , H01L2924/00014 , H01L2224/03464 , H01L2924/00014 , H01L2224/03452 , H01L2924/00014 , H01L2224/05147 , H01L2924/00014 , H01L2224/05124 , H01L2924/00014 , H01L2224/05139 , H01L2924/00014 , H01L2224/05144 , H01L2924/00014 , H01L2224/05155 , H01L2924/00014 , H01L2224/0347 , H01L2924/00014 , H01L2224/1147 , H01L2924/00014 , H01L2224/05666 , H01L2924/01074 , H01L2224/05671 , H01L2924/00014 , H01L2224/05666 , H01L2924/01028 , H01L2224/0361 , H01L2924/00014 , H01L2224/119 , H01L2224/034 , H01L2224/1147 , H01L2224/034 , H01L2224/114 , H01L2224/0361 , H01L2224/13294 , H01L2924/00014 , H01L2224/133 , H01L2924/014 , H01L2224/81203 , H01L2924/00014 , H01L2224/81815 , H01L2924/00014 , H01L2224/2919 , H01L2924/0665 , H01L2224/2929 , H01L2924/0665 , H01L2224/2919 , H01L2924/07025 , H01L2224/2929 , H01L2924/07025 , H01L2224/2919 , H01L2924/069 , H01L2224/2929 , H01L2924/069 , H01L2224/83102 , H01L2924/00014 , H01L2224/83101 , H01L2924/00014 , H01L2224/9211 , H01L2224/81 , H01L2224/83 , H01L2224/29294 , H01L2924/00014 , H01L2224/2939 , H01L2924/00014 , H01L2224/29299 , H01L2924/00014 , H01L2224/27622 , H01L2924/00014 , H01L2224/2732 , H01L2924/00014 , H01L2224/27312 , H01L2924/00014 , H01L2224/81447 , H01L2924/00014 , H01L2224/81424 , H01L2924/00014 , H01L2224/81455 , H01L2924/00014 , H01L2224/8146 , H01L2924/00014 , H01L2224/81439 , H01L2924/00014 , H01L2224/81464 , H01L2924/00014 , H01L2224/81484 , H01L2924/00014 , H01L2224/81444 , H01L2924/00014 , H01L2224/81466 , H01L2924/00014 , H01L2224/81471 , H01L2924/00014 , H01L2224/8185 , H01L2924/00012 , H01L2224/05166 , H01L2924/00014 , H01L2224/05684 , H01L2924/00014
Abstract: A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.
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公开(公告)号:US09831201B2
公开(公告)日:2017-11-28
申请号:US14644473
申请日:2015-03-11
Applicant: Guy F. Burgess , Theodore Gerard Tessier , Anthony Paul Curtis , Lillian Charell Thompson
IPC: H01L23/00
CPC classification number: H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/03426 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05172 , H01L2224/05184 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05672 , H01L2224/05684 , H01L2224/1132 , H01L2224/1147 , H01L2224/11474 , H01L2224/11505 , H01L2224/11849 , H01L2224/119 , H01L2224/11902 , H01L2224/13006 , H01L2224/13007 , H01L2224/13012 , H01L2224/13013 , H01L2224/13014 , H01L2224/132 , H01L2224/13294 , H01L2224/133 , H01L2224/13301 , H01L2224/13305 , H01L2224/13309 , H01L2224/13311 , H01L2224/13313 , H01L2224/13316 , H01L2224/13318 , H01L2224/1332 , H01L2224/13324 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/13364 , H01L2224/1403 , H01L2224/14051 , H01L2924/00015 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01046 , H01L2924/01047 , H01L2924/01048 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/381 , H01L2224/11462 , H01L2924/00014 , H01L2924/00012 , H01L2224/034 , H01L2224/036
Abstract: The subject matter contained herein discloses methods for forming a vertical metallic pillar overlying an under bump metal pad further overlying a semiconductor substrate, and applying a discrete solder cap on a top surface of the pillar, wherein the metallic pillar is defined by at least one photoresist layer. The method includes heating a multi-element metallic paste containing a variable amount of metallic powder, a melting point depressant and a flux such that the metal powder sinters to form the metallic pillar and simultaneously adheres the metallic pillar to the underbump metal pad.
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公开(公告)号:US09698113B2
公开(公告)日:2017-07-04
申请号:US15221856
申请日:2016-07-28
Inventor: Qifeng Wang
CPC classification number: H01L24/11 , H01J37/32 , H01L21/02068 , H01L21/50 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/0231 , H01L2224/0239 , H01L2224/034 , H01L2224/0361 , H01L2224/0381 , H01L2224/0401 , H01L2224/05024 , H01L2224/05082 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05567 , H01L2224/05569 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/05666 , H01L2224/1181 , H01L2224/13024 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/13166 , H01L2224/81013 , H01L2224/81022 , H01L2924/01013 , H01L2924/01029 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/07025 , H01L2924/3841 , H01L2924/00014
Abstract: A method for treating a chip packaging structure includes providing a chip packaging structure having at least a first electrical connect structure and a second electrical connect structure, and an insulation layer exposing portions of the first electrical connect structure and the second electrical connect structure; selecting a plasma gas based on materials of the first electrical connect structure and the second electrical connect structure and a type of process forming the first electrical connect structure and the second electrical connect structure, wherein metal cations are left on the insulation layer; performing a plasma treatment process using the selected plasma gas on the first electrical connect structure, the second electrical connect structure and the insulation layer, causing reaction of the metal cations to substantially convert the metal cations into electrically neutral materials; and removing the reacted metal cations from the insulation layer.
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公开(公告)号:US20170133337A1
公开(公告)日:2017-05-11
申请号:US15411204
申请日:2017-01-20
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Chien-Lung Chuang , Po-Yi Wu , Meng-Tsung Lee , Yih-Jenn Jiang
IPC: H01L23/00
CPC classification number: H01L24/11 , H01L23/3157 , H01L24/13 , H01L2224/02126 , H01L2224/0231 , H01L2224/0239 , H01L2224/024 , H01L2224/03 , H01L2224/034 , H01L2224/0361 , H01L2224/03614 , H01L2224/03622 , H01L2224/03912 , H01L2224/0401 , H01L2224/05 , H01L2224/05018 , H01L2224/05027 , H01L2224/05082 , H01L2224/05147 , H01L2224/05166 , H01L2224/05558 , H01L2224/05562 , H01L2224/05569 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/10126 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13 , H01L2224/13006 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/00014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/05042 , H01L2924/05442 , H01L2924/06 , H01L2924/07025 , H01L2924/2064 , H01L2924/37001 , H01L2924/00012 , H01L2924/014 , H01L2224/05552
Abstract: A packaging substrate includes a base body having at least a conductive pad on a surface thereof, a dielectric layer formed on the surface of the base body and having at least a first opening for exposing the conductive pad and at least a second opening formed at a periphery of the first opening, and a metal layer formed on the conductive pad and the dielectric layer and extending to a sidewall of the second opening, thereby effectively eliminating side-etching of the metal layer under a solder bump.
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5.
公开(公告)号:US20160268223A1
公开(公告)日:2016-09-15
申请号:US14644473
申请日:2015-03-11
Applicant: Flipchip International LLC
IPC: H01L23/00
CPC classification number: H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/03426 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05172 , H01L2224/05184 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05672 , H01L2224/05684 , H01L2224/1132 , H01L2224/1147 , H01L2224/11474 , H01L2224/11505 , H01L2224/11849 , H01L2224/119 , H01L2224/11902 , H01L2224/13006 , H01L2224/13007 , H01L2224/13012 , H01L2224/13013 , H01L2224/13014 , H01L2224/132 , H01L2224/13294 , H01L2224/133 , H01L2224/13301 , H01L2224/13305 , H01L2224/13309 , H01L2224/13311 , H01L2224/13313 , H01L2224/13316 , H01L2224/13318 , H01L2224/1332 , H01L2224/13324 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/13364 , H01L2224/1403 , H01L2224/14051 , H01L2924/00015 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01046 , H01L2924/01047 , H01L2924/01048 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/381 , H01L2224/11462 , H01L2924/00014 , H01L2924/00012 , H01L2224/034 , H01L2224/036
Abstract: The subject matter contained herein discloses methods for forming a vertical metallic pillar overlying an under bump metal pad further overlying a semiconductor substrate, and applying a discrete solder cap on a top surface of the pillar, wherein the metallic pillar is defined by at least one photoresist layer. The method includes heating a multi-element metallic paste containing a variable amount of metallic powder, a melting point depressant and a flux such that the metal powder sinters to form the metallic pillar and simultaneously adheres the metallic pillar to the underbump metal pad.
Abstract translation: 本文包含的主题公开了用于形成垂直金属柱的方法,所述垂直金属柱覆盖在半导体衬底上的下凸块金属焊盘上,并且在柱的顶表面上施加分立的焊料帽,其中金属柱由至少一个光致抗蚀剂 层。 该方法包括加热含有可变量的金属粉末,熔点降低剂和助熔剂的多元素金属膏,使得金属粉末烧结形成金属柱,同时将金属柱粘附到底部金属垫上。
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公开(公告)号:US09355937B2
公开(公告)日:2016-05-31
申请号:US14465884
申请日:2014-08-22
Applicant: Mitsubishi Electric Corporation
Inventor: Hidetoshi Koyama
IPC: H01L23/482 , H01L23/48 , H01L23/00
CPC classification number: H01L23/4827 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/29 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/0361 , H01L2224/039 , H01L2224/04026 , H01L2224/05005 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05116 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05169 , H01L2224/05179 , H01L2224/05187 , H01L2224/05561 , H01L2224/05564 , H01L2224/05644 , H01L2224/29022 , H01L2224/291 , H01L2224/29144 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2924/054 , H01L2924/01028 , H01L2924/01078 , H01L2924/0544 , H01L2924/01082 , H01L2924/05341 , H01L2924/0539 , H01L2924/01027 , H01L2924/0105 , H01L2224/034
Abstract: A semiconductor device includes a semiconductor substrate, a first metal layer, a barrier metal layer, and a second metal layer. The semiconductor substrate includes a front surface and a back surface. A semiconductor element and an electrode of the semiconductor element are located on the front surface. An opening in the back surface reaches a lower surface of the electrode, and the opening is defined by a side surface and a bottom surface. The first metal layer covers the side surface and the bottom surface. The barrier metal layer covers the first metal layer in the opening. The second metal layer is in contact with solder in the opening and is closer to the electrode than parts of the barrier metal layer. The second metal layer is laminated on the barrier metal layer and covers at least a part of the barrier metal layer in the opening.
Abstract translation: 半导体器件包括半导体衬底,第一金属层,阻挡金属层和第二金属层。 半导体衬底包括前表面和后表面。 半导体元件的半导体元件和电极位于前表面。 后表面的开口到达电极的下表面,并且开口由侧表面和底表面限定。 第一金属层覆盖侧表面和底表面。 阻挡金属层覆盖开口中的第一金属层。 第二金属层与开口中的焊料接触,并且比阻挡金属层的部分更接近电极。 第二金属层被层压在阻挡金属层上并且覆盖开口中的阻挡金属层的至少一部分。
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公开(公告)号:US09331037B2
公开(公告)日:2016-05-03
申请号:US14886177
申请日:2015-10-19
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Timothy H. Daubenspeck , Jeffrey P. Gambino , Christopher D. Muzzy , Wolfgang Sauter , Timothy D. Sullivan
CPC classification number: H01L24/11 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/034 , H01L2224/03845 , H01L2224/03912 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05556 , H01L2224/05558 , H01L2224/05572 , H01L2224/05573 , H01L2224/11011 , H01L2224/1134 , H01L2224/11472 , H01L2224/11616 , H01L2224/1162 , H01L2224/1182 , H01L2224/11849 , H01L2224/13017 , H01L2224/13027 , H01L2224/131 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L2924/2064
Abstract: “Thick line dies” that, during manufacture, avoid locating an upstanding edge of a photoresist layer (for example, the edge of a dry film photoresist layer) on top of a “discontinuity.” In this way solder does not flow into the mechanical interface between the photoresist layer and the layer under the photoresist layer in the vicinity of an upstanding edge of the photoresist layer.
Abstract translation: “粗线模具”,在制造过程中,避免在“不连续”的顶部定位光致抗蚀剂层(例如,干膜光致抗蚀剂层的边缘)的直立边缘。这样焊料不会流入机械 光致抗蚀剂层和光致抗蚀剂层下面的层之间在光致抗蚀剂层的直立边缘附近的界面。
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公开(公告)号:US20160093581A1
公开(公告)日:2016-03-31
申请号:US14957115
申请日:2015-12-02
Applicant: SK hynix Inc.
Inventor: Rae Hyung JEONG , Hyun Kyu RYU
IPC: H01L23/00
CPC classification number: H01L24/05 , H01L21/6835 , H01L21/76898 , H01L23/3114 , H01L23/3192 , H01L23/481 , H01L24/03 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L25/0657 , H01L2221/68327 , H01L2221/6834 , H01L2224/02372 , H01L2224/03002 , H01L2224/0345 , H01L2224/03614 , H01L2224/0391 , H01L2224/0401 , H01L2224/05008 , H01L2224/05073 , H01L2224/05082 , H01L2224/05083 , H01L2224/05155 , H01L2224/05166 , H01L2224/05557 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05664 , H01L2224/05666 , H01L2224/05671 , H01L2224/05673 , H01L2224/06051 , H01L2224/06102 , H01L2224/10126 , H01L2224/11002 , H01L2224/1146 , H01L2224/1147 , H01L2224/11845 , H01L2224/119 , H01L2224/13018 , H01L2224/13022 , H01L2224/13025 , H01L2224/13026 , H01L2224/13082 , H01L2224/13083 , H01L2224/13084 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13565 , H01L2224/13582 , H01L2224/13583 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13657 , H01L2224/13664 , H01L2224/13666 , H01L2224/13671 , H01L2224/13673 , H01L2224/14051 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2225/06513 , H01L2225/06544 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01079 , H01L2924/05042 , H01L2924/05442 , H01L2924/059 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L21/304 , H01L21/56 , H01L2224/034 , H01L2224/114 , H01L2224/1184 , H01L2224/03612
Abstract: A semiconductor device includes a through electrode penetrating a substrate such that a first end portion of the through electrode protrudes from a first surface of the substrate, a passivation layer covering the first surface of the substrate and a sidewall of the first end portion of the through electrode, a bump having a lower portion penetrating the passivation layer and coupled to the first end portion of the through electrode, and a lower metal layer disposed between the bump and the first end portion of the through electrode. The lower metal layer extends onto a sidewall of the bump and has a concave shape.
Abstract translation: 一种半导体器件包括穿透基片的通孔,使得通孔的第一端部从基板的第一表面突出,覆盖基板的第一表面的钝化层和通孔的第一端部的侧壁 电极,具有穿透钝化层的下部并且连接到通孔的第一端部的凸块以及设置在凸块与通孔的第一端部之间的下金属层。 下部金属层延伸到凸块的侧壁上并具有凹形。
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公开(公告)号:US09159685B2
公开(公告)日:2015-10-13
申请号:US14494026
申请日:2014-09-23
Applicant: CHIPMOS TECHNOLOGIES INC.
Inventor: Geng-Shin Shen , Chung-Pang Chi
CPC classification number: H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2224/034 , H01L2224/03602 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05073 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05172 , H01L2224/05184 , H01L2224/05571 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/1132 , H01L2224/11462 , H01L2224/1148 , H01L2224/11831 , H01L2224/1184 , H01L2224/11845 , H01L2224/13022 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1329 , H01L2224/133 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/00012 , H01L2224/05552
Abstract: A conductive structure for a semiconductor chip and a method for forming the conductive structure are provided. The semiconductor chip comprises a semiconductor substrate, a pad, a passivation layer and a patterned insulating layer. The patterned insulating layer is disposed on the passivation layer and partially and directly covers the first opening of the pad to expose a second opening. The conductive structure comprises an under bump metal (UBM) layer and a conductive bump. The UBM layer is disposed in the second opening defined by the patterned insulating layer and is electrically connected to the pad. The conductive bump is disposed on the UBM layer and is electrically connected to the UBM layer. The upper surface of the conductive bump is greater than the upper surface of the patterned insulating layer, while the portion of the conductive bump disposed in the second opening is covered by the UBM layer.
Abstract translation: 提供了一种用于半导体芯片的导电结构和用于形成导电结构的方法。 半导体芯片包括半导体衬底,衬垫,钝化层和图案化绝缘层。 图案化的绝缘层设置在钝化层上,并且部分地并且直接覆盖焊盘的第一开口以露出第二开口。 导电结构包括凹凸金属(UBM)层和导电凸块。 UBM层设置在由图案化的绝缘层限定的第二开口中,并且电连接到焊盘。 导电凸块设置在UBM层上并与UBM层电连接。 导电凸块的上表面大于图案化绝缘层的上表面,而布置在第二开口中的导电凸块的部分被UBM层覆盖。
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公开(公告)号:US09111064B2
公开(公告)日:2015-08-18
申请号:US14317763
申请日:2014-06-27
Inventor: Chih-Wei Lai , Ming-Che Ho , Tzong-Hann Yang , Chien Rhone Wang , Chia-Tung Chang , Hung-Jui Kuo , Chung-Shi Liu
IPC: H01L21/44 , G06F17/50 , H01L23/488 , H01L23/00
CPC classification number: G06F17/5077 , G06F17/5072 , H01L23/488 , H01L24/11 , H01L24/13 , H01L24/14 , H01L2224/034 , H01L2224/03912 , H01L2224/0401 , H01L2224/05016 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05552 , H01L2224/05572 , H01L2224/05666 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11849 , H01L2224/13006 , H01L2224/13012 , H01L2224/13014 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/1403 , H01L2224/14132 , H01L2924/00014 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029
Abstract: A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component.
Abstract translation: 一种装置包括在包装部件的顶表面上的多个连接器。 多个连接器包括具有第一横向尺寸的第一连接器和具有第二横向尺寸的第二连接器。 第二横向尺寸大于第一横向尺寸。 第一和第二横向尺寸在平行于包装部件的主表面的方向上测量。
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