公开(公告)号：US20060068579A1

公开(公告)日：2006-03-30

申请号：US10954999

申请日：2004-09-29

申请人： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen Lehman ,  Mitesh Patel ,  Tiffany Byrne ,  Edward Martin ,  Mohd Erwan Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt Chin

发明人： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen Lehman ,  Mitesh Patel ,  Tiffany Byrne ,  Edward Martin ,  Mohd Erwan Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt Chin

IPC分类号： H01L21/44

CPC分类号： H05K3/3436 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/3463 ,  H05K2201/10977 ,  H05K2203/0126 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.

摘要翻译： 通过在基底下表面上分配聚合物以部分地嵌入设置在下表面上的低熔点焊料凸点的条件来形成应力消除层。 应力消除层流向低熔点焊料凸块。 应力补偿轴环形成在与基板相配合的基板上，并且应力补偿套环部分嵌入低熔点焊料凸块。 还包括展示应力消除层和应力补偿套环的物品。 还包括包括低熔点焊料，应力消除层和应力补偿环的计算系统。

公开(公告)号：US07291548B2

公开(公告)日：2007-11-06

申请号：US11736280

申请日：2007-04-17

申请人： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen E. Lehman ,  Mitesh Patel ,  Tiffany A. Byrne ,  Edward L. Martin ,  Mohd Erwan B. Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

发明人： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen E. Lehman ,  Mitesh Patel ,  Tiffany A. Byrne ,  Edward L. Martin ,  Mohd Erwan B. Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

IPC分类号： H01L21/44

CPC分类号： H05K3/3436 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/3463 ,  H05K2201/10977 ,  H05K2203/0126 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.

摘要翻译： 通过在基底下表面上分配聚合物以部分地嵌入设置在下表面上的低熔点焊料凸点的条件来形成应力消除层。 应力消除层流向低熔点焊料凸块。 应力补偿轴环形成在与基板相配合的基板上，并且应力补偿套环部分嵌入低熔点焊料凸块。 还包括展示应力消除层和应力补偿套环的物品。 还包括包括低熔点焊料，应力消除层和应力补偿环的计算系统。

公开(公告)号：US07253088B2

公开(公告)日：2007-08-07

申请号：US10954999

申请日：2004-09-29

申请人： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen E. Lehman ,  Mitesh Patel ,  Tiffany A. Byrne ,  Edward L. Martin ,  Mohd Erwan B. Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

发明人： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen E. Lehman ,  Mitesh Patel ,  Tiffany A. Byrne ,  Edward L. Martin ,  Mohd Erwan B. Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

IPC分类号： H01L21/44

CPC分类号： H05K3/3436 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/3463 ,  H05K2201/10977 ,  H05K2203/0126 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.

公开(公告)号：US07244634B2

公开(公告)日：2007-07-17

申请号：US10815968

申请日：2004-03-31

申请人： Daewoong Suh ,  Saikumar Jayaraman ,  Mohd Erwan P. Bin Basiron ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

发明人： Daewoong Suh ,  Saikumar Jayaraman ,  Mohd Erwan P. Bin Basiron ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

IPC分类号： H01L21/00

CPC分类号： H05K3/3436 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K2201/10977 ,  H05K2203/0126 ,  H05K2203/1189 ,  Y02P70/613 ,  H01L2224/05599

摘要： A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a solder bump that is disposed upon the lower surface. The stress-relief layer flows against the solder bump. A stress-compensation collar is formed on a board to which the substrate is mated and the SCC partially embeds the solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes a stress-relief layer and a stress-compensation collar is also included.

摘要翻译： 通过在基底下表面上分配聚合物以部分地嵌入设置在下表面上的焊料凸块的条件来形成应力消除层。 应力消除层流向焊料凸块。 应力补偿轴环形成在与基板配合的板上，并且SCC部分地嵌入焊料凸块。 还包括展示应力消除层和应力补偿套环的物品。 还包括一个包括应力消除层和应力补偿环的计算系统。

公开(公告)号：US07088010B2

公开(公告)日：2006-08-08

申请号：US10740283

申请日：2003-12-18

申请人： Sheau Hooi Lim ,  Choong Kooi Chee

发明人： Sheau Hooi Lim ,  Choong Kooi Chee

IPC分类号： H01L23/14 ,  H01L23/29

CPC分类号： H01L23/293 ,  H01L21/563 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system for chip packaging includes an adamantoid packaging composition. The adamantoid composition ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In an embodiment, the system includes a packaging composition that alone exhibits a CTE that is characteristic of an inorganic-filled underfill composite previously known. An embodiment is also directed to the assembly of a chip package that uses an adamantoid packaging composition.

摘要翻译： 用于芯片封装的系统包括adamantoid包装组合物。 adamantoid组合物改善了通常在包装的模具和浸渍树脂的玻璃纤维安装基板之间存在的CTE失配。 在一个实施方案中，该系统包括单独显示作为先前已知的无机填充的底部填充复合材料特征的CTE的包装组合物。 一个实施例还涉及使用Adamantoid包装组合物的芯片封装的组装。