公开(公告)号：US20060138591A1

公开(公告)日：2006-06-29

申请号：US11289994

申请日：2005-11-30

Applicant: Daniel Amey ,  Sounak Banerji ,  William Borland ,  Karl Dietz ,  David McGregor ,  Attiganal Sreeram

Inventor： Daniel Amey ,  Sounak Banerji ,  William Borland ,  Karl Dietz ,  David McGregor ,  Attiganal Sreeram

IPC: H01L29/00

CPC classification number: H01L23/66 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09763 ,  H01L2224/0401

Abstract: The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply a charge to said at least one embedded singulated capacitor; and wherein said at least one embedded singulated capacitor is connected in parallel to at least one of the said planar capacitor laminates; and wherein said power core is interconnected to at least one signal layer.

Abstract translation: 本发明涉及一种包括功率核心的器件，其中所述功率核心包括：至少一个嵌入的单个电容器层，其包含至少一个嵌入式单电容器; 和至少一个平面电容器层压板; 其中所述平面电容器层叠体用作低电感路径以向所述至少一个嵌入式分离电容器提供电荷; 并且其中所述至少一个嵌入式单电容器与所述平面电容器层压体中的至少一个并联连接; 并且其中所述功率核心与至少一个信号层相互连接。

公开(公告)号：US20060133057A1

公开(公告)日：2006-06-22

申请号：US11289961

申请日：2005-11-30

Applicant: David McGregor ,  Daniel Amey ,  Sounak Banerji ,  William Borland ,  Karl Dietz ,  Attiganal Sreeram

Inventor： David McGregor ,  Daniel Amey ,  Sounak Banerji ,  William Borland ,  Karl Dietz ,  Attiganal Sreeram

IPC: H05K7/06

CPC classification number: H05K1/186 ,  H05K1/0231 ,  H05K1/162 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/10636 ,  Y02P70/611

Abstract: The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.

Abstract translation: 电源核心技术领域本发明涉及一种功率核心，包括：至少一个嵌入式表面贴装技术（SMT）离散芯片电容器层，包括至少一个嵌入式SMT分立片式电容器; 和至少一个平面电容器层压板; 其中至少一个平面电容器层叠体用作低电感路径以向至少一个嵌入式SMT分立片式电容器提供电荷; 并且其中所述嵌入式SMT分立片式电容器与所述平面电容层叠体并联连接。

公开(公告)号：US20060158828A1

公开(公告)日：2006-07-20

申请号：US11289884

申请日：2005-11-30

Applicant: Daniel Amey ,  Sounak Banerji ,  William Borland ,  David McGregor ,  Attiganal Sreeram ,  Karl Dietz

Inventor： Daniel Amey ,  Sounak Banerji ,  William Borland ,  David McGregor ,  Attiganal Sreeram ,  Karl Dietz

IPC: H01G4/06

CPC classification number: H05K1/162 ,  H01L2924/0002 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09763 ,  H01L2924/00

Abstract: A power core comprising: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded singulated capacitor; and wherein said embedded singulated capacitor is connected in parallel to said planar capacitor laminate.

Abstract translation: 一种功率核心，包括：至少一个嵌入的单个电容器层，其包含至少一个嵌入式单电容器; 和至少一个平面电容器层压板; 其中至少一个平面电容器层叠体用作低电感路径，以向至少一个嵌入的单个电容器提供电荷; 并且其中所述嵌入式单电容器与所述平面电容器层压体并联连接。

公开(公告)号：US20070244267A1

公开(公告)日：2007-10-18

申请号：US11401150

申请日：2006-04-10

Applicant: Thomas Dueber ,  John Summers ,  William Borland ,  Olga Renovales ,  Diptarka Majumdar ,  Daniel Amey

Inventor： Thomas Dueber ,  John Summers ,  William Borland ,  Olga Renovales ,  Diptarka Majumdar ,  Daniel Amey

IPC: C08L63/00

CPC classification number: H05K1/162 ,  C08G59/24 ,  C08G59/621 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09763

Abstract: Compositions comprising: an epoxy containing cyclic olefin resin with a water absorption of 2% or less; one or more phenolic resins with water absorption of less than 2% or less; an epoxy catalyst; optionally one or more of an electrically insulated filler, a defoamer and a colorant and one or more organic solvents. The compositions are useful as encapsulants and have a cure temperature of 190° C. or less.

Abstract translation: 组合物，其包含：含有环氧树脂的环状烯烃树脂，其吸水率为2％以下; 一种或多种吸水率小于2％的酚醛树脂; 环氧催化剂; 任选地一种或多种电绝缘填料，消泡剂和着色剂以及一种或多种有机溶剂。 该组合物可用作密封剂并具有190℃或更低的固化温度。

公开(公告)号：US20070138633A1

公开(公告)日：2007-06-21

申请号：US11313562

申请日：2005-12-21

Applicant: Daniel Amey ,  William Borland

Inventor： Daniel Amey ,  William Borland

IPC: H01L23/34

CPC classification number: H01G4/30 ,  H01G4/232 ,  H01G4/33 ,  H01L23/50 ,  H01L23/66 ,  H01L27/013 ,  H01L2924/0002 ,  H01L2924/19103 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/09763 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00

Abstract: Thick-film capacitors are formed on ceramic interconnect substrates having high capacitance densities and other desirable electrical and physical properties. The capacitor dielectrics are fired at high temperatures.

Abstract translation: 在具有高电容密度和其它所需电气和物理特性的陶瓷互连基板上形成厚膜电容器。 电容器电介质在高温下烧制。

公开(公告)号：US20060208621A1

公开(公告)日：2006-09-21

申请号：US11436152

申请日：2006-05-17

Applicant: Daniel Amey

Inventor： Daniel Amey

IPC: H01J1/14 ,  H01J1/05

CPC classification number: H01J3/021

Abstract: Multilayer cathode backplate structures are provided for use with a field emitter in display panels. Processes for making the structures are also disclosed. The backplate structures are made of a plurality of electrodes separated by one or more patterned layers of a dielectric composition.

Abstract translation: 提供多层阴极背板结构，用于显示面板中的场发射器。 还公开了用于制造结构的方法。 背板结构由多个由电介质组合物的一个或多个图案化层隔开的电极制成。