公开(公告)号：US20230326883A1

公开(公告)日：2023-10-12

申请号：US18210286

申请日：2023-06-15

申请人： STMicroelectronics (Rousset) SAS

发明人： Abderrezak MARZAKI ,  Pascal FORNARA

IPC分类号： H01L23/00 ,  G04F1/00 ,  H01L21/70 ,  H01L27/01 ,  H01L27/10

CPC分类号： H01L23/573 ,  G04F1/005 ,  H01L21/705 ,  H01L27/013 ,  H01L27/101

摘要： An ultralong time constant time measurement device includes elementary capacitive elements that are connected in series. Each elementary capacitive element is formed by a stack of a first conductive region, a dielectric layer having a thickness suited for allowing charge to flow by direct tunnelling effect, and a second conductive region. The first conductive region is housed in a trench extending from a front face of a semiconductor substrate down into the semiconductor substrate. The dielectric layer rests on the first face of the semiconductor substrate and in particular on a portion of the first conductive region in the trench. The second conductive region rests on the dielectric layer.

公开(公告)号：US11764111B2

公开(公告)日：2023-09-19

申请号：US16662967

申请日：2019-10-24

申请人： Texas Instruments Incorporated

发明人： Mahalingam Nandakumar

IPC分类号： H01L21/822 ,  H01L21/266 ,  H01L21/265 ,  H01L27/01

CPC分类号： H01L21/822 ,  H01L21/266 ,  H01L21/26513 ,  H01L27/013

摘要： Fabrication of an integrated circuit includes forming a photoresist layer over a substrate. Target regions defined on the substrate are exposed using a reticle that defines a first exposure window for a first doped structure of a first type; the first exposure window has a first plurality of openings and a first plurality of dopant blocking regions. A respective exposure dose for each of the target regions is determined by an exposure map and provides controlled variations in the size of the first plurality of openings across the plurality of target regions. Subsequent to the exposure and to developing the photoresist, a dopant is implanted into the substrate through the first plurality of openings.

公开(公告)号：US20180102480A1

公开(公告)日：2018-04-12

申请号：US15662729

申请日：2017-07-28

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Geun Woo YUG

IPC分类号： H01L51/00 ,  H01L51/52 ,  H01L27/12

CPC分类号： H01L51/0009 ,  H01L27/013 ,  H01L27/1214 ,  H01L27/32 ,  H01L27/3276 ,  H01L51/5237 ,  H01L51/5253 ,  H01L51/56 ,  H01L2251/558 ,  H01L2251/566

摘要： A display device includes a display panel and a first protective substrate positioned under the display panel and including a first sub-region and a second sub-region positioned at a side of the first sub-region. A thickness of the first protective substrate in the first sub-region is greater than a thickness of the first protective substrate in the second sub-region.

公开(公告)号：US20070138633A1

公开(公告)日：2007-06-21

申请号：US11313562

申请日：2005-12-21

申请人： Daniel Amey ,  William Borland

发明人： Daniel Amey ,  William Borland

IPC分类号： H01L23/34

CPC分类号： H01G4/30 ,  H01G4/232 ,  H01G4/33 ,  H01L23/50 ,  H01L23/66 ,  H01L27/013 ,  H01L2924/0002 ,  H01L2924/19103 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/09763 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00

摘要： Thick-film capacitors are formed on ceramic interconnect substrates having high capacitance densities and other desirable electrical and physical properties. The capacitor dielectrics are fired at high temperatures.

摘要翻译： 在具有高电容密度和其它所需电气和物理特性的陶瓷互连基板上形成厚膜电容器。 电容器电介质在高温下烧制。

公开(公告)号：US20060024900A1

公开(公告)日：2006-02-02

申请号：US10923437

申请日：2004-08-19

申请人： Teck Lee

发明人： Teck Lee

IPC分类号： H01L21/20 ,  H01L21/8244

CPC分类号： H01L21/20 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/34 ,  H01L23/49827 ,  H01L27/013 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/095 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4614 ,  H05K2201/0187 ,  H05K2201/0394 ,  H05K2201/09645 ,  H05K2201/10674 ,  H05K2203/0292 ,  H01L2224/0401

摘要： An interposer for assembly with a semiconductor die and methods of manufacture are disclosed. The interposer may include at least one passive element at least partially defined by at least one recess formed in at least one dielectric layer of the interposer. The at least one recess may have dimensions selected for forming the passive element with an intended magnitude of at least one electrical property. At least one recess may be formed by removing at least a portion of at least one dielectric layer of an interposer. The at least one recess may be at least partially filled with a conductive material. For instance, moving, by way of squeegee, or injection of a conductive material at least partially within the at least one recess, is disclosed. Optionally, vibration of the conductive material may be employed. A wafer-scale interposer and a system including at least one interposer are disclosed.

摘要翻译： 公开了一种用于与半导体管芯组装的插入件和制造方法。 插入器可以包括至少部分地由插入件的至少一个电介质层中形成的至少一个凹部限定的至少一个无源元件。 至少一个凹部可以具有选择用于形成具有至少一个电性能的预期大小的无源元件的尺寸。 可以通过去除插入件的至少一个电介质层的至少一部分来形成至少一个凹部。 至少一个凹部可以至少部分地填充有导电材料。 例如，公开了通过刮板移动或者至少部分地在至少一个凹部内注入导电材料。 可选地，可以采用导电材料的振动。 公开了一种晶片级插入器和包括至少一个插入器的系统。

公开(公告)号：US5754093A

公开(公告)日：1998-05-19

申请号：US638145

申请日：1996-04-26

申请人： Shinji Ota ,  Takashi Nagasaka

发明人： Shinji Ota ,  Takashi Nagasaka

IPC分类号： H05K1/16 ,  H01C7/00 ,  H01C17/06 ,  H01C17/065 ,  H01L27/01 ,  H01C10/12

CPC分类号： H01C7/003 ,  H01C17/06566 ,  H01L27/013

摘要： A thick-film resistor in a thick-film printed substrate, the resistance of which is maintained at an appropriate value, is disclosed. In a thick-film printed substrate formed by printing a thick-film conductor and a resistor of lanthanum boride type on a ceramic substrate and then sintering, an intermediate resistor layer of lanthanum boride type is provided between the thick-film conductor and the resistor of lanthanum boride type. Reaction of glass composition contained in the thick-film conductor is suppressed, and resistance abnormality is prevented during sintering by causing the intermediate resistor layer of lanthanum boride type to be interposed.

摘要翻译： 公开了一种厚膜印刷基板中的厚膜电阻器，其电阻保持在适当的值。 在通过在陶瓷基板上印刷厚膜导体和硼化镧电阻器然后烧结而形成的厚膜印刷基板中，在厚膜导体和电阻器的电阻器之间设置硼化镧型中间电阻层 硼化镧型。 抑制包含在厚膜导体中的玻璃组合物的反应，并且通过使硼化镧型中间电阻层插入而在烧结期间阻止电阻异常。

公开(公告)号：US4591814A

公开(公告)日：1986-05-27

申请号：US504238

申请日：1983-06-14

申请人： Katsuo Ito ,  Yasushi Senga ,  Yoshio Murata

发明人： Katsuo Ito ,  Yasushi Senga ,  Yoshio Murata

IPC分类号： H03H7/09 ,  H01G4/40 ,  H01L27/01 ,  H03H1/00 ,  H03H5/02 ,  H05K1/16

CPC分类号： H01L27/013 ,  H03H1/00 ,  H03H5/02 ,  H03H7/1775 ,  Y10T29/49002 ,  Y10T29/49128 ,  Y10T29/49155

摘要： An electronic component made by the steps of: preparing elongated tape (10), distributing a plurality of pairs of electronic elements (1) over the tape (10) lengthwise of the latter and bonding the pairs to the tape (10) in such a manner that the two elements (1) in each pair are positioned one in each of the first and second regions (12, 13) of the tape (10) separated from each other substantially by the longitudinal centerline (11) of the tape (10), folding the tape (10) along the longitudinal centerline (11) so that the two elements (1) in each pair are opposed at least partially to each other, preparing a terminal assembly (18) having a frame (17) on which a plurality of terminals (14, 15, 16) to be connected to the elements (1) are held so that they are distributed lengthwise of the frame (17), arranging the frame (17) parallel to the tape (10) and effecting connection between the terminals (14, 15, 16) and the elements (1), cutting the tape (10) along widthwise extending cutting lines to separate the sets of elements (1) from each other, and cutting off the terminals (14, 15, 16) from the frame (17).

摘要翻译： 一种由以下步骤制成的电子部件：制备细长带（10），将多对电子元件（1）在其长度方向上分布在所述带（10）上，并将所述对与所述带（10）结合在一起 方式是每对中的两个元件（1）位于基本上由带（10）的纵向中心线（11）彼此分离的带（10）的第一和第二区域（12,13）中的每一个中， ），沿着纵向中心线（11）折叠带（10），使得每对中的两个元件（1）至少部分地彼此相对，制备具有框架（17）的端子组件（18），在该端子组件 要连接到元件（1）的多个端子（14,15,16）被保持为使得它们沿着框架（17）的纵向分布，将框架（17）平行于带（10）布置并且实现 端子（14,15,16）和元件（1）之间的连接，沿宽度方向延伸切割切割带（10） 用于将所述组件（1）彼此分离，并且从所述框架（17）切断所述端子（14,15,16）。

公开(公告)号：US4377642A

公开(公告)日：1983-03-22

申请号：US280920

申请日：1981-07-06

申请人： Ashok N. Prabhu ,  Kenneth W. Hang

发明人： Ashok N. Prabhu ,  Kenneth W. Hang

IPC分类号： C03C1/10 ,  C03C3/074 ,  C03C8/10 ,  C03C8/16 ,  C03C8/24 ,  H01B3/00 ,  H01B3/08 ,  H01L27/01 ,  H05K3/28 ,  H05K3/46

CPC分类号： C03C8/245 ,  H01L27/013 ,  H05K3/285 ,  H05K2201/017 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： Improved thick-film overglaze inks useful in constructing multilayer integrated circuits on circuit boards, particularly porcelain-coated metal circuit boards, are provided. The subject inks comprise: a glass consisting of lead oxide, a modifier component consisting of the oxides of cadmium, zinc, barium and antimony and a glass-forming component consisting of aluminum oxide, boron trioxide and silicon dioxide; a suitable organic vehicle and, if desired, a colorant oxide.

摘要翻译： 提供了可用于在电路板，特别是陶瓷金属电路板上构建多层集成电路的改进的厚膜釉面油墨。 主题油墨包括：由氧化铅组成的玻璃，由镉，锌，钡和锑的氧化物组成的改性剂组分和由氧化铝，三氧化硼和二氧化硅组成的玻璃形成组分; 合适的有机载体，如果需要，可以使用着色剂氧化物。

公开(公告)号：US4369220A

公开(公告)日：1983-01-18

申请号：US374967

申请日：1982-05-05

申请人： Ashok N. Prabhu ,  Kenneth W. Hang

发明人： Ashok N. Prabhu ,  Kenneth W. Hang

IPC分类号： H05K1/09 ,  B32B15/08 ,  C03C8/24 ,  H01B3/00 ,  H01B3/08 ,  H01L27/01 ,  H05K3/46

CPC分类号： H01L27/013 ,  C03C8/24 ,  H05K3/4685 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/252 ,  Y10T428/258

摘要： Novel thick-film crossover dielectric inks useful in constructing multilayer circuits on suitable substrates are provided. The subject inks comprise a barium magnesium borosilicate glass powder, a pinhole reducing component comprising silicon dioxide, an alkaline earth aluminum borosilicate glass having a high softening point or mixtures thereof and a suitable organic vehicle.

摘要翻译： 提供了可用于在合适基板上构造多层电路的新型厚膜交叉电介质油墨。 主题油墨包括钡镁硼硅酸盐玻璃粉末，包含二氧化硅的针孔还原组分，具有高软化点的碱土金属硼硅酸盐玻璃或其混合物和合适的有机载体。

公开(公告)号：US4350618A

公开(公告)日：1982-09-21

申请号：US94900

申请日：1979-11-16

申请人： David G. Hilson ,  Gary W. Johnson ,  Ronald J. Schoonejongen

发明人： David G. Hilson ,  Gary W. Johnson ,  Ronald J. Schoonejongen

IPC分类号： H01L21/52 ,  H01B1/16 ,  H01L21/48 ,  H01L23/498 ,  H01L27/01 ,  H05K1/09 ,  H01B1/02 ,  C09D5/10 ,  H01L23/48

CPC分类号： H01L23/49883 ,  H01B1/16 ,  H01L21/4867 ,  H01L27/013 ,  H01L2924/0002 ,  H05K1/092

摘要： In a microelectronic package of the type where Si-based integrated circuits are eutectically attached to a Pd/Au-based thick film conductor, a method of reducing the potential for thermal runaway is taught. The method involves increasing the surface area of the Pd to lower the Vbe rating. This reduces the potential for thermal runaway in subsequent integrated circuit operation. It has also been found that increasing the particle size of the Au component further decreases the Vbe rating.

摘要翻译： 在其中基于Si的集成电路共同附着到基于Pd / Au的厚膜导体的类型的微电子封装中，教导了减少热失控的可能性的方法。 该方法包括增加Pd的表面积以降低Vbe等级。 这降低了后续集成电路操作中热失控的可能性。 还已经发现，增加Au成分的粒径进一步降低了Vbe等级。