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公开(公告)号：US07115996B2
公开(公告)日：2006-10-03
申请号：US10852142
申请日：2004-05-25
申请人： Daniel C. Edelstein , Sung Kwon Kang , Maurice McGlashan-Powell , Eugene J. O'Sullivan , George F. Walker
发明人： Daniel C. Edelstein , Sung Kwon Kang , Maurice McGlashan-Powell , Eugene J. O'Sullivan , George F. Walker
CPC分类号： H01L21/76849 , H01L21/2885 , H01L21/76856 , H01L21/76858 , H01L21/76862 , H01L23/53238 , H01L24/11 , H01L2224/0401 , H01L2224/04042 , H01L2224/05546 , H01L2224/13099 , H01L2224/45144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/15747 , H05K3/244 , H01L2924/00
摘要： A method to selectively cap interconnects with indium or tin bronzes and copper oxides thereof is provided. The invention also provides the interconnect and copper surfaces so formed.
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2.发明授权Method to selectively cap interconnects with indium or tin bronzes and/or oxides thereof and the interconnect so capped 有权选择性地与铟或锡青铜和/或其氧化物覆盖互连的方法以及如此封闭的互连公开(公告)号：US06784088B2
公开(公告)日：2004-08-31
申请号：US10345288
申请日：2003-01-16
申请人： Daniel C. Edelstein , Sung Kwon Kang , Maurice McGlashan-Powell , Eugene J. O'Sullivan , George F. Walker
发明人： Daniel C. Edelstein , Sung Kwon Kang , Maurice McGlashan-Powell , Eugene J. O'Sullivan , George F. Walker
IPC分类号： H01L2144
CPC分类号： H01L21/76849 , H01L21/2885 , H01L21/76856 , H01L21/76858 , H01L21/76862 , H01L23/53238 , H01L24/11 , H01L2224/0401 , H01L2224/04042 , H01L2224/05546 , H01L2224/13099 , H01L2224/45144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/15747 , H05K3/244 , H01L2924/00
摘要： A method to selectively cap a cooper BEOL terminal pad with a Cu/Sn/Au alloy. The method includes providing one or more Cu BEOL terminal pads and coating the pads with a Sn coating followed by coating the Sn with a Au coating. The coated pads are then annealed to form the Cu/Sn/Au capping alloy.
摘要翻译： 一种用Cu / Sn / Au合金选择性地覆盖铜合金BEOL端子焊盘的方法。 该方法包括提供一个或多个Cu BEOL端子焊盘并且用焊锡涂覆Sn涂层，然后用Au涂层涂覆Sn。 然后将涂覆的焊盘退火以形成Cu / Sn / Au封盖合金。
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3.发明授权Method to selectively cap interconnects with indium or tin bronzes and/or oxides thereof and the interconnect so capped 失效选择性地与铟或锡青铜和/或其氧化物覆盖互连的方法以及如此封闭的互连公开(公告)号：US06551931B1
公开(公告)日：2003-04-22
申请号：US09706820
申请日：2000-11-07
申请人： Daniel C. Edelstein , Sung Kwon Kang , Maurice McGlashan-Powell , Eugene J. O'Sullivan , George F. Walker
发明人： Daniel C. Edelstein , Sung Kwon Kang , Maurice McGlashan-Powell , Eugene J. O'Sullivan , George F. Walker
IPC分类号： H01L2144
CPC分类号： H01L21/76849 , H01L21/2885 , H01L21/76856 , H01L21/76858 , H01L21/76862 , H01L23/53238 , H01L24/11 , H01L2224/0401 , H01L2224/04042 , H01L2224/05546 , H01L2224/13099 , H01L2224/45144 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/15747 , H05K3/244 , H01L2924/00
摘要： A method to selectively cap interconnects with indium or tin bronzes and copper oxides thereof is provided. The invention also provides the interconnect and copper surfaces so formed.
摘要翻译： 提供一种选择性地覆盖与铟或锡青铜及其铜氧化物的互连的方法。 本发明还提供如此形成的互连和铜表面。
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公开(公告)号：US06358832B1
公开(公告)日：2002-03-19
申请号：US09641834
申请日：2000-08-18
申请人： Daniel C. Edelstein , Timothy J. Dalton , John G. Gaudiello , Mahadevaiyer Krishnan , Sandra G. Malhotra , Maurice McGlashan-Powell , Eugene J. O'Sullivan , Carlos J. Sambucetti
发明人： Daniel C. Edelstein , Timothy J. Dalton , John G. Gaudiello , Mahadevaiyer Krishnan , Sandra G. Malhotra , Maurice McGlashan-Powell , Eugene J. O'Sullivan , Carlos J. Sambucetti
IPC分类号： H01L2144
CPC分类号： H01L21/76849 , H01L21/288 , H01L21/3212 , H01L21/76829 , H01L21/76834 , H01L21/76835
摘要： A damascene interconnect containing a dual etch stop/diffusion barrier. The conductive material of the damascene interconnect is capped with a conductive metal diffusion barrier cap, typically using electroless deposition, and, optionally, with a dielectric etch-stop layer. An optional chemical mechanical polish-stop layer may also be present. The different methods of the invention allow the CMP stop, reactive-ion etch stop, and metal diffusion barrier requirements of the different layers to be decoupled. A preferred conductive material is copper.
摘要翻译： 包含双蚀刻停止/扩散屏障的镶嵌互连。 镶嵌互连的导电材料用导电金属扩散阻挡盖（通常使用无电沉积）和可选地与电介质蚀刻停止层封盖。 还可以存在任选的化学机械抛光 - 停止层。 本发明的不同方法允许不同层的CMP停止，反应离子蚀刻停止和金属扩散阻挡层要求被去耦合。 优选的导电材料是铜。
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公开(公告)号：US08404145B2
公开(公告)日：2013-03-26
申请号：US12819697
申请日：2010-06-21
IPC分类号： C09K13/04
CPC分类号： C09K13/04
摘要： An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.
摘要翻译： 通过在由层间电介质分离的金属互连件的表面上覆盖沉积铟，然后选择性地化学蚀刻位于层间电介质上的铟而形成铟盖层，留下铟盖层。 提供含有强酸的蚀刻剂用于选择性地除去铟。
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公开(公告)号：US06153935A
公开(公告)日：2000-11-28
申请号：US409244
申请日：1999-09-30
申请人： Daniel C. Edelstein , Timothy J. Dalton , John G. Gaudiello , Mahadevaiyer Krishnan , Sandra G. Malhotra , Maurice McGlashan-Powell , Eugene J. O'Sullivan , Carlos J. Sambucetti
发明人： Daniel C. Edelstein , Timothy J. Dalton , John G. Gaudiello , Mahadevaiyer Krishnan , Sandra G. Malhotra , Maurice McGlashan-Powell , Eugene J. O'Sullivan , Carlos J. Sambucetti
IPC分类号： H01L21/30 , H01L21/288 , H01L21/321 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/76849 , H01L21/288 , H01L21/3212 , H01L21/76829 , H01L21/76834 , H01L21/76835
摘要： A damascene interconnect containing a dual etch stop/diffusion barrier. The conductive material of the damascene interconnect is capped with a conductive metal diffusion barrier cap, typically using electroless deposition, and, optionally, with a dielectric etch-stop layer. An optional chemical mechanical polish-stop layer may also be present. The different methods of the invention allow the CMP stop, reactive-ion etch stop, and metal diffusion barrier requirements of the different layers to be decoupled. A preferred conductive material is copper.
摘要翻译： 包含双蚀刻停止/扩散屏障的镶嵌互连。 镶嵌互连的导电材料用导电金属扩散阻挡盖（通常使用无电沉积）和可选地与电介质蚀刻停止层封盖。 还可以存在任选的化学机械抛光 - 停止层。 本发明的不同方法允许不同层的CMP停止，反应离子蚀刻停止和金属扩散阻挡层要求被去耦合。 优选的导电材料是铜。
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公开(公告)号：US07795155B2
公开(公告)日：2010-09-14
申请号：US11669496
申请日：2007-01-31
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： C09K13/04
摘要： An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.
摘要翻译： 通过在由层间电介质分离的金属互连件的表面上覆盖沉积铟，然后选择性地化学蚀刻位于层间电介质上的铟而形成铟盖层，留下铟盖层。 提供含有强酸的蚀刻剂用于选择性地除去铟。
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公开(公告)号：US20100252775A1
公开(公告)日：2010-10-07
申请号：US12819697
申请日：2010-06-21
CPC分类号： C09K13/04
摘要： An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.
摘要翻译： 通过在由层间电介质分离的金属互连件的表面上覆盖沉积铟，然后选择性地化学蚀刻位于层间电介质上的铟而形成铟盖层，留下铟盖层。 提供含有强酸的蚀刻剂用于选择性地除去铟。
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公开(公告)号：US20080179280A1
公开(公告)日：2008-07-31
申请号：US11669496
申请日：2007-01-31
CPC分类号： C09K13/04
摘要： An indium cap layer is formed by blanket depositing indium onto a surface of metallic interconnects separated by interlayer dielectric, and then selectively chemically etching the indium located on the interlayer dielectric leaving an indium cap layer. Etchants containing a strong acid are provided for selectively removing the indium.
摘要翻译： 通过在由层间电介质分离的金属互连件的表面上覆盖沉积铟，然后选择性地化学蚀刻位于层间电介质上的铟而形成铟盖层，留下铟盖层。 提供含有强酸的蚀刻剂用于选择性地除去铟。
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公开(公告)号：US08877566B2
公开(公告)日：2014-11-04
申请号：US13586421
申请日：2012-08-15
CPC分类号： H01L23/42 , H01L2224/05573 , H01L2224/16 , H01L2224/73253 , H01L2924/10253 , H01L2924/3511 , H01L2924/00
摘要： A heat spreader or lid for a microelectronic package, in which the heat spreader has an underside surface that includes at least one curvilinear contour, in which the curvilinear contour is selected from at least one positive or protruding curvilinear feature, at least one negative or recessed curvilinear feature, and a combination thereof. A microelectronic package that includes the heat spreader/lid, in which there is improved heat dissipation or reduced mechanical stress in an interface between the heat spreader/lid and a circuit chip.
摘要翻译： 一种用于微电子封装的散热器或盖，其中散热器具有包括至少一个曲线轮廓的下表面，其中曲线轮廓选自至少一个正或突出的曲线特征，至少一个负或凹入 曲线特征及其组合。 包括散热器/盖的微电子封装，其中在散热器/盖和电路芯片之间的界面中改善了散热或降低了机械应力。
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