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公开(公告)号：US09418864B2
公开(公告)日：2016-08-16
申请号：US12022949
申请日：2008-01-30
申请人： Danny Pak-Chum Shum , Alfred Vater , John Power , Wolfram Langheinrich , Ulrike Bewersdorff-Sarlette
发明人： Danny Pak-Chum Shum , Alfred Vater , John Power , Wolfram Langheinrich , Ulrike Bewersdorff-Sarlette
IPC分类号： H01L21/336 , H01L21/302 , H01L21/461 , H01L21/76 , H01L21/8238 , H01L27/108 , H01L21/311 , H01L27/105 , H01L27/115
CPC分类号： H01L21/31111 , H01L27/105 , H01L27/11526 , H01L27/11531 , H01L27/11573
摘要： In one embodiment, a method of forming a semiconductor device is disclosed. A high-k dielectric is deposited of over a semiconductor body, and a portion of the high-k dielectric is wet etched an etchant selected from the group consisting of hot phos, piranha, and SC1.
摘要翻译： 在一个实施例中，公开了一种形成半导体器件的方法。 将高k电介质沉积在半导体本体上方，并且将高k电介质的一部分湿蚀刻为选自热磷，食人鱼和SC1的腐蚀剂。
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公开(公告)号：US09337047B2
公开(公告)日：2016-05-10
申请号：US11856086
申请日：2007-09-17
IPC分类号： H01L29/788 , H01L21/4763 , H01L21/28 , H01L27/105 , H01L27/115 , H01L29/66 , H01L29/78
CPC分类号： H01L21/28273 , H01L27/105 , H01L27/11526 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： One or more embodiments are related to a semiconductor device, comprising: a high-K dielectric material; and a nitrogen-doped silicon material disposed over said high-k dielectric material.
摘要翻译： 一个或多个实施例涉及半导体器件，包括：高K电介质材料; 以及设置在所述高k电介质材料上的氮掺杂硅材料。
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公开(公告)号：US20090072292A1
公开(公告)日：2009-03-19
申请号：US11856086
申请日：2007-09-17
IPC分类号： H01L29/788 , H01L21/4763
CPC分类号： H01L21/28273 , H01L27/105 , H01L27/11526 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： One or more embodiments are related to a semiconductor device, comprising: a high-K dielectric material; and a nitrogen-doped silicon material disposed over said high-k dielectric material.
摘要翻译： 一个或多个实施例涉及半导体器件，包括：高K电介质材料; 以及设置在所述高k电介质材料上的氮掺杂硅材料。
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公开(公告)号：US20110070725A1
公开(公告)日：2011-03-24
申请号：US12565454
申请日：2009-09-23
申请人： John Power , Danny Pak-Chum Shum
发明人： John Power , Danny Pak-Chum Shum
IPC分类号： H01L21/8239
CPC分类号： H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42328 , H01L29/42344 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： One or more embodiments relate to a method of forming a semiconductor device, including: providing a substrate; forming a gate stack over the substrate, the gate stack including a control gate over a charge storage layer; forming a conductive layer over the gate stack; etching the conductive layer to remove a portion of the conductive layer; and forming a select gate, the forming the select gate comprising etching a remaining portion of the conductive layer.
摘要翻译： 一个或多个实施例涉及形成半导体器件的方法，包括：提供衬底; 在所述衬底上形成栅极堆叠，所述栅极堆叠包括电荷存储层上的控制栅极; 在所述栅极堆叠上形成导电层; 蚀刻导电层以去除导电层的一部分; 以及形成选择栅极，形成所述选择栅极包括蚀刻所述导电层的剩余部分。
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公开(公告)号：US08470670B2
公开(公告)日：2013-06-25
申请号：US12565459
申请日：2009-09-23
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , H01L29/42344 , H01L29/66825 , H01L29/7881
摘要： One or more embodiments may relate to a method for making a semiconductor device, including: a method for making a semiconductor device, comprising: providing a substrate; forming a charge storage layer over the substrate; forming a control gate layer over the charge storage layer; forming a mask over the control gate layer; using the mask, etching the control gate layer and the charge storage layer; forming a select gate layer over the etched control gate layer and the etched charge storage layer; forming an additional layer over the select gate layer; etching the additional layer to form sidewall spacers over the select gate layer; and etching the select gate layer.
摘要翻译： 一个或多个实施例可以涉及制造半导体器件的方法，包括：制造半导体器件的方法，包括：提供衬底; 在所述基板上形成电荷存储层; 在所述电荷存储层上形成控制栅极层; 在所述控制栅极层上形成掩模; 使用掩模，蚀刻控制栅极层和电荷存储层; 在蚀刻的控制栅极层和蚀刻的电荷存储层上形成选择栅极层; 在所述选择栅极层上形成附加层; 蚀刻附加层以在选择栅极层上形成侧壁间隔物; 并蚀刻选择栅极层。
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公开(公告)号：US08101492B2
公开(公告)日：2012-01-24
申请号：US12565454
申请日：2009-09-23
申请人： John Power , Danny Pak-Chum Shum
发明人： John Power , Danny Pak-Chum Shum
IPC分类号： H01L21/331
CPC分类号： H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42328 , H01L29/42344 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： One or more embodiments relate to a method of forming a semiconductor device, including: providing a substrate; forming a gate stack over the substrate, the gate stack including a control gate over a charge storage layer; forming a conductive layer over the gate stack; etching the conductive layer to remove a portion of the conductive layer; and forming a select gate, the forming the select gate comprising etching a remaining portion of the conductive layer.
摘要翻译： 一个或多个实施例涉及形成半导体器件的方法，包括：提供衬底; 在所述衬底上形成栅极堆叠，所述栅极堆叠包括电荷存储层上的控制栅极; 在所述栅极堆叠上形成导电层; 蚀刻导电层以去除导电层的一部分; 以及形成选择栅极，形成所述选择栅极包括蚀刻所述导电层的剩余部分。
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7.发明授权公开(公告)号：US08636879B2
公开(公告)日：2014-01-28
申请号：US13452298
申请日：2012-04-20
申请人： Moosung Chae , Bum Ki Moon , Sunoo Kim , Danny Pak-Chum Shum
发明人： Moosung Chae , Bum Ki Moon , Sunoo Kim , Danny Pak-Chum Shum
CPC分类号： H01L21/76877 , C25D5/02 , C25D17/001 , C25D17/007 , C25D17/12 , C25D21/12 , H01L21/2885
摘要： An electro chemical deposition system is described for forming a feature on a semiconductor wafer. The electro chemical deposition is performed by powering electrodes that includes a cathode, an anode and a plurality of electrically independent auxiliary electrodes.
摘要翻译： 描述了用于在半导体晶片上形成特征的电化学沉积系统。 电化学沉积通过为包括阴极，阳极和多个电独立辅助电极的电极供电来执行。
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公开(公告)号：US20120126305A1
公开(公告)日：2012-05-24
申请号：US13363936
申请日：2012-02-01
申请人： Jiang Yan , Danny Pak-Chum Shum
发明人： Jiang Yan , Danny Pak-Chum Shum
IPC分类号： H01L29/788
CPC分类号： H01L27/105 , H01L21/823807 , H01L27/11526 , H01L27/11531 , H01L29/7843
摘要： In a method of making a semiconductor device, a gate dielectric is formed over the semiconductor body. A floating gate is formed over the gate dielectric, an insulating region over the floating gate, and a control gate over the insulating region. The gate dielectric, floating gate, insulating region, and control gate constitute a gate stack. A stress is caused in the gate stack, whereby the band gap of the gate dielectric is changed by the stress.
摘要翻译： 在制造半导体器件的方法中，在半导体本体上形成栅极电介质。 在栅极电介质上形成浮栅，浮置栅极上的绝缘区域以及绝缘区域上的控制栅极。 栅极电介质，浮动栅极，绝缘区域和控制栅极构成栅极堆叠。 在栅极堆叠中产生应力，由此栅极电介质的带隙由于应力而变化。
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公开(公告)号：US08158478B2
公开(公告)日：2012-04-17
申请号：US12642472
申请日：2009-12-18
申请人： Jiang Yan , Danny Pak-Chum Shum
发明人： Jiang Yan , Danny Pak-Chum Shum
IPC分类号： H01L21/8247
CPC分类号： H01L27/105 , H01L21/823807 , H01L27/11526 , H01L27/11531 , H01L29/7843
摘要： In a method of making a semiconductor device, a gate dielectric is formed over the semiconductor body. A floating gate is formed over the gate dielectric, an insulating region over the floating gate, and a control gate over the insulating region. The gate dielectric, floating gate, insulating region, and control gate constitute a gate stack. A stress is caused in the gate stack, whereby the band gap of the gate dielectric is changed by the stress.
摘要翻译： 在制造半导体器件的方法中，在半导体本体上形成栅极电介质。 在栅极电介质上形成浮栅，浮置栅极上的绝缘区域以及绝缘区域上的控制栅极。 栅极电介质，浮动栅极，绝缘区域和控制栅极构成栅极堆叠。 在栅极堆叠中产生应力，由此栅极电介质的带隙由于应力而变化。
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10.发明授权Formation of active area using semiconductor growth process without STI integration 有权使用半导体生长过程形成活性区，无需STI整合公开(公告)号：US07786547B2
公开(公告)日：2010-08-31
申请号：US11657825
申请日：2007-01-25
申请人： Jiang Yan , Danny Pak-Chum Shum
发明人： Jiang Yan , Danny Pak-Chum Shum
IPC分类号： H01L29/00
CPC分类号： H01L21/02381 , H01L21/02532 , H01L21/02639
摘要： A semiconductor device can be formed without use of an STI process. An insulating layer is formed over a semiconductor body. Portions of the insulating layer are removed to expose the semiconductor body, e.g., to expose bare silicon. A semiconductor material, e.g., silicon, is grown over the exposed semiconductor body. A device, such as a transistor, can then be formed in the grown semiconductor material.
摘要翻译： 可以不使用STI工艺来形成半导体器件。 在半导体本体上形成绝缘层。 绝缘层的一部分被去除以暴露半导体本体，例如露出裸硅。 半导体材料，例如硅，生长在暴露的半导体本体上。 然后可以在生长的半导体材料中形成诸如晶体管的器件。
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