公开(公告)号：US07251389B2

公开(公告)日：2007-07-31

申请号：US11234930

申请日：2005-09-26

申请人： Daoqiang Lu ,  Bruce A. Block ,  Dongming He

发明人： Daoqiang Lu ,  Bruce A. Block ,  Dongming He

IPC分类号： G02B6/12

CPC分类号： G02B6/43 ,  G02B6/2852

摘要： An apparatus and method for embedding a laser source on a semiconductor substrate and an optical interconnect to couple the laser source to internal components of the semiconductor substrate. An on-die waveguide is integrated on the semiconductor substrate. A package waveguide is disposed on the semiconductor substrate and evanescently coupled to the on-die waveguide. The laser source is embedded within the packaged waveguide to provide an optical signal to the on-die waveguide via the package waveguide.

摘要翻译： 一种用于将激光源嵌入到半导体衬底上的装置和方法以及将激光源耦合到半导体衬底的内部部件的光学互连。 集成在半导体衬底上的管芯上波导管。 封装波导设置在半导体衬底上并ev逝地耦合到管芯上波导。 激光源被嵌入在封装的波导内，以经由封装波导将光信号提供给管芯上的波导。

公开(公告)号：US20070081760A1

公开(公告)日：2007-04-12

申请号：US11234930

申请日：2005-09-26

申请人： Daoqiang Lu ,  Bruce Block ,  Dongming He

发明人： Daoqiang Lu ,  Bruce Block ,  Dongming He

IPC分类号： G02B6/12

CPC分类号： G02B6/43 ,  G02B6/2852

摘要： An apparatus and method for embedding a laser source on a semiconductor substrate and an optical interconnect to couple the laser source to internal components of the semiconductor substrate. An on-die waveguide is integrated on the semiconductor substrate. A package waveguide is disposed on the semiconductor substrate and evanescently coupled to the on-die waveguide. The laser source is embedded within the packaged waveguide to provide an optical signal to the on-die waveguide via the package waveguide.

公开(公告)号：US20080079125A1

公开(公告)日：2008-04-03

申请号：US11529851

申请日：2006-09-29

申请人： Daoqiang Lu ,  Chuan Hu ,  Dongming He

发明人： Daoqiang Lu ,  Chuan Hu ,  Dongming He

IPC分类号： H01L23/495

CPC分类号： H01L23/433 ,  H01L21/563 ,  H01L23/3735 ,  H01L2924/0002 ,  H01L2924/16152 ,  H01L2924/00

摘要： A microelectronic die assembly. The die assembly includes a microelectronic die, and a thermally conductive element attached to the backside of the die with a thermal interface material. The thermally conductive element has lateral dimensions smaller than, substantially equal to, or larger than lateral dimensions of the die by up to a maximum amount, wherein the maximum amount is adapted to allow a mounting of the die assembly to a package substrate.

摘要翻译： 微电子模组件。 模具组件包括微电子管芯和导热元件，其通过热界面材料附接到管芯的背面。 导热元件的横向尺寸小于，基本上等于或大于模具的横向尺寸直到最大量，其中最大量适于允许将模具组件安装到封装衬底。

公开(公告)号：US07626251B2

公开(公告)日：2009-12-01

申请号：US11529851

申请日：2006-09-29

申请人： Daoqiang Lu ,  Chuan Hu ,  Dongming He

发明人： Daoqiang Lu ,  Chuan Hu ,  Dongming He

IPC分类号： H01L23/10

CPC分类号： H01L23/433 ,  H01L21/563 ,  H01L23/3735 ,  H01L2924/0002 ,  H01L2924/16152 ,  H01L2924/00

摘要： A microelectronic die assembly. The die assembly includes a microelectronic die, and a thermally conductive element attached to the backside of the die with a thermal interface material. The thermally conductive element has lateral dimensions smaller than, substantially equal to, or larger than lateral dimensions of the die by up to a maximum amount, wherein the maximum amount is adapted to allow a mounting of the die assembly to a package substrate.

摘要翻译： 微电子模组件。 模具组件包括微电子管芯和导热元件，其通过热界面材料附接到管芯的背面。 导热元件的横向尺寸小于，基本上等于或大于模具的横向尺寸直到最大量，其中最大量适于允许将模具组件安装到封装衬底。

公开(公告)号：US07517787B2

公开(公告)日：2009-04-14

申请号：US11087180

申请日：2005-03-22

申请人： Sairam Agraharam ,  Carlton Hanna ,  Dongming He ,  Vasudeva Atluri ,  Debendra Mallik ,  Matthew Escobido ,  Sujit Sharan

发明人： Sairam Agraharam ,  Carlton Hanna ,  Dongming He ,  Vasudeva Atluri ,  Debendra Mallik ,  Matthew Escobido ,  Sujit Sharan

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13017 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05099

摘要： In one embodiment, the invention provides a method comprising fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material used, to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located below the die bump. Advantageously, the method may comprise performing a substrate reflow operation to attach the package substrate to the die bump, without performing a separate wafer reflow operation to reflow the die bump.

摘要翻译： 在一个实施例中，本发明提供了一种方法，其包括在管芯上制造管芯凸块，所述管芯凸块的形状和尺寸被设计成至少减小所使用的焊料材料的流动，以将管芯凸块附接到封装衬底 位于模具凸块下方的冶金（UBM）层。 有利地，该方法可以包括执行衬底回流操作以将封装衬底附接到管芯凸块，而不执行单独的晶片回流操作以回流管芯凸块。

公开(公告)号：US06573734B2

公开(公告)日：2003-06-03

申请号：US09850719

申请日：2001-05-08

申请人： Dongming He ,  Mark A. Shannon

发明人： Dongming He ,  Mark A. Shannon

IPC分类号： G01R2708

CPC分类号： G01R27/22 ,  G01N27/07

摘要： A thin film integrated conductivity sensor is formed on a suitable surface for measuring the electrical conductivity of a liquid. The surface is preferably an insulator, but may be conducting, if the electrodes are on an insulating surface. A preferred embodiment insulates the electrodes by use of a dielectric layer that is deposited on top of a silicon wafer substrate. A sensor tip is integrated on the top surface of the substrate. In a preferred embodiment, the substrate is fabricated into a sensor shape with a small sharp tip at one end and an opposite larger end for accommodating electrode pads. The larger end might also be used for integration of measurement circuits or accommodating bonding pads. In a preferred embodiment, the tip also accommodates an integrated temperature sensor to enable local temperature measurements. The sensor is a thin-film resistor preferably enclosed within a layer of the sensor tip and having a serpentine shape to produce significant resistance (hundreds to thousands of Ohms) while consuming a small area of the sensor tip.

公开(公告)号：US07656035B2

公开(公告)日：2010-02-02

申请号：US12351689

申请日：2009-01-09

申请人： Sairam Agraharam ,  Carlton Hanna ,  Dongming He ,  Vasudeva Atluri ,  Debendra Mallik ,  Matthew Escobido ,  Sujit Sharan

发明人： Sairam Agraharam ,  Carlton Hanna ,  Dongming He ,  Vasudeva Atluri ,  Debendra Mallik ,  Matthew Escobido ,  Sujit Sharan

IPC分类号： H01L23/485

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13017 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05099

摘要： In one embodiment, the invention provides a method comprising fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material used, to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located below the die bump. Advantageously, the method may comprise performing a substrate reflow operation to attach the package substrate to the die bump, without performing a separate wafer reflow operation to reflow the die bump.

摘要翻译： 在一个实施例中，本发明提供了一种方法，其包括在管芯上制造管芯凸块，所述管芯凸块的形状和尺寸被设计成至少减小所使用的焊料材料的流动，以将管芯凸块附接到封装衬底 位于模具凸块下方的冶金（UBM）层。 有利地，该方法可以包括执行衬底回流操作以将封装衬底附接到管芯凸块，而不执行单独的晶片回流操作以回流管芯凸块。

公开(公告)号：US20090115057A1

公开(公告)日：2009-05-07

申请号：US12351689

申请日：2009-01-09

申请人： Sairam Agraharam ,  Carlton Hanna ,  Dongming He ,  Vasudeva Atluri ,  Debendra Mallik ,  Matthew Escobido ,  Sujit Sharan

发明人： Sairam Agraharam ,  Carlton Hanna ,  Dongming He ,  Vasudeva Atluri ,  Debendra Mallik ,  Matthew Escobido ,  Sujit Sharan

IPC分类号： H01L23/485

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/13 ,  H01L2224/13017 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05099

摘要： In one embodiment, the invention provides a method comprising fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material used, to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located below the die bump. Advantageously, the method may comprise performing a substrate reflow operation to attach the package substrate to the die bump, without performing a separate wafer reflow operation to reflow the die bump.

摘要翻译： 在一个实施例中，本发明提供了一种方法，其包括在管芯上制造管芯凸块，所述管芯凸块的形状和尺寸被设计成至少减小所使用的焊料材料的流动，以将管芯凸块附接到封装衬底 位于模具凸块下方的冶金（UBM）层。 有利地，该方法可以包括执行衬底回流操作以将封装衬底附接到管芯凸块，而不执行单独的晶片回流操作以回流管芯凸块。

公开(公告)号：US20090065931A1

公开(公告)日：2009-03-12

申请号：US11853461

申请日：2007-09-11

申请人： Sudarshan V. Rangaraj ,  Sanka Ganesan ,  Dongming He ,  Richard J. Harries ,  Sairam Agraharam

发明人： Sudarshan V. Rangaraj ,  Sanka Ganesan ,  Dongming He ,  Richard J. Harries ,  Sairam Agraharam

IPC分类号： H01L23/52 ,  H01L21/44

CPC分类号： H01L24/81 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/613 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

摘要： Disclosed is a packaged integrated circuit and a method of forming thereof. The packaged integrated circuit includes a substrate, a plurality of solder bumps, a semiconductor die and a plurality of copper bumps. The plurality of solder bumps are configured on the substrate. Each of the plurality of solder bumps has a height of about 40 micrometers (μm) to about 65 μm. Further, the plurality of copper bumps are configured on the semiconductor die. Each of the plurality of copper bumps has a height of about 10 μm to about 25 μm. The semiconductor die is disposed above the substrate such that the plurality of copper bumps are coupled to the plurality of solder bumps, which in turn, couples the semiconductor die to the substrate.

摘要翻译： 公开了一种封装集成电路及其形成方法。 封装的集成电路包括衬底，多个焊料凸块，半导体管芯和多个铜凸块。 多个焊料凸点配置在基板上。 多个焊料凸块中的每一个具有约40微米（mum）至约65μm的高度。 此外，多个铜凸块配置在半导体管芯上。 多个铜凸块中的每一个具有约10μm至约25μm的高度。 半导体管芯设置在衬底之上，使得多个铜凸块耦合到多个焊料凸块，其又将半导体管芯耦合到衬底。

公开(公告)号：US07465651B2

公开(公告)日：2008-12-16

申请号：US11173585

申请日：2005-06-30

申请人： Sairam Agraharam ,  Carlton Hanna ,  Vasudeva Atluri ,  Dongming He

发明人： Sairam Agraharam ,  Carlton Hanna ,  Vasudeva Atluri ,  Dongming He

IPC分类号： H01L21/44

CPC分类号： H05K1/111 ,  H01L23/49811 ,  H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/13 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/16225 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/30105 ,  H05K3/3436 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： Mechanical stresses are reduced between an electronic component having relatively low fracture toughness and a substrate having relatively greater fracture toughness. In an embodiment, the component may be a die having mounting contacts formed of a low yield strength material, such as solder. A package substrate has columnar lands formed of a relatively higher yield strength material, such as copper, having a relatively higher melting point than the component contacts and having a relatively high current-carrying capacity. The component contacts may be hemispherical in shape. The lands may be substantially cylinders, truncated cones or pyramids, inverted truncated cones or pyramids, or other columnar shapes. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.

摘要翻译： 具有较低断裂韧性的电子部件和具有相对较大断裂韧性的基材之间的机械应力降低。 在一个实施例中，组件可以是具有由低屈服强度材料（例如焊料）形成的安装触点的模具。 封装衬底具有由相对较高屈服强度的材料（例如铜）形成的柱状焊盘，其具有比部件接触更高的熔点并且具有相对高的载流能力。 部件触点的形状可以是半球形。 土地可以是基本上圆柱体，截头圆锥体或棱锥体，倒置的锥形锥体或棱锥体，或其他柱状形状。 还描述了制造方法以及将包装应用于电子组件和电子系统。