公开(公告)号：US20090065931A1

公开(公告)日：2009-03-12

申请号：US11853461

申请日：2007-09-11

申请人： Sudarshan V. Rangaraj ,  Sanka Ganesan ,  Dongming He ,  Richard J. Harries ,  Sairam Agraharam

发明人： Sudarshan V. Rangaraj ,  Sanka Ganesan ,  Dongming He ,  Richard J. Harries ,  Sairam Agraharam

IPC分类号： H01L23/52 ,  H01L21/44

CPC分类号： H01L24/81 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10674 ,  Y02P70/613 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

摘要： Disclosed is a packaged integrated circuit and a method of forming thereof. The packaged integrated circuit includes a substrate, a plurality of solder bumps, a semiconductor die and a plurality of copper bumps. The plurality of solder bumps are configured on the substrate. Each of the plurality of solder bumps has a height of about 40 micrometers (μm) to about 65 μm. Further, the plurality of copper bumps are configured on the semiconductor die. Each of the plurality of copper bumps has a height of about 10 μm to about 25 μm. The semiconductor die is disposed above the substrate such that the plurality of copper bumps are coupled to the plurality of solder bumps, which in turn, couples the semiconductor die to the substrate.

摘要翻译： 公开了一种封装集成电路及其形成方法。 封装的集成电路包括衬底，多个焊料凸块，半导体管芯和多个铜凸块。 多个焊料凸点配置在基板上。 多个焊料凸块中的每一个具有约40微米（mum）至约65μm的高度。 此外，多个铜凸块配置在半导体管芯上。 多个铜凸块中的每一个具有约10μm至约25μm的高度。 半导体管芯设置在衬底之上，使得多个铜凸块耦合到多个焊料凸块，其又将半导体管芯耦合到衬底。

公开(公告)号：US20080096310A1

公开(公告)日：2008-04-24

申请号：US11541233

申请日：2006-09-29

申请人： Mitul Modi ,  Sudarshan V. Rangaraj ,  Shankar Ganapathysubramanian ,  Richard J. Harries ,  Sankara J. Subramanian

发明人： Mitul Modi ,  Sudarshan V. Rangaraj ,  Shankar Ganapathysubramanian ,  Richard J. Harries ,  Sankara J. Subramanian

IPC分类号： H01L21/00 ,  H01L23/02

CPC分类号： H01L23/147 ,  H01L23/15 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/162 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/068 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A linear coefficient of thermal expansion (CTE) mismatch between two materials, such as between a microelectronic die and a mounting substrate, may induce stress at the interface of the materials. The temperature changes present during the process of attaching a die to a mounting substrate can cause cracking and failure in the electrical connections used to connect the die and mounting substrate. A material with a CTE approximately matching the die CTE is introduced in the mounting substrate to reduce the stress and cracking at the electrical connections between the die and mounting substrate. Additionally, this material may comprise thin film capacitors useful for decoupling power supplies.

摘要翻译： 两种材料（例如微电子管芯和安装衬底之间）的线性热膨胀系数（CTE）失配可能在材料的界面处引起应力。 在将管芯附接到安装基板的过程中存在的温度变化可能导致用于连接管芯和安装基板的电连接中的开裂和故障。 在安装基板中引入具有与模具CTE近似匹配的CTE的材料，以减少管芯和安装基板之间的电连接处的应力和开裂。 此外，该材料可以包括用于去耦电源的薄膜电容器。

公开(公告)号：US20080001282A1

公开(公告)日：2008-01-03

申请号：US11479258

申请日：2006-06-30

申请人： Mitul Modi ,  Sudarshan V. Rangaraj ,  Shankar Ganapathysubramanian ,  Richard J. Harries ,  Sankara J. Subramanian

发明人： Mitul Modi ,  Sudarshan V. Rangaraj ,  Shankar Ganapathysubramanian ,  Richard J. Harries ,  Sankara J. Subramanian

IPC分类号： H01L23/10

CPC分类号： H01L23/42 ,  H01L21/563 ,  H01L23/10 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/16152 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A microelectronic assembly is provided, comprising at least a first microelectronic die carrying a microelectronic circuit, at least a first periphery seal attached to an edge of a surface of the microelectronic die, at least a first solder thermal interface material attached to a central region of the surface of the microelectronic die, the solder thermal interface material having a higher thermal conductivity than the periphery seal, and a thermally conductive member attached to the periphery seal and the solder thermal interface material on a side thereof opposing the microelectronic die.

摘要翻译： 提供了一种微电子组件，其包括至少第一微电子管芯，其携带微电子电路，至少第一周边密封件附接到微电子管芯的表面的边缘，至少第一焊料热界面材料附着到中心区域 微电子管芯的表面，焊料热界面材料具有比周边密封件更高的热导率;以及导热构件，其附接到与微电子管芯相对的一侧上的外围密封件和焊料热界面材料。

公开(公告)号：US07719109B2

公开(公告)日：2010-05-18

申请号：US11541233

申请日：2006-09-29

申请人： Mitul Modi ,  Sudarshan V. Rangaraj ,  Shankar Ganapathysubramanian ,  Richard J. Harries ,  Sankara J. Subramanian

发明人： Mitul Modi ,  Sudarshan V. Rangaraj ,  Shankar Ganapathysubramanian ,  Richard J. Harries ,  Sankara J. Subramanian

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L23/147 ,  H01L23/15 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/162 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/068 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A linear coefficient of thermal expansion (CTE) mismatch between two materials, such as between a microelectronic die and a mounting substrate, may induce stress at the interface of the materials. The temperature changes present during the process of attaching a die to a mounting substrate can cause cracking and failure in the electrical connections used to connect the die and mounting substrate. A material with a CTE approximately matching the die CTE is introduced in the mounting substrate to reduce the stress and cracking at the electrical connections between the die and mounting substrate. Additionally, this material may comprise thin film capacitors useful for decoupling power supplies.

摘要翻译： 两种材料（例如微电子管芯和安装衬底之间）的线性热膨胀系数（CTE）失配可能在材料的界面处引起应力。 在将管芯附接到安装基板的过程中存在的温度变化可能导致用于连接管芯和安装基板的电连接中的开裂和故障。 在安装基板中引入具有与模具CTE近似匹配的CTE的材料，以减少管芯和安装基板之间的电连接处的应力和开裂。 此外，该材料可以包括用于去耦电源的薄膜电容器。

公开(公告)号：US20110122592A1

公开(公告)日：2011-05-26

申请号：US12592395

申请日：2009-11-24

申请人： Sanka Ganesan ,  Richard J. Harries ,  Sujit Sharan

发明人： Sanka Ganesan ,  Richard J. Harries ,  Sujit Sharan

IPC分类号： H05K7/02 ,  H01L21/60 ,  H01L23/488 ,  H01L23/48

CPC分类号： H01L24/14 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/10145 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13028 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1411 ,  H01L2224/1601 ,  H01L2224/1613 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2924/01083 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552 ,  H01L2924/00

摘要： A column is coupled to a last metallization of a die and the column is mated to a mounting substrate with that aid of a solder. The column may have the solder attached thereto before mating to the mounting substrate and the mounting substrate may be a bare-board (no solder mask) during the mating process. The column has an aspect ratio between 0.75 and 10.

摘要翻译： 将柱与模具的最后金属化相结合，并且通过焊料的帮助将该柱配合到安装基板。 在配合到安装基板之前，柱可以具有附着于其上的焊料，并且在配合过程期间，安装基板可以是裸板（无焊接掩模）。 色谱柱的长宽比在0.75和10之间。

公开(公告)号：US07294533B2

公开(公告)日：2007-11-13

申请号：US10612764

申请日：2003-06-30

申请人： Vassou Lebonheur ,  Richard J. Harries

发明人： Vassou Lebonheur ,  Richard J. Harries

IPC分类号： H01L21/56

CPC分类号： H01L21/563 ,  H01L23/3135 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/1433 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2224/0401

摘要： A molding compound cap structure is disclosed. A process of forming the molding compound cap structure is also disclosed. A microelectronic package is also disclosed that uses the molding compound cap structure. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the molding compound cap structure. The molding compound cap includes a configuration that exposes a portion of a microelectronic device.

摘要翻译： 公开了一种成型复合帽结构。 还公开了一种形成模塑料盖结构的方法。 还公开了一种使用模制复合盖结构的微电子封装。 还公开了组装微电子封装的方法。 还公开了包括模制复合盖结构的计算系统。 模制复合帽包括暴露微电子器件的一部分的构造。

公开(公告)号：US08664771B2

公开(公告)日：2014-03-04

申请号：US13493693

申请日：2012-06-11

申请人： Richard J. Harries ,  Sudarashan V. Rangaraj ,  Bob Sankman

发明人： Richard J. Harries ,  Sudarashan V. Rangaraj ,  Bob Sankman

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05599 ,  H01L2224/10126 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19043 ,  H01L2224/05552

摘要： Some embodiments of the present invention include apparatuses and methods relating to processing and packaging microelectronic devices that reduce stresses on and limit or eliminate crack propagation in the devices.

摘要翻译： 本发明的一些实施例包括与减少应力并限制或消除器件中裂纹扩展的微电子器件的处理和封装相关的装置和方法。

公开(公告)号：US20120241952A1

公开(公告)日：2012-09-27

申请号：US13493693

申请日：2012-06-11

申请人： Richard J. Harries ,  Sudarashan V. Rangaraj ,  Bob Sankman

发明人： Richard J. Harries ,  Sudarashan V. Rangaraj ,  Bob Sankman

IPC分类号： H01L23/488

CPC分类号： H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05599 ,  H01L2224/10126 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19043 ,  H01L2224/05552

摘要： Some embodiments of the present invention include apparatuses and methods relating to processing and packaging microelectronic devices that reduce stresses on and limit or eliminate crack propagation in the devices.

摘要翻译： 本发明的一些实施例包括与减少应力并限制或消除器件中裂纹扩展的微电子器件的处理和封装相关的装置和方法。

公开(公告)号：US09414484B2

公开(公告)日：2016-08-09

申请号：US13992606

申请日：2011-11-09

申请人： Pramod Malatkar ,  Richard J. Harries

发明人： Pramod Malatkar ,  Richard J. Harries

IPC分类号： H05K7/00 ,  H05K1/02 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L23/562 ,  H01L21/485 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16225 ,  H05K1/0271

摘要： The present description relates to the field of fabricating microelectronic packages, wherein a microelectronic device may be attached to a microelectronic substrate with a compensator to control package warpage. The warpage compensator may be a low coefficient of thermal expansion material, including but not limited to silicon or a ceramic material, which is positioned on a land-side of the microelectronic device to counteract the thermal expansion effects of the microelectronic device.

摘要翻译： 本描述涉及制造微电子封装的领域，其中微电子器件可以用补偿器附着到微电子衬底以控制封装翘曲。 翘曲补偿器可以是低的热膨胀材料系数，包括但不限于硅或陶瓷材料，其位于微电子器件的陆侧上以抵消微电子器件的热膨胀效应。

公开(公告)号：US08941236B2

公开(公告)日：2015-01-27

申请号：US13631713

申请日：2012-09-28

申请人： Ameya Limaye ,  Richard J. Harries ,  Sandeep B. Sane

发明人： Ameya Limaye ,  Richard J. Harries ,  Sandeep B. Sane

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/81007 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/81

摘要： Provided are an electronic assembly and method for forming the same, comprising a first element having a first surface and a second element having a second surface.Electrical connections are provided between the first and the second elements formed by heating solder bumps. At least one collapse limiter structure is coupled to at least one of the first and the second surfaces, wherein the at least one collapse limiter structure is between at least two of the electrical connections.

摘要翻译： 提供一种电子组件及其形成方法，包括具有第一表面的第一元件和具有第二表面的第二元件。 在通过加热焊料凸块形成的第一和第二元件之间提供电连接。 至少一个崩溃限制器结构耦合到第一和第二表面中的至少一个，其中至少一个崩溃限制器结构在至少两个电连接之间。