公开(公告)号：US08809169B2

公开(公告)日：2014-08-19

申请号：US13250937

申请日：2011-09-30

申请人： David L. O'Meara ,  Aelan Mosden

发明人： David L. O'Meara ,  Aelan Mosden

IPC分类号： H01L21/20 ,  H01L21/033

CPC分类号： H01L21/0337 ,  H01L21/0338

摘要： A method of patterning a substrate. A sacrificial film is formed over a substrate and a pattern created therein. A first spacer layer is conformally deposited over the patterned sacrificial film and at least one horizontal portion of the first spacer layer is removed while vertical portions of the first spacer layer remain. A second spacer layer is conformally deposited over the patterned sacrificial film and the remaining portions of the first spacer layer. At least one horizontal portion of the second spacer layer is removed while vertical portions of the second spacer layer remain. Conformal deposition of the first and second spacer layers is optionally repeated one or more times. Conformal deposition of the first layer is optionally repeated. Then, one of the first or second spacer layers is removed while substantially leaving the vertical portions of the remaining one of the first or second spacer layers.

摘要翻译： 图案化衬底的方法。 在衬底上形成牺牲膜，并在其中形成图案。 第一间隔层被共形沉积在图案化的牺牲膜上，并且除去第一间隔层的垂直部分的第一间隔层的至少一个水平部分。 在图案化的牺牲膜和第一间隔层的剩余部分上共形沉积第二间隔层。 除去第二间隔层的至少一个水平部分，同时保留第二间隔层的垂直部分。 第一和第二间隔层的共形沉积可选地重复一次或多次。 任选地重复第一层的共形沉积。 然后，去除第一或第二间隔层中的一个，同时基本上留下第一或第二间隔层中剩余的一个的垂直部分。

公开(公告)号：US20110241085A1

公开(公告)日：2011-10-06

申请号：US12751891

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

IPC分类号： H01L29/78 ,  H01L21/311

CPC分类号： H01L29/4983 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconducting device with a dual sidewall spacer and method of forming are provided. The method includes: depositing a first spacer layer over a patterned structure, the first spacer layer having a seam propagating through a thickness of the first spacer layer near an interface region of a surface of the substrate and a sidewall of the patterned structure, etching the first spacer layer to form a residual spacer at the interface region, where the residual spacer coats less than the entirety of the sidewall of the patterned structure, depositing a second spacer layer on the residual spacer and on the sidewall of the patterned structure not coated by the residual spacer, the second spacer layer being seam-free on the seam of the residual spacer, and etching the second spacer layer to form a second spacer coating the residual spacer and coating the sidewall of the patterned structure not coated by the residual spacer.

摘要翻译： 提供了具有双侧壁间隔件和成形方法的半导体器件。 该方法包括：在图案化结构上沉积第一间隔层，第一间隔层具有在衬底的表面的界面区附近传播穿过第一间隔层的厚度的接缝和图案化结构的侧壁，蚀刻 第一间隔层，以在界面区域处形成残留间隔物，其中残余间隔物涂覆小于图案化结构的侧壁的整体，在剩余间隔物上和在图案化结构的侧壁上沉积第二间隔层， 所述剩余间隔物，所述第二间隔层在所述残余间隔物的接缝上是无缝的，并且蚀刻所述第二间隔层以形成涂覆所述剩余间隔物并涂覆未被所述残留间隔物涂覆的所述图案化结构的侧壁的第二间隔物。

公开(公告)号：US08673725B2

公开(公告)日：2014-03-18

申请号：US12751926

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

IPC分类号： H01L29/78

CPC分类号： H01L21/28247 ,  H01L29/6656

摘要： A semiconducting device with a multilayer sidewall spacer and method of forming are described. In one embodiment, the method includes providing a substrate containing a patterned structure on a surface of the substrate and depositing a first spacer layer over the patterned structure at a first substrate temperature, where the first spacer layer contains a first material. The method further includes depositing a second spacer layer over the patterned substrate at a second substrate temperature that is different from the first substrate temperature, where the first and second materials contain the same chemical elements, and the depositing steps are performed in any order. The first and second spacer layers are then etched to form the multilayer sidewall spacer on the patterned structure.

摘要翻译： 描述了具有多层侧壁间隔件和形成方法的半导体器件。 在一个实施例中，该方法包括在衬底的表面上提供含有图案化结构的衬底，并且在第一衬底温度下在第一衬底温度下沉积在图案化结构上的第一间隔层，其中第一间隔层包含第一材料。 该方法还包括在不同于第一衬底温度的第二衬底温度下在图案化衬底上沉积第二间隔层，其中第一和第二材料含有相同的化学元素，并且沉积步骤以任何顺序进行。 然后蚀刻第一和第二间隔层以在图案化结构上形成多层侧壁间隔物。

公开(公告)号：US20130084688A1

公开(公告)日：2013-04-04

申请号：US13250937

申请日：2011-09-30

申请人： David L. O'Meara ,  Aelan Mosden

发明人： David L. O'Meara ,  Aelan Mosden

IPC分类号： H01L21/20

CPC分类号： H01L21/0337 ,  H01L21/0338

摘要： A method of patterning a substrate. A sacrificial film is formed over a substrate and a pattern created therein. A first spacer layer is conformally deposited over the patterned sacrificial film and at least one horizontal portion of the first spacer layer is removed while vertical portions of the first spacer layer remain. A second spacer layer is conformally deposited over the patterned sacrificial film and the remaining portions of the first spacer layer. At least one horizontal portion of the second spacer layer is removed while vertical portions of the second spacer layer remain. Conformal deposition of the first and second spacer layers is optionally repeated one or more times. Conformal deposition of the first layer is optionally repeated. Then, one of the first or second spacer layers is removed while substantially leaving the vertical portions of the remaining one of the first or second spacer layers.

摘要翻译： 图案化衬底的方法。 在衬底上形成牺牲膜，并在其中形成图案。 第一间隔层被共形沉积在图案化的牺牲膜上，并且除去第一间隔层的垂直部分的第一间隔层的至少一个水平部分。 在图案化的牺牲膜和第一间隔层的剩余部分上共形沉积第二间隔层。 除去第二间隔层的至少一个水平部分，同时保留第二间隔层的垂直部分。 第一和第二间隔层的共形沉积可选地重复一次或多次。 任选地重复第一层的共形沉积。 然后，去除第一或第二间隔层中的一个，同时基本上留下第一或第二间隔层中剩余的一个的垂直部分。

公开(公告)号：US08664102B2

公开(公告)日：2014-03-04

申请号：US12751891

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L29/4983 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconducting device with a dual sidewall spacer and method of forming are provided. The method includes: depositing a first spacer layer over a patterned structure, the first spacer layer having a seam propagating through a thickness of the first spacer layer near an interface region of a surface of the substrate and a sidewall of the patterned structure, etching the first spacer layer to form a residual spacer at the interface region, where the residual spacer coats less than the entirety of the sidewall of the patterned structure, depositing a second spacer layer on the residual spacer and on the sidewall of the patterned structure not coated by the residual spacer, the second spacer layer being seam-free on the seam of the residual spacer, and etching the second spacer layer to form a second spacer coating the residual spacer and coating the sidewall of the patterned structure not coated by the residual spacer.

摘要翻译： 提供了具有双侧壁间隔件和成形方法的半导体器件。 该方法包括：在图案化结构上沉积第一间隔层，第一间隔层具有在衬底的表面的界面区附近传播穿过第一间隔层的厚度的接缝和图案化结构的侧壁，蚀刻 第一间隔层，以在界面区域处形成残留间隔物，其中残余间隔物涂覆小于图案化结构的侧壁的整体，在剩余间隔物上和在图案化结构的侧壁上沉积第二间隔层， 所述剩余间隔物，所述第二间隔层在所述残余间隔物的接缝上是无缝的，并且蚀刻所述第二间隔层以形成涂覆所述剩余间隔物并涂覆未被所述残留间隔物涂覆的所述图案化结构的侧壁的第二间隔物。

公开(公告)号：US20110241128A1

公开(公告)日：2011-10-06

申请号：US12751926

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L21/28247 ,  H01L29/6656

摘要： A semiconducting device with a multilayer sidewall spacer and method of forming are described. In one embodiment, the method includes providing a substrate containing a patterned structure on a surface of the substrate and depositing a first spacer layer over the patterned structure at a first substrate temperature, where the first spacer layer contains a first material. The method further includes depositing a second spacer layer over the patterned substrate at a second substrate temperature that is different from the first substrate temperature, where the first and second materials contain the same chemical elements, and the depositing steps are performed in any order. The first and second spacer layers are then etched to form the multilayer sidewall spacer on the patterned structure.

摘要翻译： 描述了具有多层侧壁间隔件和形成方法的半导体器件。 在一个实施例中，该方法包括在衬底的表面上提供含有图案化结构的衬底，并且在第一衬底温度下在第一衬底温度下沉积在图案化结构上的第一间隔层，其中第一间隔层包含第一材料。 该方法还包括在不同于第一衬底温度的第二衬底温度下在图案化衬底上沉积第二间隔层，其中第一和第二材料含有相同的化学元素，并且沉积步骤以任何顺序进行。 然后蚀刻第一和第二间隔层以在图案化结构上形成多层侧壁间隔物。

公开(公告)号：US07291446B2

公开(公告)日：2007-11-06

申请号：US10801571

申请日：2004-03-17

申请人： Aelan Mosden ,  Dung Phan

发明人： Aelan Mosden ,  Dung Phan

IPC分类号： G03F7/26

CPC分类号： G03F7/091 ,  G03F7/0752 ,  G03F7/11 ,  G03F7/40 ,  G03F7/405 ,  G03F7/427 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/32139

摘要： During pattern transfer to a film stack, the hard mask layer, such as a tunable etch resistant antireflective coating (TERA), is consumed when etching the underling layer(s), leading to reduced etch performance and potential damage to the underlying layer(s), such as lack of profile control. A method of and system for preparing a structure on a substrate is described comprising: preparing a film stack comprising a thin film, a hard mask formed on the thin film, and a layer of light-sensitive material formed on the hardmask; forming a pattern in the layer of light-sensitive material; transferring the pattern to the hard mask; removing the layer of light-sensitive material; treating the surface layer of the hard mask in order to modify the surface; and transferring the pattern to the thin film.

摘要翻译： 在图案转印到薄膜叠层中，当蚀刻底层时，硬掩模层（例如可调蚀抗蚀抗反射涂层（TERA））被消耗，导致降低的蚀刻性能和对下层的潜在损伤 ），如缺少配置文件控制。 描述了一种用于在衬底上制备结构的方法和系统，其包括：制备包括薄膜，形成在薄膜上的硬掩模和形成在硬掩模上的感光材料层的薄膜叠层; 在感光材料层中形成图案; 将图案转移到硬掩模; 去除感光材料层; 处理硬掩模的表面层以改变表面; 并将图案转印到薄膜上。

公开(公告)号：US20050205209A1

公开(公告)日：2005-09-22

申请号：US10803805

申请日：2004-03-18

申请人： Aelan Mosden

发明人： Aelan Mosden

IPC分类号： C23C14/00 ,  C23F1/00

CPC分类号： H01L21/67748 ,  H01L21/67069

摘要： An apparatus and method are provided for replacing parts in a vacuum chamber without venting the vacuum. A transfer system is used to transfer a removably mounted component from a processing module that is attached to a transfer system and replacing the component with another component from a maintenance system that is connected through an isolation assembly to a transfer module. The maintenance system may include a supply of replacement parts and receive expended or otherwise serviceable items that are to be replaced. These serviceable items may include chamber component that has a tendency to degrade during processes being performed in the processing module. Typically, such items are etched or eroded away or accumulate coatings, requiring occasional removal and replacement. Focus rings, chamber shields, dark space shields, insulators, deposition baffles and adaptors are some of the items requiring periodic replacement. Such items are installed in the process module in a way that permits their removal and replacement by a transfer arm or other transfer mechanism of the transfer system or otherwise by robotic mechanisms. The processing module may be an etching, deposition, ALD, patterning, developing, metrology, thermal processing, cleaning or other module used in a vacuum process, particularly for processing of semiconductor wafers.

摘要翻译： 提供一种用于更换真空室中的部件而不排出真空的装置和方法。 传送系统用于从附接到传送系统的处理模块传送可拆卸地安装的组件，并且通过隔离组件连接到传送模块的维护系统将组件替换为另一组件。 维护系统可以包括替换部件的供应并且接收待更换的消耗或其他可维修的物品。 这些可使用的物品可以包括在处理过程中在处理模块中执行时倾向于降级的腔室部件。 通常，这些物品被蚀刻或腐蚀掉或积聚涂层，需要偶尔的去除和更换。 聚焦环，室罩，暗室屏蔽，绝缘体，沉积挡板和适配器是需要定期更换的一些项目。 这些物品以允许通过传送系统的传送臂或其它传送机构或其他机器人机构的移除和更换的方式安装在处理模块中。 处理模块可以是在真空工艺中使用的蚀刻，沉积，ALD，图案化，显影，计量，热处理，清洁或其他模块，特别是用于半导体晶片的处理。

公开(公告)号：US20060006136A1

公开(公告)日：2006-01-12

申请号：US10883784

申请日：2004-07-06

申请人： Aelan Mosden ,  Asao Yamashita

发明人： Aelan Mosden ,  Asao Yamashita

IPC分类号： B44C1/22 ,  H01L21/311

CPC分类号： H01L21/02167 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/3148 ,  H01L21/31633

摘要： A processing system and method for chemically treating a TERA layer on a substrate. The chemical treatment of the substrate chemically alters exposed surfaces on the substrate. In one embodiment, the system for processing a TERA layer includes a plasma-enhanced chemical vapor deposition (PECVD) system for depositing the TERA layer on the substrate, an etching system for creating features in the TERA layer, and a processing subsystem for reducing the size of the features in the TERA layer.

摘要翻译： 一种用于化学处理基底上的TERA层的处理系统和方法。 衬底的化学处理化学改变衬底上的暴露表面。 在一个实施例中，用于处理TERA层的系统包括用于在衬底上沉积TERA层的等离子体增强化学气相沉积（PECVD）系统，用于在TERA层中创建特征的蚀刻系统，以及用于减少 TERA图层中的特征尺寸。

公开(公告)号：US20060254716A1

公开(公告)日：2006-11-16

申请号：US11486105

申请日：2006-07-14

申请人： Aelan Mosden ,  Asao Yamashita

发明人： Aelan Mosden ,  Asao Yamashita

IPC分类号： C23F1/00 ,  H01L21/306 ,  C23C16/00

CPC分类号： H01L21/02167 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/3148 ,  H01L21/31633

摘要： A processing system and method for chemically treating a TERA layer on a substrate. The chemical treatment of the substrate chemically alters exposed surfaces on the substrate. In one embodiment, the system for processing a TERA layer includes a plasma-enhanced chemical vapor deposition (PECVD) system for depositing the TERA layer on the substrate, an etching system for creating features in the TERA layer, and a processing subsystem for reducing the size of the features in the TERA layer.