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    Schottky FET With All Metal Gate
    1.
    发明申请
    Schottky FET With All Metal Gate 审中-公开
    所有金属门肖特基FET

    公开(公告)号：US20110248343A1

    公开(公告)日：2011-10-13

    申请号：US12755720

    申请日：2010-04-07

    申请人： Dechao Guo ,  Marwan Khater ,  Christian Lavoie ,  Qiqing Ouyang ,  Zhen Zhang

    发明人： Dechao Guo ,  Marwan Khater ,  Christian Lavoie ,  Qiqing Ouyang ,  Zhen Zhang

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L21/26513 ,  H01L21/265 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/66643 ,  H01L29/7839

    摘要： A method for forming a Schottky field effect transistor (FET) includes forming a gate stack on a silicon substrate, the gate stack comprising a gate polysilicon on top of a gate metal layer; depositing a metal layer over the gate polysilicon and the silicon substrate; annealing the metal layer, the gate polysilicon, and the silicon substrate such that the metal layer fully consumes the gate polysilicon to form a gate silicide and reacts with portions of the silicon substrate to form source/drain silicide regions in the silicon substrate; and in the event a portion of the metal layer does not react with the gate polysilicon or the silicon substrate, removing the unreacted portion of the metal layer.

    摘要翻译： 一种用于形成肖特基场效应晶体管（FET）的方法包括在硅衬底上形成栅极堆叠，所述栅叠层在栅极金属层的顶部包括栅极多晶硅; 在栅极多晶硅和硅衬底上沉积金属层; 使金属层，栅极多晶硅和硅衬底退火，使得金属层完全消耗栅极多晶硅以形成栅极硅化物，并与硅衬底的部分反应以在硅衬底中形成源极/漏极硅化物区域; 并且在金属层的一部分不与栅极多晶硅或硅衬底反应的情况下，去除金属层的未反应部分。

    Schottky Junction Source/Drain FET Fabrication Using Sulfur or Flourine Co-Implantation
    4.
    发明申请
    Schottky Junction Source/Drain FET Fabrication Using Sulfur or Flourine Co-Implantation 审中-公开
    肖特基连接源/排水FET使用硫磺或者氟植物共同植入

    公开(公告)号：US20110241115A1

    公开(公告)日：2011-10-06

    申请号：US12754079

    申请日：2010-04-05

    申请人： Christian Lavoie ,  Siegfried L. Maurer ,  Qiqing Ouyang ,  Paul Solomon ,  Zhen Zhang

    发明人： Christian Lavoie ,  Siegfried L. Maurer ,  Qiqing Ouyang ,  Paul Solomon ,  Zhen Zhang

    IPC分类号： H01L27/12 ,  H01L21/762 ,  H01L21/28

    CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/28518 ,  H01L29/47 ,  H01L29/4908 ,  H01L29/66772 ,  H01L29/7839 ,  H01L29/78654

    摘要： A Schottky field effect transistor (FET) includes a gate stack located on a silicon on insulator (SOI) layer, the gate stack comprising a gate silicide region; and source/drain silicide regions located in the SOI layer, the source/drain silicide regions comprising and at least one of sulfur and fluorine, wherein an interface comprising arsenic is located between each of the source/drain silicide regions and the SOI layer. A method of forming a contact, the contact comprising a silicide region adjacent to a silicon region, includes co-implanting the silicide region with arsenic and at least one of sulfur and fluorine; and drive-in annealing the co-implanted silicide region to diffuse the arsenic to an interface between the silicide region and the silicon region.

    摘要翻译： 肖特基场效应晶体管（FET）包括位于绝缘体上硅（SOI）层上的栅极堆叠，栅极叠层包括栅极硅化物区域; 位于SOI层中的源极/漏极硅化物区域，源极/漏极硅化物区域包括硫和氟中的至少一个，其中包含砷的界面位于每个源/漏硅化物区域和SOI层之间。 一种形成接触的方法，包括与硅区相邻的硅化物区的接触包括将砷化硅区域与砷和硫和氟中的至少一种共同注入; 并且将共注入的硅化物区域驱入退火以将砷扩散到硅化物区域和硅区域之间的界面。

    Schottky FET Fabricated With Gate Last Process
    10.
    发明申请
    Schottky FET Fabricated With Gate Last Process 失效
    采用栅极末端工艺制造的肖特基FET

    公开(公告)号：US20120007181A1

    公开(公告)日：2012-01-12

    申请号：US12834428

    申请日：2010-07-12

    申请人： Jin Cai ,  Dechao Guo ,  Marwan H. Khater ,  Christian Lavoie ,  Zhen Zhang

    发明人： Jin Cai ,  Dechao Guo ,  Marwan H. Khater ,  Christian Lavoie ,  Zhen Zhang

    IPC分类号： H01L27/12 ,  H01L21/84

    CPC分类号： H01L29/66772 ,  H01L29/458 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66621

    摘要： A method for forming a field effect transistor (FET) includes forming a dummy gate on a top semiconductor layer of a semiconductor on insulator substrate; forming source and drain regions in the top semiconductor layer, wherein the source and drain regions are located in the top semiconductor layer on either side of the dummy gate; forming a supporting material over the source and drain regions adjacent to the dummy gate; removing the dummy gate to form a gate opening, wherein a channel region of the top semiconductor layer is exposed through the gate opening; thinning the channel region of the top semiconductor layer through the gate opening; and forming gate spacers and a gate in the gate opening over the thinned channel region.

    摘要翻译： 一种形成场效应晶体管（FET）的方法包括在绝缘体上半导体衬底的顶部半导体层上形成一个虚拟栅极; 在顶部半导体层中形成源极和漏极区域，其中源极和漏极区域位于虚拟栅极的任一侧的顶部半导体层中; 在与所述虚拟栅极相邻的所述源极和漏极区域上形成支撑材料; 去除所述伪栅极以形成栅极开口，其中所述顶部半导体层的沟道区域通过所述栅极开口暴露; 通过栅极开口来稀薄顶部半导体层的沟道区域; 以及在所述变薄的通道区域上的所述栅极开口中形成栅极间隔物和栅极。