Circuit for data transmission in asynchronous mode with a free reception
frequency locked on the transmission frequency
    1.
    发明授权
    Circuit for data transmission in asynchronous mode with a free reception frequency locked on the transmission frequency 失效
    数据传输电路以异步方式传输,自由接收频率锁定在传输频率上

    公开(公告)号:US5805650A

    公开(公告)日:1998-09-08

    申请号:US551818

    申请日:1995-11-07

    摘要: A circuit for transmitting data in asynchronous transfer mode includes two phase-locked loops associated with a transmission unit and a reception unit, respectively. Each PLL is provided with a voltage-controlled oscillator formed by an astable multivibrator. The reference current fixing the free oscillating frequency of the multivibrator that is associated with the reception unit corresponds to the frequency adjustment current of the multivibrator that is associated with the transmission unit. Each VCO includes a differential amplifier, connected as a voltage-to-current converter, receiving two voltages corresponding to the phase error of the loop with which it is associated, and providing a frequency adjustment current of its astable multivibrator.

    摘要翻译: 用于以异步传送模式发送数据的电路分别包括与发送单元和接收单元相关联的两个锁相环。 每个PLL都配有由不稳定的多谐振荡器形成的压控振荡器。 固定与接收单元相关联的多谐振荡器的自由振荡频率的参考电流对应于与发送单元相关联的多谐振荡器的频率调节电流。 每个VCO包括作为电压 - 电流转换器连接的差分放大器,接收对应于与其相关联的回路的相位误差的两个电压,并提供其不稳定的多谐振荡器的频率调节电流。

    Differential stage logic circuit
    2.
    发明授权
    Differential stage logic circuit 失效
    差分级逻辑电路

    公开(公告)号:US5734272A

    公开(公告)日:1998-03-31

    申请号:US611426

    申请日:1996-03-06

    CPC分类号: H03K19/0016

    摘要: An ECL stage has its current consumption adapted to its operation speed. For this purpose, the load resistor and the bias current source are adjustable so that the product of the current value of the source by the resistor value is substantially constant.

    摘要翻译: ECL阶段的电流消耗适应其运行速度。 为此,可以调节负载电阻和偏置电流源,使源极的电流值乘以电阻值大致恒定。

    Bulk acoustic wave resonator filter being digitally reconfigurable, with process
    3.
    发明授权
    Bulk acoustic wave resonator filter being digitally reconfigurable, with process 有权
    具有数字可重构的体声波谐振器滤波器,具有过程

    公开(公告)号:US08665038B2

    公开(公告)日:2014-03-04

    申请号:US12371415

    申请日:2009-02-13

    IPC分类号: H03H9/54 H04B1/10 H04B1/40

    CPC分类号: H03H9/605 H03H9/542

    摘要: A filtering circuit with BAW type acoustic resonators having at least a first quadripole and a second quadripole connected in cascade, each quadripole having a branch series with a first acoustic resonator of type BAW and a branch parallel with each branch having an acoustic resonator of type BAW, the first acoustic resonator having a frequency of resonance series approximately equal to the frequency of parallel resonance of the second acoustic resonator, the branch parallel of the first quadripole having a first capacitance connected in series with the second resonator and, in parallel with the capacitance, a first switching transistor to short circuit the capacitance.

    摘要翻译: 具有至少具有级联连接的第一四极和第二四极的BAW型声谐振器的滤波电路,每个四极具有与BAW类型的第一声谐振器的分支系列和与具有BAW型声谐振器的每个分支并联的分支 所述第一声谐振器具有大致等于所述第二声谐振器的并联谐振频率的共振频率,所述第一四极杆的分支并联具有与所述第二谐振器串联连接的第一电容器,并且与所述电容器 第一个开关晶体管使电容短路。

    Device and method for generating a signal of parametrizable frequency
    4.
    发明授权
    Device and method for generating a signal of parametrizable frequency 有权
    用于产生可参数频率信号的装置和方法

    公开(公告)号:US08502574B2

    公开(公告)日:2013-08-06

    申请号:US13229478

    申请日:2011-09-09

    IPC分类号: H03L7/06

    摘要: Device for generating a signal of parametrizable frequency comprising a phase locked loop including a generator of a reference signal, a phase-frequency comparator comprising a first input for receiving the reference signal, an oscillator controlled on the basis of the result output by the phase-frequency comparator, a fractional divider coupled between an output of the oscillator and a second input of the phase-frequency comparator, and a selector selectively linking an input of the oscillator either with an input of the generator, or with the output of the oscillator as a function of the multiplication ratio of the fractional divider.

    摘要翻译: 用于生成包括参考信号的发生器的锁相环的参数化频率信号的装置,包括用于接收参考信号的第一输入的相位 - 频率比较器,基于由相位信号输出的结果输出的振荡器, 频率比较器,耦合在振荡器的输出和相位 - 频率比较器的第二输入端之间的分数分频器,以及选择器,选择性地将振荡器的输入与发生器的输入或振荡器的输出相连, 分数分频器的倍率的函数。

    MULTI-STANDARD WIRELESS TRANSMITTER
    7.
    发明申请
    MULTI-STANDARD WIRELESS TRANSMITTER 有权
    多标准无线发射机

    公开(公告)号:US20120314736A1

    公开(公告)日:2012-12-13

    申请号:US13300291

    申请日:2011-11-18

    IPC分类号: H04L25/49

    摘要: The invention concerns a circuit for multi-standard wireless RF transmission comprising: input circuitry (302 to 314) for generating a transmission signal (IT(t), QT(t)) based on an input data signal (I, Q); a power amplifier (316) adapted to amplify said transmission signal to provide an output signal (S(t)) for transmission via at least one antenna; and feedback circuitry (320 to 340) comprising at least one variable low-pass filter (334, 336) for generating a feedback signal (IFB, QFB) based on said output signal, wherein said input circuitry further comprises pre-distortion circuitry (302) adapted to modify said input data signal (I, Q) based on said feedback signal.

    摘要翻译: 本发明涉及一种用于多标准无线RF传输的电路,包括:用于基于输入数据信号(I,Q)产生传输信号(IT(t),QT(t))的输入电路(302至314); 功率放大器(316),适于放大所述传输信号以提供用于经由至少一个天线传输的输出信号(S(t)); 以及包括至少一个可变低通滤波器(334,336)的反馈电路(320至340),用于基于所述输出信号产生反馈信号(IFB,QFB),其中所述输入电路还包括预失真电路 )适于基于所述反馈信号修改所述输入数据信号(I,Q)。

    Radiofrequency signal power amplification method and device
    8.
    发明授权
    Radiofrequency signal power amplification method and device 有权
    射频信号功率放大方法及装置

    公开(公告)号:US08242845B2

    公开(公告)日:2012-08-14

    申请号:US12841803

    申请日:2010-07-22

    IPC分类号: H03G3/10

    摘要: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.

    摘要翻译: 射频信号功率放大电路可以包括用于接收射频信号的信号输入,耦合到信号输入并具有至少一个功率晶体管的放大级,用于将偏置电压传送到放大级的偏置级,以及处理级 。 处理阶段可以包括耦合到信号输入的处理输入,用于将至少以幅度调制的偏置电流传送到偏置级的处理输出以及耦合在处理输入和处理输出之间的幅度调制器,并被配置为确定 信号代表射频信号的包络线,用于基于可变电压设定点调制包络信号的幅度,并且用于基于经调制的包络信号产生幅度调制的偏置电流。

    Phase-Shifting Device for Antenna Array
    9.
    发明申请
    Phase-Shifting Device for Antenna Array 有权
    天线阵相移装置

    公开(公告)号:US20120163425A1

    公开(公告)日:2012-06-28

    申请号:US13328412

    申请日:2011-12-16

    IPC分类号: H04L27/04 H04L5/16

    CPC分类号: H01Q3/26

    摘要: Device comprising processing means (MT), transmission channels (VE1, . . . VEn), an antenna array for transmitting signals comprising a number of antennas (A11 . . . A1n) respectively associated with the transmission channels, a number of digital-analogue converters (DAC) and a number of phase-shifting means (MD1, . . . MDn) respectively associated with the antennas, said phase-shifting means (MD1, . . . MDn) being placed between the processing means (MT) and the digital-analogue converters (DAC) and including digital all-pass filters of FIR type (PT), the processing means comprising control means (MC) configured to adjust the coefficients and/or the order of the all-pass filters of FIR type.

    摘要翻译: 包括处理装置(MT),传输信道(VE1,...,VEn)的装置,用于发送包括分别与传输信道相关联的多个天线(A11 ... A1n)的信号的天线阵列,数字模拟 分别与天线相关联的多个转换器(DAC)和多个移相装置(MD1,...,MDn),所述移相装置(MD1,...,MDn)被放置在处理装置(MT)和 数字模拟转换器(DAC)并且包括FIR类型(PT)的数字全通滤波器,所述处理装置包括被配置为调整FIR类型的全通滤波器的系数和/或顺序的控制装置(MC)。