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    Wireless transmitter incorporating a synchronous oscillator in a translation loop
    1.
    发明授权
    Wireless transmitter incorporating a synchronous oscillator in a translation loop 有权
    无线发射器在平移环路中并入同步振荡器

    公开(公告)号：US06961547B2

    公开(公告)日：2005-11-01

    申请号：US10233231

    申请日：2002-08-30

    申请人： Dmitriy Rozenblit ,  William J. Domino ,  Rahul Magoon

    发明人： Dmitriy Rozenblit ,  William J. Domino ,  Rahul Magoon

    IPC分类号： H04B1/04 ,  H01Q11/12

    CPC分类号： H04B1/04

    摘要： A translation loop signal upconverter is disclosed. Embodiments of the invention minimize nth order harmonics and spurious tones in the radio frequency output spectrum of a portable transceiver. In one embodiment, the invention is a signal upconverter, comprising a modulator configured to develop a modulated intermediate frequency (IF) signal at a fundamental frequency, the modulated IF signal also including a plurality of nth order components, a synchronous oscillator configured to receive the modulated IF signal, the synchronous oscillator also configured to operate at the fundamental frequency of the modulated IF signal, thereby providing an IF signal substantially free of the nth order components, and a translation loop having a phase locked loop, the translation loop configured to receive the IF signal output of the synchronous oscillator, and supply a radio frequency (RF) output signal to a power amplifier.

    摘要翻译： 公开了一种平移环路信号上变频器。 本发明的实施例使便携式收发器的射频输出频谱中的第n级次谐波和伪噪声最小化。 在一个实施例中，本发明是一种信号上变频器，包括调制器，其被配置为开发基频的调制中频（IF）信号，调制IF信号还包括多个第n个次级分量 配置成接收所述经调制的IF信号的同步振荡器，所述同步振荡器还被配置为在所述调制IF信号的基频处工作，由此提供基本上不含所述第n个次级分量的IF信号， 以及具有锁相环的平移环路，所述平移环路被配置为接收所述同步振荡器的IF信号输出，并将射频（RF）输出信号提供给功率放大器。

    Software defined multiple transmit architecture
    2.
    发明授权
    Software defined multiple transmit architecture 有权
    软件定义了多个传输架构

    公开(公告)号：US07376116B2

    公开(公告)日：2008-05-20

    申请号：US10357125

    申请日：2003-02-03

    申请人： Dmitriy Rozenblit ,  William J. Domino ,  Morten Damgaard ,  Rahul Magoon

    发明人： Dmitriy Rozenblit ,  William J. Domino ,  Morten Damgaard ,  Rahul Magoon

    IPC分类号： H04B7/216

    CPC分类号： H04B1/006 ,  H04B1/0003 ,  H04B1/0028 ,  H04B1/0032 ,  H04B1/406 ,  H04W88/06

    摘要： A software defined transmit architecture includes a plurality of individually selectable components that can be selectively enabled to transmit a data signal that complies with any of a plurality of transmission standards. The software defined transmit architecture comprises components that can be enabled by associated logic to transmit, for example, communications signals that comply with the global system for mobile communications (GSM), enhanced data rates for GSM evolution (EDGE), which employs TDMA, and wide band code division multiple access (WCDMA) transmission standards. A single transmit architecture supports multiple transmission standards, thus minimizing the number of components in a multi-band, multi-mode portable transceiver, while reducing the number of active components.

    摘要翻译： 软件定义的发射架构包括多个可单独选择的组件，其可以被选择性地启用以发送符合多个传输标准中的任何一个的数据信号。 软件定义的发射架构包括可由相关逻辑启用的组件，例如，发送符合全球移动通信系统（GSM）的通信信号，采用TDMA的GSM演进增强数据速率（EDGE），以及 宽带码分多址（WCDMA）传输标准。 单个传输架构支持多种传输标准，从而最大限度地减少多频带多模式便携式收发器中的组件数量，同时减少有源组件的数量。

    Frequency plan
    3.
    发明授权
    Frequency plan 失效

    公开(公告)号：US06671500B2

    公开(公告)日：2003-12-30

    申请号：US09823680

    申请日：2001-03-30

    申请人： Morten Damgaard ,  Alyosha C. Molnar ,  Rahul Magoon ,  William J. Domino ,  Andrew Zhang

    发明人： Morten Damgaard ,  Alyosha C. Molnar ,  Rahul Magoon ,  William J. Domino ,  Andrew Zhang

    IPC分类号： H04B104

    CPC分类号： H03D7/163 ,  H03L7/185 ,  H03L7/1974 ,  H04B1/403

    摘要： A system is disclosed for transmitting and receiving signals. The system includes the use of a frequency plan table a system for creating the frequency plan table. The frequency plan table relates carrier frequency channels to the operation of a synthesizer and a plurality of programmable frequency dividers in a locked loop. In a transmitter, a first programmable frequency divider accepts a reference signal and produces a comparison signal. A mixer accepts the reference signal and a transmission signal and produces a loop signal. A second programmable frequency divider accepts the loop signal and produces a loop signal having a divided intermediate frequency signal. A phase detector compares the comparison signal and the loop signal having a divided intermediate frequency and produces an output that controls a variable controlled oscillator. The variable controlled oscillator produces a modulated transmission signal.

    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters
    5.
    发明申请
    High Dynamic Range Time-Varying Integrated Receiver for Elimination of Off-Chip Filters 有权
    高动态范围时变集成接收器，用于消除片外滤波器

    公开(公告)号：US20120196554A1

    公开(公告)日：2012-08-02

    申请号：US13425237

    申请日：2012-03-20

    申请人： Alyosha Molnar ,  Rahul Magoon

    发明人： Alyosha Molnar ,  Rahul Magoon

    IPC分类号： H04B1/16

    CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0088 ,  H03H19/004 ,  H04B1/006 ,  H04B1/48

    摘要： A receiver circuit includes a quadrature passive mixer, a first charge load, and a second charge load. The quadrature passive mixer has a differential input for receiving a differential input signal, and arranged for mixing the differential input signal with a quadrature local oscillator (LO) signal. The quadrature passive mixer has an in-phase mixer with a differential in-phase output, and a quadrature-phase mixer with a differential quadrature-phase output. The first and second charge loads are coupled to differential in-phase output and differential quadrature-phase output, respectively. In every quarter cycle of the quadrature LO signal, the differential in-phase output and the differential quadrature-phase output are arranged to be not shorted so as to avoid charging sharing between the first charge load and the second charge load, or are arranged to be shorted to cause charging sharing between the first charge load and the second charge load that generates a leakage path.

    摘要翻译： 接收器电路包括正交无源混频器，第一充电负载和第二充电负载。 正交无源混频器具有用于接收差分输入信号的差分输入，并且被配置为将差分输入信号与正交本地振荡器（LO）信号进行混频。 正交无源混频器具有差分同相输出的同相混频器和具有差分正交相输出的正交混频器。 第一和第二充电负载分别耦合到差分同相输出和差分正交相输出。 在正交LO信号的每四分之一周期中，差分同相输出和差分正交相输出被布置为不短路，以避免第一充电负载和第二充电负载之间的充电共享，或者被布置为 短路以引起第一充电负载和产生泄漏路径的第二充电负载之间的充电共享。

    High dynamic range time-varying integrated receiver for elimination of off-chip filters
    6.
    发明授权
    High dynamic range time-varying integrated receiver for elimination of off-chip filters 有权
    高动态范围时变集成接收器，用于消除片外滤波器

    公开(公告)号：US07885620B2

    公开(公告)日：2011-02-08

    申请号：US12325821

    申请日：2008-12-01

    申请人： Alyosha Molnar ,  Rahul Magoon

    发明人： Alyosha Molnar ,  Rahul Magoon

    IPC分类号： H04B1/26 ,  H04B15/00

    CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0088 ,  H03H19/004 ,  H04B1/006 ,  H04B1/48

    摘要： A receiver circuit comprising a quadrature passive mixer having an input and an output, and an input impedance of the quadrature passive mixer provides a band-pass response. One or more output impedances coupled to the output of the quadrature passive mixer. A low noise amplifier (LNA) having an input and an output coupled to the quadrature passive mixer, the LNA configured to provide substantially linear transconductance over a predetermined input range.

    摘要翻译： 包括具有输入和输出的正交无源混频器和正交无源混频器的输入阻抗的接收机电路提供带通响应。 耦合到正交无源混频器的输出的一个或多个输出阻抗。 具有耦合到所述正交无源混频器的输入和输出的低噪声放大器（LNA），所述LNA被配置为在预定输入范围上提供基本上线性的跨导。

    Gain compensation
    9.
    发明授权
    Gain compensation 有权
    获得赔偿

    公开(公告)号：US07218905B1

    公开(公告)日：2007-05-15

    申请号：US10172176

    申请日：2002-06-14

    申请人： Alyosha C. Molnar ,  Rahul Magoon ,  Keith J. Rampmeier

    发明人： Alyosha C. Molnar ,  Rahul Magoon ,  Keith J. Rampmeier

    IPC分类号： H04B1/06

    CPC分类号： H04B1/109 ,  H03G3/3052

    摘要： A receiver front end is provided with a low-noise amplifier (LNA), a linearity on demand (LOD) circuit, and a gain calibration device. The LOD circuit provides current to the LNA depending on linearity requirements. The gain calibration device monitors the amount of current provided by the LOD circuit to the LNA and provides signals to help compensate for variations in the LNA's gain due to the variations in the current supplied to the LNA by the LOD circuit. The compensation signals may be used to adjust the gain of a variable-gain amplifier, or may comprise compensation parameters usable by a digital signal processor, to compensate for the gain variations.

    摘要翻译： 接收机前端设有低噪声放大器（LNA），线性点播（LOD）电路和增益校准装置。 LOD电路根据线性要求向LNA提供电流。 增益校准装置监视LOD电路向LNA提供的电流量，并提供信号，以帮助补偿由LOD电路提供给LNA的电流变化引起的LNA增益的变化。 补偿信号可以用于调整可变增益放大器的增益，或者可以包括由数字信号处理器使用的补偿参数，以补偿增益变化。

    On-chip VCO calibration
    10.
    发明授权
    On-chip VCO calibration 有权

    公开(公告)号：US06933789B2

    公开(公告)日：2005-08-23

    申请号：US10712596

    申请日：2003-11-13

    申请人： Alyosha C. Molnar ,  Rahul Magoon ,  Madhukar Reddy ,  Jackie Cheng

    发明人： Alyosha C. Molnar ,  Rahul Magoon ,  Madhukar Reddy ,  Jackie Cheng

    IPC分类号： H03L7/099 ,  H03L7/00 ,  H03B27/00

    CPC分类号： H03L7/099

    摘要： Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.