利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8 条记录 (耗时 0.017 秒)

    Micromechanical system fabrication method using (111) single crystalline silicon
    1.
    发明授权
    Micromechanical system fabrication method using (111) single crystalline silicon 有权
    （111）单晶硅的微机械系统制造方法

    公开(公告)号：US06689694B1

    公开(公告)日：2004-02-10

    申请号：US09715446

    申请日：2000-11-17

    申请人： Dong-Il Cho ,  Sangwoo Lee ,  Sangjun Park

    发明人： Dong-Il Cho ,  Sangwoo Lee ,  Sangjun Park

    IPC分类号： H01L21311

    CPC分类号： C30B29/06 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81C1/00801 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/014 ,  C30B33/00

    摘要： Disclosed is a micromechanical system fabrication method using (111) single crystalline silicon as a silicon substrate and employing a reactive ion etching process in order to pattern a microstructure that will be separated from the silicon substrate and a selective release-etching process utilizing an aqueous alkaline solution in order to separate the microstructure from the silicon substrate. According to the micromechanical system fabrication method of the present invention, the side surfaces of microstructures can be formed to be vertical by employing the RIE technique. Furthermore, the microstructures can be readily separated from the silicon substrate by employing the selective release-etching technique using slow etching {111} planes as the etch stop in an aqueous alkaline solution. In addition, etched depths can be adjusted during the RIE step, thereby adjusting the thickness of the microstructure and the spacing between the microstructure and the silicon substrate.

    摘要翻译： 公开了一种使用（111）单晶硅作为硅衬底并采用反应离子蚀刻工艺以便将从硅衬底分离的微结构图案和利用碱性水溶液的选择性剥离蚀刻工艺的微机械系统制造方法 溶液以将微结构与硅衬底分离。 根据本发明的微机械系统制造方法，通过采用RIE技术，可以将微结构的侧面形成为垂直的。 此外，通过使用选择性剥离蚀刻技术，通过使用慢蚀刻{111}晶面作为碱性水溶液中的蚀刻停止，微结构可以容易地与硅衬底分离。 此外，可以在RIE步骤期间调整蚀刻深度，从而调整微结构的厚度和微结构与硅衬底之间的间隔。

    Isolation in micromachined single crystal silicon using deep trench insulation
    2.
    发明授权
    Isolation in micromachined single crystal silicon using deep trench insulation 有权
    使用深沟槽绝缘的微加工单晶硅中的隔离

    公开(公告)号：US06472290B2

    公开(公告)日：2002-10-29

    申请号：US09756981

    申请日：2001-01-09

    申请人： Dong-il Cho ,  Sangwoo Lee ,  Sangjun Park ,  Sangchul Lee

    发明人： Dong-il Cho ,  Sangwoo Lee ,  Sangjun Park ,  Sangchul Lee

    IPC分类号： H01L2176

    CPC分类号： B81B3/0086 ,  B81B2203/0136 ,  B81B2203/0307 ,  B81B2203/04

    摘要： An electrical isolation method for silicon microelectromechanical systems provides trenches filled with insulation layers that support released silicon structures. The insulation layer that fills the trenches passes through the middle portion of the electrodes, anchors the electrodes to the silicon substrate and supports the electrode. The insulation layers do not attach the electrode to the sidewalls of the substrate, thereby forming an electrode having an “island” shape. Such an electrode is spaced far apart from the adjacent walls of the silicon substrate providing a small parasitic capacitance for the resulting structure. The isolation method is consistent with fabricating a complex structure or a structure with a complicated electrode arrangement. Furthermore, the structure and the electrode are separated from the silicon substrate in a single release step. Additionally, a metal layer is deposited on the surfaces of the structure and electrodes without using separate photolithography and etching steps.

    摘要翻译： 用于硅微机电系统的电隔离方法提供填充有支撑释放的硅结构的绝缘层的沟槽。 填充沟槽的绝缘层通过电极的中间部分，将电极固定到硅衬底并支撑电极。 绝缘层不将电极附着到基板的侧壁，从而形成具有“岛”形状的电极。 这样的电极与硅衬底的相邻壁间隔得很远，为所得到的结构提供了小的寄生电容。 隔离方法与制造具有复杂电极布置的复杂结构或结构一致。 此外，在单个释放步骤中，结构和电极与硅衬底分离。 此外，金属层沉积在结构和电极的表面上，而不使用单独的光刻和蚀刻步骤。

    Micromechanical system fabrication method using (111) single crystalline silicon
    3.
    发明授权
    Micromechanical system fabrication method using (111) single crystalline silicon 有权
    （111）单晶硅的微机械系统制造方法

    公开(公告)号：US6150275A

    公开(公告)日：2000-11-21

    申请号：US250519

    申请日：1999-02-16

    申请人： Dong-Il Cho ,  Sangwoo Lee ,  Sangjun Park

    发明人： Dong-Il Cho ,  Sangwoo Lee ,  Sangjun Park

    IPC分类号： C23F1/00 ,  B81C1/00 ,  C30B33/00 ,  H01L21/311 ,  H01L21/302

    CPC分类号： C30B29/06 ,  B81C1/00801 ,  C30B33/00 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/014

    摘要： Disclosed is a micromechanical system fabrication method using (111) single crystalline silicon as a silicon substrate and employing a reactive ion etching process in order to pattern a microstructure that will be separated from the silicon substrate and a selective release-etching process utilizing an aqueous alkaline solution in order to separate the microstructure from the silicon substrate. According to the micromechanical system fabrication method of the present invention, the side surfaces of microstructures can be formed to be vertical by employing the RIE technique. Furthermore, the microstructures can be readily separated from the silicon substrate by employing the selective release-etching technique using slow etching {111} planes as the etch stop in an aqueous alkaline solution. In addition, etched depths can be adjusted during the RIE step, thereby adjusting the thickness of the microstructure and the spacing between the microstructure and the silicon substrate.

    摘要翻译： 公开了一种使用（111）单晶硅作为硅衬底并采用反应离子蚀刻工艺以便将从硅衬底分离的微结构图案和利用碱性水溶液的选择性剥离蚀刻工艺的微机械系统制造方法 溶液以将微结构与硅衬底分离。 根据本发明的微机械系统制造方法，通过采用RIE技术，可以将微结构的侧面形成为垂直的。 此外，通过使用选择性剥离蚀刻技术，通过使用慢蚀刻{111}晶面作为碱性水溶液中的蚀刻停止，微结构可以容易地与硅衬底分离。 此外，可以在RIE步骤期间调整蚀刻深度，从而调整微结构的厚度和微结构与硅衬底之间的间隔。

    Triple layer isolation for silicon microstructure and structures formed using the same
    4.
    发明授权
    Triple layer isolation for silicon microstructure and structures formed using the same 有权

    公开(公告)号：US06569702B2

    公开(公告)日：2003-05-27

    申请号：US09885832

    申请日：2001-06-19

    申请人： Dong-il Cho ,  Sangwoo Lee ,  Sangjun Park

    发明人： Dong-il Cho ,  Sangwoo Lee ,  Sangjun Park

    IPC分类号： H01L2100

    CPC分类号： B81C1/0019 ,  B81C2201/0178 ,  H01L21/764

    摘要： An isolation method for a single crystalline silicon microstructure using a triple layer structure is disclosed. The method includes forming the triple layer composed of an insulation layer formed over an exposed surface of the silicon microstructure, a conductive layer formed over the entire insulation layer, and a metal layer formed over a top portion of the microstructure; and partially etching the conductive layer to form electrical isolation between parts of the microstructure. The method does not require a separate photolithography process for isolation, and can be effectively applied to microstructures having high aspect ratios and narrow trenches. Also disclosed are single crystalline silicon microstructures having a triple layer isolation structure formed using the disclosed method.

    Probe structure for testing semiconductor devices and method for fabricating the same
    5.
    发明授权
    Probe structure for testing semiconductor devices and method for fabricating the same 有权
    用于测试半导体器件的探针结构及其制造方法

    公开(公告)号：US06724204B2

    公开(公告)日：2004-04-20

    申请号：US10125248

    申请日：2002-04-18

    申请人： Dong-il Cho ,  Sangjun Park

    发明人： Dong-il Cho ,  Sangjun Park

    IPC分类号： G01R3102

    CPC分类号： G01R1/07307 ,  G01R3/00

    摘要： Disclosed are a probe structure for testing semiconductor devices and a method for fabricating the probe structure. The fabricated probe structure of the present invention satisfies the high density, the uniformity of size, height and spacing, and the integration of elements. The probe structure of the present invention solves the conventional problems such as long fabrication time of the probe structure, difficulty in finely controlling the structure of the probe structure, complexity of the whole process, mechanical instability of the products, and difficulty in uniformly assembling a plurality of the probe structures. Additionally, the probe structure of the present invention solves several problems caused in an actual testing step of the semiconductor devices, for instance, long testing time of the semiconductor device, difficulty in providing the sufficient contact force between the probe structure and the semiconductor device, and having to specially design the test pads of the semiconductor device.

    摘要翻译： 公开了用于测试半导体器件的探针结构和用于制造探针结构的方法。 本发明的制造的探针结构满足高密度，尺寸的均匀性，高度和间距以及元件的集成。 本发明的探针结构解决了诸如探针结构的制造时间长，难以精细地控制探针结构的结构，整个过程的复杂性，产品的机械不稳定性以及难以均匀组装的常规问题 多个探针结构。 此外，本发明的探针结构解决了半导体器件的实际测试步骤中引起的几个问题，例如半导体器件的长测试时间，难以在探针结构和半导体器件之间提供足够的接触力， 并且必须专门设计半导体器件的测试焊盘。

    Signal acquisition apparatus and method for distributed compressive sensing and joint signal recovery
    6.
    发明授权
    Signal acquisition apparatus and method for distributed compressive sensing and joint signal recovery 有权
    用于分布式压缩感测和联合信号恢复的信号采集装置和方法

    公开(公告)号：US08391800B2

    公开(公告)日：2013-03-05

    申请号：US13250082

    申请日：2011-09-30

    申请人： Heung-No Lee ,  Junho Lee ,  Sangjun Park

    发明人： Heung-No Lee ,  Junho Lee ,  Sangjun Park

    IPC分类号： H04B17/00 ,  H04W24/00

    CPC分类号： H04L25/03891 ,  H04J11/0046 ,  H04L1/06 ,  H04L2025/03426 ,  H04W52/0251 ,  H04W72/00 ,  H04W84/18 ,  Y02D70/00

    摘要： Disclosed is a multiple sensor system including a plurality of different sensor devices to acquire respective signals sensed from a single signal source, and a signal acquisition apparatus to recover an original signal generated from the signal source. The signal acquisition apparatus recovers the original signal by applying joint recovery, based on characteristics and correlations between the respective sensor devices, to compressive sensing signals independently compressively sensed and transmitted from the respective sensor devices. At this time, a sensing matrix F prearranged with the respective sensor devices and channel information C between the original signal and each sensor device are used for joint recovery.

    摘要翻译： 公开了一种多传感器系统，包括多个不同的传感器装置，以获取从单个信号源感测的各个信号，以及信号采集装置，用于恢复从信号源产生的原始信号。 信号采集装置通过基于相应传感器装置之间的特性和相关性，将压缩感测信号独立地压缩感测并从相应的传感器装置发送来应用联合恢复来恢复原始信号。 此时，使用预先布置有各个传感器装置的感测矩阵F和原始信号与每个传感器装置之间的通道信息C用于联合恢复。