公开(公告)号：US20130126896A1

公开(公告)日：2013-05-23

申请号：US13738406

申请日：2013-01-10

申请人： Ed Lindow ,  Chantal Arena ,  Ronald Bertram ,  Ranjan Datta ,  Subhash Mahajan

发明人： Ed Lindow ,  Chantal Arena ,  Ronald Bertram ,  Ranjan Datta ,  Subhash Mahajan

IPC分类号： H01L29/20

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02617 ,  H01L21/0262

摘要： Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.

摘要翻译： 本发明的实施例涉及制造半导体结构的方法以及通过这些方法制造的半导体结构。 在一些实施例中，该方法可用于制造诸如InGaN的III-V材料的半导体结构。 通过使用不同的生长条件生长子层来制造半导体层，以改善所得层的均匀性，改善所得层的表面粗糙度和/或使层能够生长到增加的厚度而不发生 的应变松弛。

公开(公告)号：US08377802B2

公开(公告)日：2013-02-19

申请号：US13069900

申请日：2011-03-23

申请人： Ed Lindow ,  Chantal Arena ,  Ronald Bertram ,  Ranjan Datta ,  Subhash Mahajan

发明人： Ed Lindow ,  Chantal Arena ,  Ronald Bertram ,  Ranjan Datta ,  Subhash Mahajan

IPC分类号： H01L21/20

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02617 ,  H01L21/0262

摘要： Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.

公开(公告)号：US20110284863A1

公开(公告)日：2011-11-24

申请号：US13069900

申请日：2011-03-23

申请人： Ed Lindow ,  Chantal Arena ,  Ronald Bertram ,  Ranjan Datta ,  Subhash Mahajan

发明人： Ed Lindow ,  Chantal Arena ,  Ronald Bertram ,  Ranjan Datta ,  Subhash Mahajan

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L29/2003 ,  H01L21/0237 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02617 ,  H01L21/0262

摘要： Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.

摘要翻译： 本发明的实施例涉及制造半导体结构的方法以及通过这些方法制造的半导体结构。 在一些实施例中，该方法可用于制造诸如InGaN的III-V材料的半导体结构。 通过使用不同的生长条件生长子层来制造半导体层，以改善所得层的均匀性，改善所得层的表面粗糙度和/或使层能够生长到增加的厚度而不发生 的应变松弛。

公开(公告)号：US08574968B2

公开(公告)日：2013-11-05

申请号：US12180418

申请日：2008-07-25

申请人： Chantal Arena ,  Christiaan J. Werkhoven ,  Ronald Thomas Bertram, Jr. ,  Ed Lindow ,  Subhash Mahajan ,  Ranjan Datta ,  Rahul Ajay Trivedi ,  Ilsu Han

发明人： Chantal Arena ,  Christiaan J. Werkhoven ,  Ronald Thomas Bertram, Jr. ,  Ed Lindow ,  Subhash Mahajan ,  Ranjan Datta ,  Rahul Ajay Trivedi ,  Ilsu Han

IPC分类号： H01L21/82

CPC分类号： H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02645 ,  H01L21/02647

摘要： This invention provides methods for fabricating substantially continuous layers of a group III nitride semiconductor material having low defect densities and optionally having a selected crystal polarity. The methods include epitaxial growth nucleating and/or seeding on the upper portions of a plurality of pillars/islands of a group III nitride material that are irregularly arranged on a template structure. The upper portions of the islands have low defect densities and optionally have a selected crystal polarity. The invention also includes template structures having a substantially continuous layer of a masking material through which emerge upper portions of the pillars/islands. The invention also includes such template structures. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials.

摘要翻译： 本发明提供了用于制造具有低缺陷密度且任选地具有所选晶体极性的III族氮化物半导体材料的基本上连续的层的方法。 所述方法包括在不规则地布置在模板结构上的III族氮化物材料的多个柱/岛的上部上的外延生长成核和/或接种。 岛的上部具有低缺陷密度，并且可选地具有选定的晶体极性。 本发明还包括具有基本连续的掩模材料层的模板结构，通过该掩模材料出现柱/岛的上部。 本发明还包括这样的模板结构。 本发明可以应用于宽范围的半导体材料，包括元素半导体，例如Si（硅）与应变Si（sSi）和/或Ge（锗）的组合，以及化合物半导体，例如II-VI族和 III-V族化合物半导体材料。

公开(公告)号：US09412580B2

公开(公告)日：2016-08-09

申请号：US13988996

申请日：2011-11-23

申请人： Chantal Arena ,  Ronald Thomas Bertram, Jr. ,  Ed Lindow ,  Subhash Mahajan ,  Fanyu Meng

发明人： Chantal Arena ,  Ronald Thomas Bertram, Jr. ,  Ed Lindow ,  Subhash Mahajan ,  Fanyu Meng

IPC分类号： H01L21/02 ,  C30B25/02 ,  C30B29/40 ,  H01L29/20

CPC分类号： H01L21/02104 ,  C30B25/02 ,  C30B29/403 ,  C30B29/406 ,  H01L29/2003

摘要： Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer.

摘要翻译： 本发明的实施方案包括使用卤化物气相外延（HVPE）方法形成III族氮化物半导体结构的方法。 所述方法包括在非天然生长衬底的表面上形成连续的III族氮化物成核层，所述连续III族氮化物成核层隐藏非天然生长衬底的上表面。 形成连续的III族氮化物成核层可以包括形成III族氮化物层并热处理所述III族氮化物层。 方法还可以包括在连续的III族氮化物成核层上形成另外的III族氮化物层。

公开(公告)号：US09076666B2

公开(公告)日：2015-07-07

申请号：US13989004

申请日：2011-11-23

申请人： Chantal Arena ,  Ronald Thomas Bertram, Jr. ,  Ed Lindow ,  Subhash Mahajan ,  Ilsu Han

发明人： Chantal Arena ,  Ronald Thomas Bertram, Jr. ,  Ed Lindow ,  Subhash Mahajan ,  Ilsu Han

IPC分类号： H01L21/00 ,  H01L29/06 ,  C30B25/18 ,  C30B29/40 ,  H01L21/02

CPC分类号： H01L29/0665 ,  C30B25/183 ,  C30B29/403 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02667

摘要： Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semi-conductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.

摘要翻译： 在衬底上沉积III族氮化物半导体材料的方法包括在成核HVPE工艺阶段中在衬底的表面上沉积III族氮化物半导体材料层，以形成具有包含至少一些非晶III族氮化物 半导体材料。 成核层可以退火以在衬底的表面上形成外延成核材料的晶体岛。 外延成核材料岛可以在聚结HVPE工艺阶段中生长和聚结，以形成外延成核材料的成核模板层。 成核模板层可以至少基本上覆盖基材的表面。 另外的III族氮化物半导体材料可以在另外的HVPE工艺阶段中沉积在外延成核材料的成核模板层上。 通过这种方法形成包含III族氮化物半导体材料的最终和中间结构。

公开(公告)号：US20140217553A1

公开(公告)日：2014-08-07

申请号：US13989004

申请日：2011-11-23

申请人： Chantal Arena ,  Ronald Thomas Bertram, JR. ,  Ed Lindow ,  Subhash Mahajan ,  Ilsu Han

发明人： Chantal Arena ,  Ronald Thomas Bertram, JR. ,  Ed Lindow ,  Subhash Mahajan ,  Ilsu Han

IPC分类号： H01L21/02 ,  H01L29/06

CPC分类号： H01L29/0665 ,  C30B25/183 ,  C30B29/403 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02667

摘要： Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semiconductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.

摘要翻译： 在衬底上沉积III族氮化物半导体材料的方法包括在成核HVPE工艺阶段中在衬底的表面上沉积III族氮化物半导体材料层，以形成具有包含至少一些非晶III族氮化物半导体材料的微结构的成核层 。 成核层可以退火以在衬底的表面上形成外延成核材料的晶体岛。 外延成核材料岛可以在聚结HVPE工艺阶段中生长和聚结，以形成外延成核材料的成核模板层。 成核模板层可以至少基本上覆盖基材的表面。 另外的III族氮化物半导体材料可以在另外的HVPE工艺阶段中沉积在外延成核材料的成核模板层上。 通过这种方法形成包含III族氮化物半导体材料的最终和中间结构。

公开(公告)号：US20130234157A1

公开(公告)日：2013-09-12

申请号：US13988996

申请日：2011-11-23

申请人： Chantal Arena ,  Ronald Thomas Bertram, JR. ,  Ed Lindow ,  Subhash Mahajan ,  Fanyu Meng

发明人： Chantal Arena ,  Ronald Thomas Bertram, JR. ,  Ed Lindow ,  Subhash Mahajan ,  Fanyu Meng

IPC分类号： H01L21/02 ,  H01L29/20

CPC分类号： H01L21/02104 ,  C30B25/02 ,  C30B29/403 ,  C30B29/406 ,  H01L29/2003

摘要： Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer.

摘要翻译： 本发明的实施方案包括使用卤化物气相外延（HVPE）方法形成III族氮化物半导体结构的方法。 所述方法包括在非天然生长衬底的表面上形成连续的III族氮化物成核层，所述连续III族氮化物成核层隐藏非天然生长衬底的上表面。 形成连续的III族氮化物成核层可以包括形成III族氮化物层并热处理所述III族氮化物层。 方法还可以包括在连续的III族氮化物成核层上形成另外的III族氮化物层。

公开(公告)号：US20090091002A1

公开(公告)日：2009-04-09

申请号：US12180370

申请日：2008-07-25

申请人： Chantal ARENA ,  Subhash Mahajan ,  Ranjan Datta

发明人： Chantal ARENA ,  Subhash Mahajan ,  Ranjan Datta

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： H01L21/0242 ,  H01L21/0237 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02647

摘要： This invention provides methods for fabricating substantially continuous layers of group III nitride semiconductor materials having low defect densities. The methods include epitaxial growth of nucleation layers on a base substrate, thermally treatment of said nucleation layer and epitaxial growth of a discontinuous masking layer. The methods outlined promote defect reduction through masking, annihilation and coalescence, therefore producing semiconductor structures with low defect densities. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials.

摘要翻译： 本发明提供了用于制造具有低缺陷密度的III族氮化物半导体材料的基本上连续的层的方法。 该方法包括在基底衬底上成核层的外延生长，所述成核层的热处理和不连续掩模层的外延生长。 所概述的方法通过掩蔽，湮灭和聚结来促进缺陷减少，因此产生具有低缺陷密度的半导体结构。 本发明可以应用于宽范围的半导体材料，包括元素半导体，例如Si（硅）与应变Si（sSi）和/或Ge（锗）的组合，以及化合物半导体，例如II-VI族和 III-V族化合物半导体材料。

公开(公告)号：US07732306B2

公开(公告)日：2010-06-08

申请号：US12180370

申请日：2008-07-25

申请人： Chantal Arena ,  Subhash Mahajan ,  Ranjan Datta

发明人： Chantal Arena ,  Subhash Mahajan ,  Ranjan Datta

IPC分类号： H01L21/36 ,  H01L21/20 ,  H01L21/00 ,  H01L21/331 ,  H01L21/203

CPC分类号： H01L21/0242 ,  H01L21/0237 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02647

摘要： This invention provides methods for fabricating substantially continuous layers of group III nitride semiconductor materials having low defect densities. The methods include epitaxial growth of nucleation layers on a base substrate, thermally treatment of said nucleation layer and epitaxial growth of a discontinuous masking layer. The methods outlined promote defect reduction through masking, annihilation and coalescence, therefore producing semiconductor structures with low defect densities. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials.

摘要翻译： 本发明提供了用于制造具有低缺陷密度的III族氮化物半导体材料的基本上连续的层的方法。 该方法包括在基底衬底上成核层的外延生长，所述成核层的热处理和不连续掩模层的外延生长。 所概述的方法通过掩蔽，湮灭和聚结来促进缺陷减少，因此产生具有低缺陷密度的半导体结构。 本发明可以应用于宽范围的半导体材料，包括元素半导体，例如Si（硅）与应变Si（sSi）和/或Ge（锗）的组合，以及化合物半导体，例如II-VI族和 III-V族化合物半导体材料。