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公开(公告)号：US07160775B2
公开(公告)日：2007-01-09
申请号：US10912825
申请日：2004-08-06
申请人： Erwin J. Prinz , Ramachandran Muralidhar , Rajesh A. Rao , Michael A. Sadd , Robert F. Steimle , Craig T. Swift , Bruce E. White
发明人： Erwin J. Prinz , Ramachandran Muralidhar , Rajesh A. Rao , Michael A. Sadd , Robert F. Steimle , Craig T. Swift , Bruce E. White
IPC分类号： H01L21/336
CPC分类号： B82Y10/00 , G11C16/0475 , G11C16/14 , G11C2216/06 , H01L21/28273 , H01L21/28282 , H01L29/42332
摘要： In one embodiment, a method for discharging a semiconductor device includes providing a semiconductor substrate, forming a hole blocking dielectric layer over the semiconductor substrate, forming nanoclusters over the hole blocking dielectric layer, forming a charge trapping layer over the nanoclusters, and applying an electric field to the nanoclusters to discharge the semiconductor device. Applying the electric field may occur while applying ultraviolet (UV) light. In one embodiment, the hole blocking dielectric layer comprises forming the hole blocking dielectric layer having a thickness greater than approximately 50 Angstroms.
摘要翻译： 在一个实施例中，一种用于放电半导体器件的方法包括提供半导体衬底，在半导体衬底上形成空穴阻挡电介质层，在空穴阻挡介电层上形成纳米团簇，在纳米团簇上形成电荷俘获层，并施加电 场到纳米团簇放电半导体器件。 施加紫外线（UV）光时可能会发生电场。 在一个实施例中，空穴阻挡介电层包括形成厚度大于约50埃的空穴阻挡介电层。
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公开(公告)号：US06958265B2
公开(公告)日：2005-10-25
申请号：US10663621
申请日：2003-09-16
申请人： Robert F. Steimle , Ramachandran Muralidhar , Wayne M. Paulson , Rajesh A. Rao , Bruce E. White, Jr. , Erwin J. Prinz
发明人： Robert F. Steimle , Ramachandran Muralidhar , Wayne M. Paulson , Rajesh A. Rao , Bruce E. White, Jr. , Erwin J. Prinz
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/115 , H01L29/423
CPC分类号： B82Y10/00 , H01L21/28273 , H01L27/115 , H01L29/42332
摘要： A process of forming a device with nanoclusters. The process includes forming nanoclusters (e.g. silicon nanocrystals) and forming an oxidation barrier layer over the nanoclusters to inhibit oxidizing agents from oxidizing the nanoclusters during a subsequent formation of a dielectric of the device. At least a portion of the oxidation barrier layer is removed after the formation of the dielectric. In one example, the device is a memory wherein the nanoclusters are utilized as charge storage locations for charge storage transistors of the memory. In this example, the oxidation barrier layer protects the nanoclusters from oxidizing agents due to the formation of gate dielectric for high voltage transistors of the memory.
摘要翻译： 用纳米团簇形成装置的方法。 该方法包括形成纳米团簇（例如硅纳米晶体）并在纳米簇上形成氧化阻挡层，以在随后形成器件的电介质期间抑制氧化剂氧化纳米团簇。 在形成电介质后，去除至少一部分氧化阻挡层。 在一个示例中，该器件是其中纳米团簇用作存储器的电荷存储晶体管的电荷存储位置的存储器。 在该实施例中，氧化阻挡层由于形成用于存储器的高压晶体管的栅极电介质而保护纳米团簇免受氧化剂的影响。
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公开(公告)号：US20090042349A1
公开(公告)日：2009-02-12
申请号：US12254294
申请日：2008-10-20
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L29/42328 , H01L29/42332
摘要： A split gate memory cell has a select gate, a control gate, and a charge storage structure. The select gate includes a first portion located over the control gate and a second portion not located over the control gate. In one example, the first portion of the select gate has a sidewall aligned with a sidewall of the control gate and aligned with a sidewall of the charge storage structure. In one example, the control gate has a p-type conductivity. In one example, the gate can be programmed by a hot carrier injection operation and can be erased by a tunneling operation.
摘要翻译： 分离栅极存储单元具有选择栅极，控制栅极和电荷存储结构。 选择栅极包括位于控制栅极上方的第一部分和不位于控制栅极上方的第二部分。 在一个示例中，选择栅极的第一部分具有与控制栅极的侧壁对齐并与电荷存储结构的侧壁对准的侧壁。 在一个示例中，控制栅极具有p型导电性。 在一个示例中，门可以通过热载流子注入操作来编程，并且可以通过隧道操作来擦除。
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公开(公告)号：US07732278B2
公开(公告)日：2010-06-08
申请号：US12254294
申请日：2008-10-20
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L29/42328 , H01L29/42332
摘要： A split gate memory cell has a select gate, a control gate, and a charge storage structure. The select gate includes a first portion located over the control gate and a second portion not located over the control gate. In one example, the first portion of the select gate has a sidewall aligned with a sidewall of the control gate and aligned with a sidewall of the charge storage structure. In one example, the control gate has a p-type conductivity. In one example, the gate can be programmed by a hot carrier injection operation and can be erased by a tunneling operation.
摘要翻译： 分离栅极存储单元具有选择栅极，控制栅极和电荷存储结构。 选择栅极包括位于控制栅极上方的第一部分和不位于控制栅极上方的第二部分。 在一个示例中，选择栅极的第一部分具有与控制栅极的侧壁对齐并与电荷存储结构的侧壁对准的侧壁。 在一个示例中，控制栅极具有p型导电性。 在一个示例中，门可以通过热载流子注入操作来编程，并且可以通过隧道操作来擦除。
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公开(公告)号：US07456465B2
公开(公告)日：2008-11-25
申请号：US11240240
申请日：2005-09-30
IPC分类号： H01L29/788
CPC分类号： H01L21/28273 , B82Y10/00 , H01L29/42328 , H01L29/42332
摘要： A split gate memory cell has a select gate, a control gate, and a charge storage structure. The select gate includes a first portion located over the control gate and a second portion not located over the control gate. In one example, the first portion of the select gate has a sidewall aligned with a sidewall of the control gate and aligned with a sidewall of the charge storage structure. In one example, the control gate has a p-type conductivity. In one example, the gate can be programmed by a hot carrier injection operation and can be erased by a tunneling operation.
摘要翻译： 分离栅极存储单元具有选择栅极，控制栅极和电荷存储结构。 选择栅极包括位于控制栅极上方的第一部分和不位于控制栅极上方的第二部分。 在一个示例中，选择栅极的第一部分具有与控制栅极的侧壁对齐并与电荷存储结构的侧壁对准的侧壁。 在一个示例中，控制栅极具有p型导电性。 在一个示例中，门可以通过热载流子注入操作来编程，并且可以通过隧道操作来擦除。
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公开(公告)号：US06964902B2
公开(公告)日：2005-11-15
申请号：US10787510
申请日：2004-02-26
申请人： Robert F. Steimle , Jane A. Yater , Gowrishankar L. Chindalore , Craig T. Swift , Steven G. H. Anderson , Ramachandran Muralidhar
发明人： Robert F. Steimle , Jane A. Yater , Gowrishankar L. Chindalore , Craig T. Swift , Steven G. H. Anderson , Ramachandran Muralidhar
IPC分类号： H01L21/28 , H01L21/3213 , H01L21/336 , H01L21/44 , H01L21/8247 , H01L27/105 , H01L29/792
CPC分类号： H01L21/32135 , B82Y10/00 , H01L21/28273 , H01L21/32134 , H01L27/105 , H01L27/11521 , H01L27/11526
摘要： Nanoclusters are blanket deposited on an integrated circuit and then removed from regions where the nanoclusters are not desired. A sacrificial layer is formed in those regions where the nanoclusters are not desired prior to the blanket deposition. The nanoclusters and the sacrificial layer are then removed. In one form, the sacrificial layer includes a deposited nitride containing or oxide containing layer. Alternatively, the sacrificial layer includes at least one of a pad oxide or a pad nitride layer previously used to form isolation regions in the substrate. Nanocluster devices and non-nanocluster devices may then be integrated onto the same integrated circuit. The use of a sacrificial layer protects underlying layers thereby preventing the degradation of performance of the subsequently formed non-nanocluster devices.
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7.发明授权Method for retaining nanocluster size and electrical characteristics during processing 有权在加工过程中保留纳米簇粒径和电气特性的方法公开(公告)号：US07432158B1
公开(公告)日：2008-10-07
申请号：US11459843
申请日：2006-07-25
IPC分类号： H01L21/336 , H01L21/4763 , H01L21/8238 , H01L21/36
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/1052 , H01L27/11526 , H01L27/11531 , H01L29/42332 , H01L29/7881 , Y10S977/774 , Y10S977/779 , Y10S977/78 , Y10S977/943
摘要： A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed over the semiconductor layer. A first plurality of nanoclusters is formed over the first portion and a second plurality of nanoclusters is formed over the second portion. A layer of nitrided oxide is formed around each nanocluster of the first plurality and the second plurality of nanoclusters. Remote plasma nitridation is performed on the layers of nitrided oxide of the first plurality of nanoclusters. The nanoclusters are removed from the second portion. A second dielectric layer is formed over the semiconductor layer. A conductive layer is formed over the second dielectric layer.
摘要翻译： 制造半导体器件的方法包括具有半导体层的衬底，该半导体层具有用于非易失性存储器的第一部分和不包括第一部分的第二部分。 第一介电层形成在半导体层上。 在第一部分上形成第一多个纳米团簇，并且在第二部分上形成第二多个纳米团簇。 在第一多个和第二多个纳米团簇的每个纳米簇周围形成氮化氧化物层。 在第一多个纳米团簇的氮化氧化物层上进行远程等离子体氮化。 从第二部分去除纳米团簇。 在半导体层上方形成第二电介质层。 在第二电介质层上形成导电层。
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公开(公告)号：US20080199996A1
公开(公告)日：2008-08-21
申请号：US11676403
申请日：2007-02-19
申请人： Ramachandran Muralidhar , Rajesh A. Rao , Matthew T. Herrick , Narayanan C. Ramani , Robert F. Steimle
发明人： Ramachandran Muralidhar , Rajesh A. Rao , Matthew T. Herrick , Narayanan C. Ramani , Robert F. Steimle
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/115 , H01L27/11521
摘要： A method forms a split gate memory device. A layer of select gate material over a substrate is patterned to form a first sidewall. A sacrificial spacer is formed adjacent to the first sidewall. Nanoclusters are formed over the substrate including on the sacrificial spacer. The sacrificial spacer is removed after the forming the layer of nanoclusters, wherein nanoclusters formed on the sacrificial spacer are removed and other nanoclusters remain. A layer of control gate material is formed over the substrate after the sacrificial spacer is removed. A control gate of a split gate memory device is formed from the layer of control gate material, wherein the control gate is located over remaining nanoclusters.
摘要翻译： 一种方法形成分离栅极存储器件。 将衬底上的选择栅极材料层图案化以形成第一侧壁。 邻近第一侧壁形成牺牲隔离物。 纳米团簇形成在包括在牺牲间隔物上的衬底上。 在形成纳米团簇层之后去除牺牲隔离物，其中在牺牲隔离物上形成的纳米团簇被去除并且其它纳米团簇保留。 在除去牺牲间隔物之后，在衬底上形成一层控制栅极材料。 分离栅极存储器件的控制栅极由控制栅极材料层形成，其中控制栅极位于剩余的纳米簇上。
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公开(公告)号：US20080026526A1
公开(公告)日：2008-01-31
申请号：US11459837
申请日：2006-07-25
IPC分类号： H01L21/336 , H01L21/3205
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/32134 , H01L27/11526 , H01L27/11531 , H01L27/11573 , Y10S977/774 , Y10S977/779 , Y10S977/78 , Y10S977/943
摘要： A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed on the semiconductor layer. A plasma nitridation is performed on the first dielectric layer. A first plurality of nanoclusters is formed over the first portion and a second plurality of nanoclusters over the second portion. The second plurality of nanoclusters is removed. A second dielectric layer is formed over the semiconductor layer. A conductive layer is formed over the second dielectric layer.
摘要翻译： 制造半导体器件的方法包括具有半导体层的衬底，该半导体层具有用于非易失性存储器的第一部分和不包括第一部分的第二部分。 在半导体层上形成第一电介质层。 在第一电介质层上进行等离子体氮化。 在第一部分上形成第一多个纳米团簇，并在第二部分上形成第二多个纳米团簇。 第二组纳米团簇被去除。 在半导体层上方形成第二电介质层。 在第二电介质层上形成导电层。
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公开(公告)号：US07445984B2
公开(公告)日：2008-11-04
申请号：US11459837
申请日：2006-07-25
IPC分类号： H01L21/336 , H01L21/4763 , H01L21/8238 , H01L21/36
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/32134 , H01L27/11526 , H01L27/11531 , H01L27/11573 , Y10S977/774 , Y10S977/779 , Y10S977/78 , Y10S977/943
摘要： A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed on the semiconductor layer. A plasma nitridation is performed on the first dielectric layer. A first plurality of nanoclusters is formed over the first portion and a second plurality of nanoclusters over the second portion. The second plurality of nanoclusters is removed. A second dielectric layer is formed over the semiconductor layer. A conductive layer is formed over the second dielectric layer.
摘要翻译： 制造半导体器件的方法包括具有半导体层的衬底，该半导体层具有用于非易失性存储器的第一部分和不包括第一部分的第二部分。 在半导体层上形成第一电介质层。 在第一电介质层上进行等离子体氮化。 在第一部分上形成第一多个纳米团簇，并在第二部分上形成第二多个纳米团簇。 第二组纳米团簇被去除。 在半导体层上方形成第二电介质层。 在第二电介质层上形成导电层。
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