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    Semiconductor device with nanoclusters
    2.
    发明授权
    Semiconductor device with nanoclusters 有权
    具有纳米团簇的半导体器件

    公开(公告)号：US06958265B2

    公开(公告)日：2005-10-25

    申请号：US10663621

    申请日：2003-09-16

    申请人： Robert F. Steimle ,  Ramachandran Muralidhar ,  Wayne M. Paulson ,  Rajesh A. Rao ,  Bruce E. White, Jr. ,  Erwin J. Prinz

    发明人： Robert F. Steimle ,  Ramachandran Muralidhar ,  Wayne M. Paulson ,  Rajesh A. Rao ,  Bruce E. White, Jr. ,  Erwin J. Prinz

    IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/115 ,  H01L29/423

    CPC分类号： B82Y10/00 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/42332

    摘要： A process of forming a device with nanoclusters. The process includes forming nanoclusters (e.g. silicon nanocrystals) and forming an oxidation barrier layer over the nanoclusters to inhibit oxidizing agents from oxidizing the nanoclusters during a subsequent formation of a dielectric of the device. At least a portion of the oxidation barrier layer is removed after the formation of the dielectric. In one example, the device is a memory wherein the nanoclusters are utilized as charge storage locations for charge storage transistors of the memory. In this example, the oxidation barrier layer protects the nanoclusters from oxidizing agents due to the formation of gate dielectric for high voltage transistors of the memory.

    摘要翻译： 用纳米团簇形成装置的方法。 该方法包括形成纳米团簇（例如硅纳米晶体）并在纳米簇上形成氧化阻挡层，以在随后形成器件的电介质期间抑制氧化剂氧化纳米团簇。 在形成电介质后，去除至少一部分氧化阻挡层。 在一个示例中，该器件是其中纳米团簇用作存储器的电荷存储晶体管的电荷存储位置的存储器。 在该实施例中，氧化阻挡层由于形成用于存储器的高压晶体管的栅极电介质而保护纳米团簇免受氧化剂的影响。

    Nanocrystal non-volatile memory cell and method therefor
    3.
    发明授权
    Nanocrystal non-volatile memory cell and method therefor 有权
    纳米晶体非挥发性记忆体及其方法

    公开(公告)号：US07800164B2

    公开(公告)日：2010-09-21

    申请号：US12397849

    申请日：2009-03-04

    申请人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    发明人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    IPC分类号： H01L29/792

    CPC分类号： H01L29/42332 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/513 ,  H01L29/7881 ,  Y10S977/773

    摘要： A method of forming a semiconductor device includes forming a first dielectric layer over a semiconductor substrate, forming a plurality of discrete storage elements over the first dielectric layer, thermally oxidizing the plurality of discrete storage elements to form a second dielectrics over the plurality of discrete storage elements, and forming a gate electrode over the second dielectric layer, wherein a significant portion of the gate electrode is between pairs of the plurality of discrete storage elements. In one embodiment, portions of the gate electrode is in the spaces between the discrete storage elements and extends to more than half of the depth of the spaces.

    摘要翻译： 一种形成半导体器件的方法包括在半导体衬底上形成第一电介质层，在第一介电层上形成多个离散存储元件，热氧化多个离散的存储元件，以在多个离散存储器上形成第二电介质 元件，并且在所述第二介电层上形成栅电极，其中所述栅电极的重要部分位于所述多个离散存储元件的对之间。 在一个实施例中，栅电极的部分位于离散存储元件之间的空间中并且延伸到空间深度的一半以上。

    Nanocrystal non-volatile memory cell and method therefor
    4.
    发明申请
    Nanocrystal non-volatile memory cell and method therefor 有权
    纳米晶体非挥发性记忆体及其方法

    公开(公告)号：US20080121966A1

    公开(公告)日：2008-05-29

    申请号：US11530053

    申请日：2006-09-08

    申请人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    发明人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    IPC分类号： H01L29/78 ,  H01L21/3205

    CPC分类号： H01L29/42332 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/513 ,  H01L29/7881 ,  Y10S977/773

    摘要： A method of forming a semiconductor device includes forming a first dielectric layer over a semiconductor substrate, forming a plurality of discrete storage elements over the first dielectric layer, thermally oxidizing the plurality of discrete storage elements to form a second dielectrics over the plurality of discrete storage elements, and forming a gate electrode over the second dielectric layer, wherein a significant portion of the gate electrode is between pairs of the plurality of discrete storage elements. In one embodiment, portions of the gate electrode is in the spaces between the discrete storage elements and extends to more than half of the depth of the spaces.

    摘要翻译： 一种形成半导体器件的方法包括在半导体衬底上形成第一电介质层，在第一介电层上形成多个离散存储元件，热氧化多个离散的存储元件，以在多个离散存储器上形成第二电介质 元件，并且在所述第二介电层上形成栅电极，其中所述栅电极的重要部分位于所述多个离散存储元件的对之间。 在一个实施例中，栅电极的部分位于离散存储元件之间的空间中并且延伸到空间深度的一半以上。

    Nanocrystal non-volatile memory cell and method therefor
    5.
    发明授权
    Nanocrystal non-volatile memory cell and method therefor 有权
    纳米晶体非挥发性记忆体及其方法

    公开(公告)号：US07517747B2

    公开(公告)日：2009-04-14

    申请号：US11530053

    申请日：2006-09-08

    申请人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    发明人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    IPC分类号： H01L21/8238

    CPC分类号： H01L29/42332 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/513 ,  H01L29/7881 ,  Y10S977/773

    摘要： A method of forming a semiconductor device includes forming a first dielectric layer over a semiconductor substrate, forming a plurality of discrete storage elements over the first dielectric layer, thermally oxidizing the plurality of discrete storage elements to form a second dielectrics over the plurality of discrete storage elements, and forming a gate electrode over the second dielectric layer, wherein a significant portion of the gate electrode is between pairs of the plurality of discrete storage elements. In one embodiment, portions of the gate electrode is in the spaces between the discrete storage elements and extends to more than half of the depth of the spaces.

    摘要翻译： 一种形成半导体器件的方法包括在半导体衬底上形成第一电介质层，在第一介电层上形成多个离散存储元件，热氧化多个离散的存储元件，以在多个离散存储器上形成第二电介质 元件，并且在所述第二介电层上形成栅电极，其中所述栅电极的重要部分位于所述多个离散存储元件的对之间。 在一个实施例中，栅电极的部分位于离散存储元件之间的空间中并且延伸到空间深度的一半以上。

    NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
    6.
    发明申请
    NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR 审中-公开
    NANOCRYSTAL非易失性记忆细胞及其方法

    公开(公告)号：US20080121967A1

    公开(公告)日：2008-05-29

    申请号：US11530054

    申请日：2006-09-08

    申请人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    发明人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    IPC分类号： H01L29/78 ,  H01L21/3205

    CPC分类号： H01L29/42332 ,  B82Y10/00 ,  H01L29/40114 ,  H01L29/513 ,  H01L29/7881

    摘要： A method of forming a semiconductor device, which is preferably a memory cell, includes forming a first dielectric layer over a semiconductor substrate, forming a plurality of discrete storage elements over the first dielectric layer, wherein each of the plurality of discrete storage elements has a diameter value that is approximately equal to each other, and forming a second dielectric layer over the plurality of discrete storage elements, wherein the second dielectric layer has a thickness, wherein the ratio of the thickness of the second dielectric to the diameter value is less than approximately 0.8. The spacing between the plurality of discrete storage elements may be greater than or equal to approximately the thickness of the second dielectric layer.

    摘要翻译： 形成半导体器件的方法，其优选地是存储单元，包括在半导体衬底上形成第一介电层，在第一介电层上形成多个离散存储元件，其中多个离散存储元件中的每一个具有 并且在所述多个分立存储元件上形成第二电介质层，其中所述第二电介质层具有厚度，其中所述第二电介质的厚度与所述直径值的比值小于 约0.8。 多个离散存储元件之间的间隔可以大于或等于第二电介质层的厚度。

    NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
    7.
    发明申请
    NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR 有权
    NANOCRYSTAL非易失性记忆细胞及其方法

    公开(公告)号：US20090166712A1

    公开(公告)日：2009-07-02

    申请号：US12397849

    申请日：2009-03-04

    申请人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    发明人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Michael A. Sadd ,  Bruce E. White

    IPC分类号： H01L29/78

    CPC分类号： H01L29/42332 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/513 ,  H01L29/7881 ,  Y10S977/773

    摘要： A method of forming a semiconductor device includes forming a first dielectric layer over a semiconductor substrate, forming a plurality of discrete storage elements over the first dielectric layer, thermally oxidizing the plurality of discrete storage elements to form a second dielectrics over the plurality of discrete storage elements, and forming a gate electrode over the second dielectric layer, wherein a significant portion of the gate electrode is between pairs of the plurality of discrete storage elements. In one embodiment, portions of the gate electrode is in the spaces between the discrete storage elements and extends to more than half of the depth of the spaces.

    摘要翻译： 一种形成半导体器件的方法包括在半导体衬底上形成第一电介质层，在第一介电层上形成多个离散存储元件，热氧化多个离散的存储元件，以在多个离散存储器上形成第二电介质 元件，并且在所述第二介电层上形成栅电极，其中所述栅电极的重要部分位于所述多个离散存储元件的对之间。 在一个实施例中，栅电极的部分位于离散存储元件之间的空间中并且延伸到空间深度的一半以上。

    METHOD FOR FORMING A SPLIT GATE MEMORY DEVICE
    9.
    发明申请
    METHOD FOR FORMING A SPLIT GATE MEMORY DEVICE 有权
    形成分离栅存储器件的方法

    公开(公告)号：US20080199996A1

    公开(公告)日：2008-08-21

    申请号：US11676403

    申请日：2007-02-19

    申请人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Matthew T. Herrick ,  Narayanan C. Ramani ,  Robert F. Steimle

    发明人： Ramachandran Muralidhar ,  Rajesh A. Rao ,  Matthew T. Herrick ,  Narayanan C. Ramani ,  Robert F. Steimle

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28273 ,  B82Y10/00 ,  H01L27/115 ,  H01L27/11521

    摘要： A method forms a split gate memory device. A layer of select gate material over a substrate is patterned to form a first sidewall. A sacrificial spacer is formed adjacent to the first sidewall. Nanoclusters are formed over the substrate including on the sacrificial spacer. The sacrificial spacer is removed after the forming the layer of nanoclusters, wherein nanoclusters formed on the sacrificial spacer are removed and other nanoclusters remain. A layer of control gate material is formed over the substrate after the sacrificial spacer is removed. A control gate of a split gate memory device is formed from the layer of control gate material, wherein the control gate is located over remaining nanoclusters.

    摘要翻译： 一种方法形成分离栅极存储器件。 将衬底上的选择栅极材料层图案化以形成第一侧壁。 邻近第一侧壁形成牺牲隔离物。 纳米团簇形成在包括在牺牲间隔物上的衬底上。 在形成纳米团簇层之后去除牺牲隔离物，其中在牺牲隔离物上形成的纳米团簇被去除并且其它纳米团簇保留。 在除去牺牲间隔物之后，在衬底上形成一层控制栅极材料。 分离栅极存储器件的控制栅极由控制栅极材料层形成，其中控制栅极位于剩余的纳米簇上。