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    SEMICONDUCTOR PACKAGE HAVING TEST PADS ON TOP AND BOTTOM SUBSTRATE SURFACES AND METHOD OF TESTING SAME
    1.
    发明申请
    SEMICONDUCTOR PACKAGE HAVING TEST PADS ON TOP AND BOTTOM SUBSTRATE SURFACES AND METHOD OF TESTING SAME 有权
    具有顶部和底部底板表面上的测试垫的半导体封装及其测试方法

    公开(公告)号：US20120105089A1

    公开(公告)日：2012-05-03

    申请号：US13348767

    申请日：2012-01-12

    申请人： Eun-seok SONG ,  Dong-han KIM ,  Hee-seok LEE

    发明人： Eun-seok SONG ,  Dong-han KIM ,  Hee-seok LEE

    IPC分类号： G01R1/067 ,  G01R31/26

    CPC分类号： G01R31/2884 ,  H01L22/32 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

    摘要： A semiconductor package and testing method is disclosed. The package includes a substrate having top and bottom surfaces, a semiconductor chip mounted in a centrally located semiconductor chip mounting area of the substrate, and a plurality of test pads disposed on top and bottom surfaces of the substrate and comprising a first group of test pads configured on the top and bottom surfaces of the substrate and having a first height above the respective top and bottom surface of the substrate, and a second group of test pads disposed on the lower surface of the substrate and having a second height greater than the first, wherein each one of the second group of test pads includes a solder ball attached thereto.

    摘要翻译： 公开了半导体封装和测试方法。 封装包括具有顶表面和底表面的衬底，安装在衬底的位于中心的半导体芯片安装区域中的半导体芯片以及设置在衬底的顶表面和底表面上的多个测试焊盘，并且包括第一组测试焊盘 配置在衬底的顶表面和底表面上并且具有在衬底的相应顶部和底部表面上方的第一高度，以及设置在衬底的下表面上并具有大于第一衬底的第二高度的第二组测试焊盘 其中第二组测试垫中的每一个包括附接到其上的焊球。

    SEMICONDUCTOR PACKAGE HAVING TEST PADS ON TOP AND BOTTOM SUBSTRATE SURFACES AND METHOD OF TESTING SAME
    2.
    发明申请
    SEMICONDUCTOR PACKAGE HAVING TEST PADS ON TOP AND BOTTOM SUBSTRATE SURFACES AND METHOD OF TESTING SAME 有权
    具有顶部和底部底板表面上的测试垫的半导体封装及其测试方法

    公开(公告)号：US20080054261A1

    公开(公告)日：2008-03-06

    申请号：US11758176

    申请日：2007-06-05

    申请人： Eun-seok SONG ,  Dong-han KIM ,  Hee-seok LEE

    发明人： Eun-seok SONG ,  Dong-han KIM ,  Hee-seok LEE

    IPC分类号： H01L23/58 ,  G01R31/26

    CPC分类号： G01R31/2884 ,  H01L22/32 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

    摘要： A semiconductor package and testing method is disclosed. The package includes a substrate having top and bottom surfaces, a semiconductor chip mounted in a centrally located semiconductor chip mounting area of the substrate, and a plurality of test pads disposed on top and bottom surfaces of the substrate and comprising a first group of test pads configured on the top and bottom surfaces of the substrate and having a first height above the respective top and bottom surface of the substrate, and a second group of test pads disposed on the lower surface of the substrate and having a second height greater than the first, wherein each one of the second group of test pads includes a solder ball attached thereto.

    摘要翻译： 公开了半导体封装和测试方法。 封装包括具有顶表面和底表面的衬底，安装在衬底的位于中心的半导体芯片安装区域中的半导体芯片以及设置在衬底的顶表面和底表面上的多个测试焊盘，并且包括第一组测试焊盘 配置在衬底的顶表面和底表面上并且具有在衬底的相应顶部和底部表面上方的第一高度，以及设置在衬底的下表面上并具有大于第一衬底的第二高度的第二组测试焊盘 其中第二组测试垫中的每一个包括附接到其上的焊球。

    SUBSTRATE FOR SEMICONDUCTOR PACKAGE
    3.
    发明申请
    SUBSTRATE FOR SEMICONDUCTOR PACKAGE 有权
    半导体封装基板

    公开(公告)号：US20100264524A1

    公开(公告)日：2010-10-21

    申请号：US12824415

    申请日：2010-06-28

    申请人： Eun-seok SONG ,  Hee-seok LEE ,  So-young LIM

    发明人： Eun-seok SONG ,  Hee-seok LEE ,  So-young LIM

    IPC分类号： H01L23/556 ,  H01L23/48 ,  H01L23/538

    CPC分类号： H01Q15/006

    摘要： A substrate for a semiconductor package includes a dielectric substrate, a circuit pattern formed on a first surface of the dielectric substrate, and an electromagnetic band gap (EGB) pattern. The EGB pattern includes multiple unit structures formed on a second surface of the dielectric substrate, where each unit structure includes a flat conductor electrically connected to the circuit pattern through a ground connection, and multiple spiral-patterned conductors electrically connected to the flat conductor. The second surface is formed on an opposite side of the dielectric substrate from the first surface. Each flat conductor is electrically connected to a flat conductor of another one of the unit structures. At least one of the spiral-patterned conductors in each one of the unit structures is electrically connected to another one of the spiral-patterned conductors.

    摘要翻译： 用于半导体封装的衬底包括电介质衬底，形成在电介质衬底的第一表面上的电路图案和电磁带隙（EGB）图案。 EGB图案包括形成在电介质基板的第二表面上的多个单元结构，其中每个单元结构包括通过接地连接电连接到电路图案的扁平导体，以及电连接到扁平导体的多个螺旋图案导体。 第二表面形成在电介质基板的与第一表面相反的一侧上。 每个扁平导体电连接到另一个单元结构的扁平导体。 每个单元结构中的至少一个螺旋图案导体电连接到另一个螺旋图案导体。

    SUBSTRATE FOR SEMICONDUCTOR PACKAGE
    5.
    发明申请
    SUBSTRATE FOR SEMICONDUCTOR PACKAGE 失效
    半导体封装基板

    公开(公告)号：US20070285188A1

    公开(公告)日：2007-12-13

    申请号：US11761416

    申请日：2007-06-12

    申请人： Eun-seok SONG ,  Hee-seok LEE ,  So-young LIM

    发明人： Eun-seok SONG ,  Hee-seok LEE ,  So-young LIM

    IPC分类号： H04B3/28

    CPC分类号： H01Q15/006

    摘要： A substrate for a semiconductor package comprises a dielectric substrate, a circuit pattern, and an electromagnetic band gap (EBG) pattern. The circuit pattern is formed on a first surface of the dielectric substrate and is connected to ground via a ground connection. The electromagnetic band gap (EBG) pattern comprises a plurality of zigzag unit structures formed on a second surface of the dielectric substrate, wherein the second surface is formed on an opposite side of the dielectric substrate from the first surface; the zigzag unit structures are electrically connected to each other; and at least one of the zigzag unit structures is electrically connected to the ground connection.

    摘要翻译： 用于半导体封装的衬底包括电介质衬底，电路图案和电磁带隙（EBG）图案。 电路图案形成在电介质基板的第一表面上，并通过接地连接接地。 电磁带隙（EBG）图案包括形成在电介质基板的第二表面上的多个之字形单元结构，其中第二表面形成在电介质基板的与第一表面相反的一侧上; 之字形单元结构彼此电连接; 并且所述之字形单元结构中的至少一个电连接到所述接地连接。