公开(公告)号：US06310879B2

公开(公告)日：2001-10-30

申请号：US08851881

申请日：1997-05-06

申请人： Fan Zhou ,  Jon C. R. Bennett

发明人： Fan Zhou ,  Jon C. R. Bennett

IPC分类号： H04L1256

CPC分类号： H04Q11/0478 ,  H04L49/203

摘要： The present invention pertains to a multicast system. The system comprises an ATM network. The system comprises a source connected to the ATM network. The system also comprises a first destination connected to the ATM network. The system comprises at least a second destination connected to the ATM network. Additionally, the system comprises a mechanism for adding or dropping connections dynamically between the first source and any destinations at any time. The present invention pertains to a method for multicasting ATM cells. The method comprises the steps of forming a first connection between a first source and a first destination for transmitting a first ATM cell therebetween. Next, there is be step of forming a second connection between the first source and a second destination while the first connection exists. Then there is the step of terminating the first connection while the second connection exists. The present invention pertains to a method for multicasting ATM cells. The method comprises the steps of forming a first connection between a first source and a first destination. Next there is the step of obtaining a first ATM cell to the transmitted out the first source. Next there is the step of forming a second connection between a first source and a second destination while the first connection exists and after the first ATM cell has been obtained.

摘要翻译： 本发明涉及多播系统。 该系统包括ATM网络。 该系统包括连接到ATM网络的源。 该系统还包括连接到ATM网络的第一目的地。 该系统至少包括连接到ATM网络的第二目的地。 此外，该系统包括用于在任何时间在第一源和任何目的地之间动态添加或删除连接的机制。 本发明涉及一种组播ATM信元的方法。 该方法包括以下步骤：在第一源和第一目的地之间形成第一连接，用于在其间发送第一ATM信元。 接下来，存在在第一连接存在的同时在第一源和第二目的地之间形成第二连接的步骤。 然后有第二个连接存在时终止第一个连接的步骤。 本发明涉及一种组播ATM信元的方法。 该方法包括在第一源和第一目的地之间形成第一连接的步骤。 接下来，存在获得第一ATM信元以发送出第一源的步骤。 接下来，存在在第一连接存在并且在获得第一ATM信元之后在第一源和第二目的地之间形成第二连接的步骤。

公开(公告)号：US5974053A

公开(公告)日：1999-10-26

申请号：US621809

申请日：1996-03-22

申请人： Jon C. R. Bennett ,  Fan Zhou

发明人： Jon C. R. Bennett ,  Fan Zhou

IPC分类号： H04L12/56 ,  H04J3/16

CPC分类号： H04L12/5602 ,  H04L2012/5649 ,  H04L2012/5679

摘要： The present invention pertains to an apparatus for providing service to entities. The apparatus comprises a server for providing the service. The apparatus also comprises a plurality of entities which require the service of the server. The entities are connected with the server. Additionally, the apparatus comprises a scheduler for scheduling when each of the entities receives the service of the server. The scheduler is connected with the server and the entities. There is a time stamp mechanism for providing a longer-format time stamp to a requesting entity of the plurality of entities whenever the requesting entity requests service from the server. The time stamp mechanism is connected to the scheduler and the server. Moreover, the apparatus comprises means for compressing the longer-format time stamp into a corresponding shorter-format window-based time stamp and storing the shorter-format window based time stamp. The scheduler schedules service by the server of the requesting entity based on the shorter-format window-based time stamp stored in the memory. The present invention pertains to a method for providing service to entities. An apparatus for manipulating a time stamp. A method for manipulating a time stamp.

摘要翻译： 本发明涉及一种向实体提供服务的装置。 该装置包括用于提供服务的服务器。 该装置还包括需要服务器服务的多个实体。 实体与服务器连接。 另外，该装置包括调度器，用于在每个实体接收服务器的服务时进行调度。 调度器与服务器和实体连接。 每当请求实体从服务器请求服务时，存在用于向多个实体的请求实体提供更长格式的时间戳的时间戳机制。 时间戳机制连接到调度器和服务器。 此外，该装置包括用于将较长格式的时间戳压缩成相应的较短格式的基于窗口的时间标记并存储基于较短格式窗​​口的时间戳的装置。 调度器基于存储在存储器中的较短格式的基于窗口的时间标记来对请求实体的服务器进行服务。 本发明涉及向实体提供服务的方法。 用于操纵时间戳的装置。 一种操纵时间戳的方法。

公开(公告)号：US08726064B2

公开(公告)日：2014-05-13

申请号：US11405083

申请日：2006-04-17

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F13/00 ,  G06F11/00

CPC分类号： G06F13/4027 ,  G06F13/1684 ,  G06F13/4243 ,  G06F13/4247 ,  Y02D10/14 ,  Y02D10/151

摘要： An interconnection system, apparatus and method is described for arranging elements in a network, which may be a data memory system, computing system or communications system where the data paths are arranged and operated so as to control the power consumption and data skew properties of the system. A configurable switching element may be used to form the interconnections at nodes, where a control signal and other information is used to manage the power status of other aspects of the configurable switching element. Time delay skew of data being transmitted between nodes of the network may be altered by exchanging the logical and physical line assignments of the data at one or more nodes of the network. A method of laying out an interconnecting motherboard is disclosed which reduces the complexity of the trace routing.

摘要翻译： 描述了用于在网络中布置元件的互连系统，装置和方法，网络中的元件可以是数据存储器系统，计算系统或通信系统，其中数据路径被布置和操作，以便控制数据路径的功耗和数据偏移特性 系统。 可以使用可配置的开关元件在节点处形成互连，其中使用控制信号和其他信息来管理可配置开关元件的其他方面的电力状态。 可以通过在网络的一个或多个节点处交换数据的逻辑和物理线路分配来改变在网络节点之间传输的数据的时间延迟偏差。 公开了布置互连主板的方法，其降低了跟踪路由的复杂性。

公开(公告)号：US08200887B2

公开(公告)日：2012-06-12

申请号：US12079364

申请日：2008-03-26

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F12/00

CPC分类号： G06F3/065 ,  G06F3/0608 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0688 ,  G06F3/0689 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1072 ,  G06F11/1076 ,  G06F11/108 ,  G06F12/0246 ,  G06F12/0866 ,  G11B20/1833 ,  G11B2220/60 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C29/28 ,  G11C29/52

摘要： A memory system and method of operating the same is described, where the memory system is used to store data in a RAIDed manner. The stored data may be retrieved, including the parity data so that the stored data is recovered when the first of either the stored data without the parity data, or the stored data from all but one memory module and the parity data, has been received. The writing of data, for low write data loads, is managed such that only one of the memory modules of a RAID stripe is being written to, or erased, during a time interval.

摘要翻译： 描述了一种存储系统及其操作方法，其中存储器系统用于以RAIDed方式存储数据。 可以检索存储的数据，包括奇偶校验数据，使得当已经接收到没有奇偶校验数据的所存储的数据中的第一个或来自除了一个存储器模块和奇偶校验数据的所有存储的数据之前，存储的数据被恢复。 管理低写入数据加载的数据写入，使得在一段时间间隔内只有一个RAID条带的存储器模块被写入或擦除。

公开(公告)号：US08090973B2

公开(公告)日：2012-01-03

申请号：US12946164

申请日：2010-11-15

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F1/04

CPC分类号： G11C5/06 ,  G06F13/4243 ,  H03K19/17736 ,  H03K19/17764

摘要： An interconnection system is described where data lanes may be exchanged between lines at intervals along a transmission path so that the differential time delay between bits on a plurality of the lines is reduced when determined at a receiving location. The data lanes may be bound to the lines through the operation of a configurable switch, or by a configurable switch in conjunction with predetermined manufactured connections, or a combination of the techniques. The wiring of a connectorized node module, which may include a memory device, may be configured so that the differential time delay between pairs of input lines of a node, as measured at the output of a node, is reduced.

摘要翻译： 描述了一种互连系统，其中数据通道可以沿着传输路径间隔地在线之间交换，使得当在接收位置确定时，多条线路上的位之间的差分时间延迟减小。 数据通道可以通过可配置开关的操作或可配置开关结合预定的制造连接或这些技术的组合而被绑定到线路上。 可以配置可以包括存储器设备的连接器化节点模块的布线，使得在节点的输出处测量的节点对的输入线对之间的差分时间延迟减小。

公开(公告)号：US5845115A

公开(公告)日：1998-12-01

申请号：US375624

申请日：1995-01-20

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F1/00 ,  G06F9/46 ,  G06F9/50 ,  G06F13/00 ,  G06F15/00 ,  G06Q10/06 ,  H04L29/06 ,  G06F9/00

CPC分类号： G06F9/5027 ,  G06F9/4881 ,  G06F9/5038 ,  G06Q10/06 ,  H04L29/06 ,  G06F2209/506 ,  H04L67/42

摘要： A method for scheduling when a server provides service to entities. The method includes the steps of identifying when a first entity requests service from the server. Next there is the step of providing service to an entity, such as a first entity or a second entity, as a function of virtual time. A scheduler for controlling when a server provides service to entities. The scheduler comprises a memory having times which are a function of when entities request service from the server. The scheduler is also comprised of a virtual clock that keeps track of time. The scheduler is also comprised of a controller which causes an entity to receive service from the server as a function of virtual time. Rate can also be utilized.

摘要翻译： 一种用于在服务器向实体提供服务时进行调度的方法。 该方法包括以下步骤：识别第一实体何时从服务器请求服务。 接下来，作为虚拟时间的函数，向诸如第一实体或第二实体的实体提供服务的步骤。 用于控制服务器何时向实体提供服务的调度器。 调度器包括具有时间的存储器，其是实体从服务器请求服务的功能。 调度器还包括跟踪时间的虚拟时钟。 调度器还包括控制器，其使得实体作为虚拟时间的函数从服务器接收服务。 费率也可以利用。

公开(公告)号：US5828878A

公开(公告)日：1998-10-27

申请号：US476365

申请日：1995-06-07

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F1/00 ,  G06F9/46 ,  G06F9/48 ,  G06F9/50 ,  G06F13/00 ,  G06F15/00 ,  H04L29/06 ,  G06F9/00

CPC分类号： H04L29/06 ,  G06F9/4881 ,  G06F9/5027 ,  H04L67/42

摘要： A scheduler for controlling when N entities, where N is an integer greater than or equal to one, are operated upon by a server. The scheduler includes a starting time memory. The starting time memory has only arriving times which are greater than virtual time. The scheduler also includes a finishing time memory. The finishing time memory has finishing times of the N entities whose starting times are less than or equal to virtual time. Additionally, the scheduler includes a virtual clock that keeps track of virtual time so the arriving times and finishing times can be identified. Moreover, the scheduler is also comprised of a controller for choosing entities to be operated upon by the server from the finishing time memory. A method of scheduling when a server provides service to entities.

摘要翻译： 用于控制N个实体（其中N是大于或等于1的整数）的调度器由服务器进行操作。 调度器包括启动时间存储器。 起始时间存储器只有到达时间大于虚拟时间。 调度器还包括完成时间存储器。 完成时间存储器具有起始时间小于或等于虚拟时间的N个实体的完成时间。 此外，调度器包括跟踪虚拟时间的虚拟时钟，从而可以识别到达时间和完成时间。 此外，调度器还包括用于从完成时间存储器中选择要由服务器操作的实体的控制器。 一种在服务器向实体提供服务时进行调度的方法。

公开(公告)号：US09465756B2

公开(公告)日：2016-10-11

申请号：US12976735

申请日：2010-12-22

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F13/00 ,  G06F13/14 ,  G06F13/36 ,  G06F13/16 ,  G11C19/00 ,  H03K19/17

CPC分类号： G06F13/1684 ,  G06F13/14 ,  G06F13/36 ,  G11C19/00 ,  H03K19/17 ,  Y02D10/14

摘要： An interconnection system, apparatus and method is described where the motherboard may be populated with less than all of the modules that it has been designed to accept while maintaining a configuration such that in the event of a module failure, a memory controller failure, or a combination thereof, the connectivity of the remaining modules is maintained. Where data is stored using a RAID organization of the memory on the modules, the data may be reconstructed to a spare module. The system also provides for the orderly incremental expansion of the memory by adding additional memory modules and memory controllers, while maintaining the connectivity properties.

摘要翻译： 描述了一种互连系统，装置和方法，其中母板可以被填充少于其被设计为接受的所有模块，同时保持配置，使得在模块故障的情况下，存储器控制器故障或者 其组合，保持其余模块的连接性。 在使用模块上的存储器的RAID组织存储数据的情况下，可以将数据重建为备用模块。 该系统还通过添加额外的内存模块和内存控制器，同时保持连接属性，为内存的有序增量扩展。

公开(公告)号：US09311182B2

公开(公告)日：2016-04-12

申请号：US13442284

申请日：2012-04-09

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： G06F12/00 ,  G06F11/10 ,  G11B20/18 ,  G06F3/06 ,  G11C29/28 ,  G11C29/52 ,  G06F12/02 ,  G06F12/08

CPC分类号： G06F3/065 ,  G06F3/0608 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0688 ,  G06F3/0689 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1072 ,  G06F11/1076 ,  G06F11/108 ,  G06F12/0246 ,  G06F12/0866 ,  G11B20/1833 ,  G11B2220/60 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C29/28 ,  G11C29/52

摘要： A memory system and method of operating the same is described, where the memory system is used to store data in a RAIDed manner. The stored data may be retrieved, including the parity data so that the stored data is recovered when the first of either the stored data without the parity data, or the stored data from all but one memory module and the parity data, has been received. The writing of data, for low write data loads, is managed such that only one of the memory modules of a RAID stripe is being written to, or erased, during a time interval.

公开(公告)号：US08832524B2

公开(公告)日：2014-09-09

申请号：US13624282

申请日：2012-09-21

申请人： Jon C. R. Bennett

发明人： Jon C. R. Bennett

IPC分类号： H03M13/00 ,  H03M13/29 ,  G06F11/10 ,  H03M13/15 ,  H03M13/11

CPC分类号： G06F11/1076 ,  G06F11/1012 ,  G06F11/1072 ,  G06F2211/104 ,  G06F2211/109 ,  H03M13/1102 ,  H03M13/152 ,  H03M13/2906 ,  H03M13/2942

摘要： Storage of digital data in non-volatile media such as NAND FLASH needs to take account of the errors in data retrieved from the memory. The error rate tends to increase with the number of write/erase cycles of a cell of memory and with the time that the data has been stored. To achieve a very low uncorrected bit error rate (UBER) a substantial amount of redundancy data needs to be stored for error correction purposes. A method and apparatus is disclosed where a first redundancy data is represented by a second redundancy data computed from the first redundancy data. The first redundancy data may not be stored and is reconstructed from the stored data using a same generation procedure as previously used. The reconstructed estimate of the first redundancy data is corrected by the second redundancy data, and is used to correct the underlying data.

摘要翻译： 在非易失性介质（如NAND FLASH）中存储数字数据需要考虑从存储器检索的数据中的错误。 误码率随着存储器单元的写入/擦除周期数和数据已被存储的时间而增加。 为了实现非常低的未校正误码率（UBER），需要存储大量的冗余数据用于纠错目的。 公开了一种方法和装置，其中第一冗余数据由从第一冗余数据计算的第二冗余数据表示。 第一冗余数据可能不被存储并且使用与之前使用的相同的生成过程从存储的数据中重构。 通过第二冗余数据校正第一冗余数据的重建估计，并且用于校正底层数据。