公开(公告)号：US08173517B2

公开(公告)日：2012-05-08

申请号：US12828868

申请日：2010-07-01

申请人： Fernando Gonzalez ,  David L. Chapek ,  Randhir P. S. Thakur

发明人： Fernando Gonzalez ,  David L. Chapek ,  Randhir P. S. Thakur

IPC分类号： H01L21/764 ,  H01L29/00

CPC分类号： H01L21/76237

摘要： The present invention relates to methods for forming microelectronic structures in a semiconductor substrate. The method includes selectively removing dielectric material to expose a portion of an oxide overlying a semiconductor substrate. Insulating material may be formed substantially conformably over the oxide and remaining portions of the dielectric material. Spacers may be formed from the insulating material. An isolation trench etch follows the spacer etch. An optional thermal oxidation of the surfaces in the isolation trench may be performed, which may optionally be followed by doping of the bottom of the isolation trench to further isolate neighboring active regions on either side of the isolation trench. A conformal material may be formed substantially conformably over the spacer, over the remaining portions of the dielectric material, and substantially filling the isolation trench. Planarization of the conformal material may follow.

摘要翻译： 本发明涉及在半导体衬底中形成微电子结构的方法。 该方法包括选择性地去除介电材料以暴露覆盖半导体衬底的氧化物的一部分。 绝缘材料可以基本上顺应地形成在电介质材料的氧化物和剩余部分上。 间隔物可以由绝缘材料形成。 隔离沟蚀刻遵循间隔物蚀刻。 可以执行隔离沟槽中的表面的可选热氧化，其可以任选地随后掺杂隔离沟槽的底部以进一步隔离隔离沟槽的任一侧上的相邻有源区。 可以在绝缘材料的剩余部分上基本上顺应地在间隔物上形成共形材料，并且基本上填充隔离沟槽。 保形材料的平面化可能遵循。

公开(公告)号：US06271152B1

公开(公告)日：2001-08-07

申请号：US09571788

申请日：2000-05-16

申请人： Randhir P. S. Thakur ,  David L. Chapek

发明人： Randhir P. S. Thakur ,  David L. Chapek

IPC分类号： H01L2131

CPC分类号： H01L21/02255 ,  H01L21/02238 ,  H01L21/31662 ,  H01L21/76202

摘要： Field oxide is formed using high pressure. Oxidation of field regions between active regions is accomplished in a two-step process. A first oxide layer is formed in the field region. Then, a second oxide layer is formed on the first oxide layer. The second oxide layer is formed at a pressure of at least approximately 5 atmospheres. In one embodiment, the first oxide layer is formed at atmospheric pressure using a conventional oxidation technique, such as rapid thermal oxidation (RTO), wet oxidation, or dry oxidation. In another embodiment, the first oxide layer is formed, at a pressure of approximately 1 to 5 atmospheres. Wet or dry oxidation is used for the oxidizing ambient. The first oxide layer is formed to a thickness of approximately 500 angstroms or less, and typically greater than 200 angstroms. Temperatures of approximately 600 to 1,100 degrees Celsius are used for the oxidation steps.

摘要翻译： 使用高压形成场氧化物。 活性区域之间的场区氧化是以两步法进行的。 在场区域中形成第一氧化物层。 然后，在第一氧化物层上形成第二氧化物层。 第二氧化物层在至少约5个大气压的压力下形成。 在一个实施方案中，使用常规氧化技术，例如快速热氧化（RTO），湿氧化或干燥氧化，在大气压下形成第一氧化物层。 在另一个实施方案中，在约1至5个大气压的压力下形成第一氧化物层。 湿氧或干氧化用于氧化环境。 第一氧化物层形成为约500埃或更小，通常大于200埃的厚度。 氧化步骤使用约600至1100摄氏度的温度。

公开(公告)号：US6066576A

公开(公告)日：2000-05-23

申请号：US868562

申请日：1997-06-04

申请人： Randhir P. S. Thakur ,  David L. Chapek

发明人： Randhir P. S. Thakur ,  David L. Chapek

IPC分类号： H01L21/316 ,  H01L21/762 ,  H01L21/31

CPC分类号： H01L21/02255 ,  H01L21/02238 ,  H01L21/31662 ,  H01L21/76202

摘要： Field oxide is formed using high pressure. Oxidation of field regions between active regions is accomplished in a two-step process. A first oxide layer is formed in the field region. Then, a second oxide layer is formed on the first oxide layer. The second oxide layer is formed at a pressure of at least approximately 5 atmospheres. In one embodiment, the first oxide layer is formed at atmospheric pressure using a conventional oxidation technique, such as rapid thermal oxidation (RTO), wet oxidation, or dry oxidation. In another embodiment, the first oxide layer is formed at near atmospheric pressure, at a pressure of approximately 1 to 5 atmospheres. Wet or dry oxidation is used for the oxidizing ambient. The first oxide layer is formed to a thickness of approximately 500 angstroms or less, and typically greater than 200 angstroms. Temperatures of approximately 600 to 1,100 degrees Celsius are used for the oxidation steps.

摘要翻译： 使用高压形成场氧化物。 活性区域之间的场区氧化是以两步法进行的。 在场区域中形成第一氧化物层。 然后，在第一氧化物层上形成第二氧化物层。 第二氧化物层在至少约5个大气压的压力下形成。 在一个实施方案中，使用常规氧化技术，例如快速热氧化（RTO），湿氧化或干燥氧化，在大气压下形成第一氧化物层。 在另一个实施方案中，第一氧化物层在接近大气压下，在约1-5个大气压的压力下形成。 湿氧或干氧化用于氧化环境。 第一氧化物层形成为约500埃或更小，通常大于200埃的厚度。 氧化步骤使用约600至1100摄氏度的温度。

公开(公告)号：US5846888A

公开(公告)日：1998-12-08

申请号：US721838

申请日：1996-09-27

申请人： David L. Chapek ,  Randhir P. S. Thakur

发明人： David L. Chapek ,  Randhir P. S. Thakur

IPC分类号： H01L21/316

CPC分类号： H01L21/0223 ,  H01L21/02255 ,  H01L21/3165 ,  H01L21/31658

摘要： A desirable impurity, such as reactive gases and inert gases, is safely introduced into a substrate/oxide interface during high pressure thermal oxidation. Desirable impurities include chlorine, fluorine, bromine, iodine, astatine, nitrogen, nitrogen trifluoride, and ammonia. In one embodiment, the desirable impurity is introduced into a processing chamber prior to the high pressure oxidation step. Then, the temperature is brought to or maintained at an oxidation temperature. In another embodiment, the desirable impurity is introduced into the processing chamber after the high pressure oxidation step, while the temperature is still sufficiently high for oxidation. In yet another embodiment, the desirable impurity is introduced into the processing chamber both before and after the high pressure oxidation step.

摘要翻译： 在高压热氧化期间，将理想的杂质（例如反应气体和惰性气体）安全地引入衬底/氧化物界面。 理想的杂质包括氯，氟，溴，碘，ast，氮，三氟化氮和氨。 在一个实施方案中，在高压氧化步骤之前，将所需的杂质引入处理室。 然后，使温度达到或保持在氧化温度。 在另一个实施方案中，在高压氧化步骤之后将所需的杂质引入处理室中，同时温度仍然足够高以进行氧化。 在另一个实施方案中，在高压氧化步骤之前和之后将期望的杂质引入处理室。

公开(公告)号：US06380103B2

公开(公告)日：2002-04-30

申请号：US09793248

申请日：2001-02-26

申请人： Fernando Gonzalez ,  Randhir P. S. Thakur

发明人： Fernando Gonzalez ,  Randhir P. S. Thakur

IPC分类号： H01L21306

CPC分类号： H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/31116 ,  H01L21/31662 ,  Y10S438/906 ,  Y10S438/913

摘要： At least both a rapid thermal etch step and a rapid thermal oxidation step are performed on a semiconductor substrate in situ in a rapid thermal processor. A method including an oxidation step followed by an etch step may be used to remove contamination and damage from a substrate. A method including a first etch step followed by an oxidation step and a second etch step may likewise be used to remove contamination and damage, and a final oxidation step may optionally be included to grow an oxide film. A method including an etch step followed by an oxidation step may also be used to grow an oxide film. Repeated alternate in situ oxidation and etch steps may be used until a desired removal of contamination or silicon damage is accomplished.

摘要翻译： 在快速热处理器中至少在半导体衬底上进行快速热蚀刻步骤和快速热氧化步骤。 可以使用包括氧化步骤和随后的蚀刻步骤的方法来去除基底的污染和损伤。 同样可以使用包括第一蚀刻步骤之后的氧化步骤和第二蚀刻步骤的方法来去除污染物和损伤，并且可以任选地包括最终氧化步骤以生长氧化膜。 包括氧化步骤之后的蚀刻步骤的方法也可用于生长氧化膜。 可以使用重复的原位氧化和蚀刻步骤，直到完成所需的污染物或硅损伤去除。

公开(公告)号：US5646075A

公开(公告)日：1997-07-08

申请号：US559511

申请日：1995-11-15

申请人： Randhir P. S. Thakur ,  Fernando Gonzalez

发明人： Randhir P. S. Thakur ,  Fernando Gonzalez

IPC分类号： H01L21/3105 ,  H01L21/316 ,  H01L21/768 ,  H01L21/324 ,  H01L21/477

CPC分类号： H01L21/31058 ,  H01L21/316 ,  H01L21/76819 ,  Y10S148/133

摘要： The present invention teaches a method for fabricating semiconductors. The method initially comprises the step of forming a conformal layer superjacent at least two conductive layers. The conformal layer preferably comprises tetraethylorthosilicate ("TEOS") and has a thickness of at least 50 .ANG.. Subsequently, a barrier layer is formed superjacent the conformal layer to prevent subsequent layers from diffusing into active regions. The barrier layer preferably comprises Si.sub.3 N.sub.4, though other suitable materials known to one of ordinary skill in the art may be employed. Further, a glass layer is then formed superjacent the barrier layer. The glass layer comprises at least one of SiO.sub.2, phosphosilicate glass, borosilicate glass, and borophosphosilicate glass, and has a thickness of at least 1 k.ANG.. Upon forming the glass layer, the glass layer is heated to a temperature of at least 800.degree. C. for at least 15 minutes while introducing H.sub.2 and O.sub.2 at a substantially high temperature to cause vaporization, thereby causing the glass layer to reflow. Next, the glass layer is exposed to a gas and radiant energy for approximately 5 seconds to 60 seconds, thereby making said glass layer substantially planar. The radiant energy generates a temperature substantially within the range of 700.degree. C. to 1250.degree. C. Further, the gas comprises at least one of N.sub.2, NH.sub.3, O.sub.2, N.sub.2 O, Ar, Ar--H.sub.2, H.sub.2, GeH.sub.4, and a Fluorine based gas.

摘要翻译： 本发明教导了半导体制造方法。 该方法最初包括在至少两个导电层之上形成保形层的步骤。 共形层优选包括原硅酸四乙酯（“TEOS”），并且具有至少50的厚度。 随后，在保形层之上形成阻挡层，以防止随后的层扩散到活性区域。 阻挡层优选包含Si 3 N 4，尽管可以使用本领域普通技术人员已知的其它合适的材料。 此外，然后在阻挡层的上方形成玻璃层。 玻璃层包括SiO 2，磷硅酸盐玻璃，硼硅酸盐玻璃和硼磷硅酸盐玻璃中的至少一种，并且具有至少1k ANGSTROM的厚度。 在形成玻璃层时，将玻璃层加热到至少800℃的温度至少15分钟，同时在基本上高的温度下引入H 2和O 2以引起气化，从而使玻璃层回流。 接下来，玻璃层暴露于气体和辐射能量约5秒至60秒，从而使所述玻璃层基本上是平面的。 辐射能产生基本上在700℃至1250℃范围内的温度。此外，气体包括N 2，NH 3，O 2，N 2 O，Ar，Ar-H 2，H 2，GeH 4和氟中的至少一种 基气体。

公开(公告)号：US5425392A

公开(公告)日：1995-06-20

申请号：US67660

申请日：1993-05-26

申请人： Randhir P. S. Thakur ,  Fernando Gonzalez ,  Annette L. Martin

发明人： Randhir P. S. Thakur ,  Fernando Gonzalez ,  Annette L. Martin

IPC分类号： H01L21/28 ,  H01L21/8239

CPC分类号： H01L21/28247 ,  H01L21/28061

摘要： The present invention teaches a method for reducing sheet resistance in the fabrication of semiconductor wafers. A silicon substrate having a gate oxide layer thereon is provided in a chamber. Subsequently, a polysilicon layer is formed superjacent the gate oxide layer in situ by exposing the silicon substrate to a first gas comprising at least one of silane, disilane, and dichlorosilane, and radiant energy at a temperature substantially within the range of 500.degree. C. to 1250.degree. C. for at least 10 seconds. The polysilicon substrate can be doped with a material such as phosphorus, arsenic and boron for example, by exposing the polysilicon to a second gas under the stated conditions. A conductive layer comprising at least one of tungsten silicide (WSi.sub.x) and titanium silicide (TiSi.sub.x) can be formed superjacent the polysilicon by exposing the polysilicon to a third gas comprising at least one of WF.sub.6, TMAT and TiCl.sub.4.

摘要翻译： 本发明教导了一种在半导体晶片的制造中降低薄层电阻的方法。 在其中设置有其上具有栅极氧化物层的硅衬底。 随后，通过将硅衬底暴露于包括硅烷，乙硅烷和二氯硅烷中的至少一种的第一气体和基本上在500℃的温度范围内的辐射能，在栅极氧化物层的上方形成多晶硅层。 至1250℃至少10秒钟。 多晶硅衬底可以掺杂例如磷，砷和硼的材料，例如通过在所述条件下将多晶硅暴露于第二气体。 通过将多晶硅暴露于包含WF6，TMAT和TiCl4中的至少一种的第三气体，可以在多晶硅之上形成包括硅化钨（WSix）和硅化钛（TiSix）中的至少一种的导电层。

公开(公告)号：US5953621A

公开(公告)日：1999-09-14

申请号：US985588

申请日：1997-12-05

申请人： Fernando Gonzalez ,  David Chapek ,  Randhir P. S. Thakur

发明人： Fernando Gonzalez ,  David Chapek ,  Randhir P. S. Thakur

IPC分类号： H01L21/762

CPC分类号： H01L21/76237

摘要： The present invention relates to a method for forming an isolation trench structure in a semiconductor substrate without causing deleterious topographical depressions in the upper surface thereof which cause current and charge leakage to an adjacent active area. The inventive method forms a pad oxide upon a semiconductor substrate, and then forms a nitride layer on the pad oxide. The nitride layer is patterned with a mask and etched to expose a portion of the pad oxide layer and to protect an active area in the semiconductor substrate that remains covered with the nitride layer. A second dielectric layer is formed substantially conformably over the pad oxide layer and the remaining portions of the first dielectric layer. A spacer etch is then carried out to form a spacer from the second dielectric layer. The spacer is in contact with the remaining portion of the first dielectric layer. An isolation trench etch follows the spacer etch. An optional thermal oxidation of the surfaces in the isolation trench may be performed, which may optionally be followed by doping of the bottom of the isolation trench to further isolate neighboring active regions on either side of the isolation trench. A conformal layer is formed substantially conformably over the spacer, over the remaining portions of the first dielectric layer, and substantially filling the isolation trench. Planarization of the conformal layer follows, either by CMP or by etchback or by a combination thereof. An isolation trench filled with a structure results. The resulting structure has a flange and shaft, the cross section of which has a nail shape in cross section.

摘要翻译： 本发明涉及一种用于在半导体衬底中形成隔离沟槽结构的方法，而不会在其上表面造成有害的地形凹陷，这导致电流和电荷泄漏到相邻的有效区域。 本发明的方法在半导体衬底上形成衬垫氧化物，然后在衬底氧化物上形成氮化物层。 用掩模对氮化物层进行图案化并蚀刻以暴露焊盘氧化物层的一部分并保护半导体衬底中保留被氮化物层覆盖的有源区。 第二电介质层基本上顺应地形成在焊盘氧化物层和第一电介质层的剩余部分上。 然后进行间隔物蚀刻以从第二介电层形成间隔物。 间隔物与第一电介质层的剩余部分接触。 隔离沟蚀刻遵循间隔物蚀刻。 可以执行隔离沟槽中的表面的可选热氧化，其可以任选地随后掺杂隔离沟槽的底部以进一步隔离隔离沟槽的任一侧上的相邻有源区。 在第一介电层的剩余部分上基本上顺应地形成保形层，并基本上填充隔离沟槽。 通过CMP或通过回蚀或其组合，可以平铺保形层。 填充结构的隔离沟槽结果。 所得到的结构具有法兰和轴，其横截面具有指甲形状。

公开(公告)号：US6072226A

公开(公告)日：2000-06-06

申请号：US844169

申请日：1997-04-18

申请人： Randhir P. S. Thakur ,  J. Brett Rolfson ,  Fernando Gonzalez ,  John T. Moore

发明人： Randhir P. S. Thakur ,  J. Brett Rolfson ,  Fernando Gonzalez ,  John T. Moore

IPC分类号： H01L21/3105 ,  H01L21/316 ,  H01L21/762 ,  H01L29/00

CPC分类号： H01L21/31053 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/31658 ,  H01L21/76216 ,  Y10S438/978

摘要： A method for forming a field isolation structure and an improved field isolation structure are provided. The method includes forming a field oxide on a silicon substrate using an ozone enhanced local oxidation of silicon (LOCOS) process. Following formation of the field oxide a surface topography of the field oxide is sloped or tapered by ion milling, dry etching, reactive ion etching or chemical mechanical planarization. With an ozone enhanced LOCOS process, oxidation rates are increased and stress between the field oxide and substrate are reduced. This permits the formation of field isolation structures with reduced lateral encroachment and a smaller bird's beak area. In addition, the sloped topography of the field oxide permits a subsequently deposited conductive layer (e.g., polysilicon) to be etched without the formation of conductive stringers. During the etch process the active areas on the substrate can be protected with a sacrificial oxide or by only partially removing the LOCOS mask.

摘要翻译： 提供了一种用于形成场隔离结构和改进的场隔离结构的方法。 该方法包括使用臭氧增强的局部氧化硅（LOCOS）工艺在硅衬底上形成场氧化物。 在形成场氧化物之后，场氧化物的表面形貌通过离子研磨，干蚀刻，反应离子蚀刻或化学机械平面化而倾斜或渐缩。 通过臭氧增强的LOCOS工艺，氧化速率增加，场氧化物和衬底之间的应力降低。 这允许形成具有减小的横向侵入和较小鸟喙面积的场隔离结构。 此外，场氧化物的倾斜形貌允许随后沉积的导电层（例如，多晶硅）被蚀刻而不形成导电桁条。 在蚀刻过程中，可以用牺牲氧化物或仅部分去除LOCOS掩模来保护衬底上的有源区域。

公开(公告)号：US5672539A

公开(公告)日：1997-09-30

申请号：US538732

申请日：1995-10-03

申请人： Randhir P. S. Thakur ,  J. Brett Rolfson ,  Fernando Gonzalez ,  John T. Moore

发明人： Randhir P. S. Thakur ,  J. Brett Rolfson ,  Fernando Gonzalez ,  John T. Moore

IPC分类号： H01L21/3105 ,  H01L21/316 ,  H01L21/762 ,  H01L21/76

CPC分类号： H01L21/31053 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/31658 ,  H01L21/76216 ,  Y10S438/978

摘要： A method for forming a field isolation structure and an improved field isolation structure are provided. The method includes forming a field oxide on a silicon substrate using an ozone enhanced local oxidation of silicon (LOCOS) process. Following formation of the field oxide a surface topography of the field oxide is sloped or tapered by ion milling, dry etching, reactive ion etching or chemical mechanical planarization. With an ozone enhanced LOCOS process, oxidation rates are increased and stress between the field oxide and substrate are reduced. This permits the formation of field isolation structures with reduced lateral encroachment and a smaller bird's beak area. In addition, the sloped topography of the field oxide permits a subsequently deposited conductive layer (e.g., polysilicon) to be etched without the formation of conductive stringers. During the etch process the active areas on the substrate can be protected with a sacrificial oxide or by only partially removing the LOCOS mask.

摘要翻译： 提供了一种用于形成场隔离结构和改进的场隔离结构的方法。 该方法包括使用臭氧增强的局部氧化硅（LOCOS）工艺在硅衬底上形成场氧化物。 在形成场氧化物之后，场氧化物的表面形貌通过离子研磨，干蚀刻，反应离子蚀刻或化学机械平面化而倾斜或渐缩。 通过臭氧增强的LOCOS工艺，氧化速率增加，场氧化物和衬底之间的应力降低。 这允许形成具有减小的横向侵入和较小鸟喙面积的场隔离结构。 此外，场氧化物的倾斜形貌允许随后沉积的导电层（例如，多晶硅）被蚀刻而不形成导电桁条。 在蚀刻过程中，可以用牺牲氧化物或仅部分去除LOCOS掩模来保护衬底上的有源区域。