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1.发明授权
公开(公告)号：US5696510A
公开(公告)日：1997-12-09
申请号：US443517
申请日：1995-05-18
CPC分类号： H03M1/1215 , H03M1/148 , H03M1/365
摘要： The disclosure is an analog-to-digital converter of half-flash type providing for the multiplexing of two analog input signals and therefore requiring only one converter module. It includes a coarse comparator block used to determine the most significant bits of the converted signals and also determining the voltage range for two fine comparator blocks that determine the least significant bits of the converted signals, wherein each of the input signals is connected to a fine comparator block and said coarse comparator block compares alternatively the first and second input signals with a reference voltage. The analog-to-digital converter can be advantageously used for processing television signals.
摘要翻译： 本公开是半闪存型的模数转换器，其提供两个模拟输入信号的复用，因此仅需要一个转换器模块。 它包括用于确定转换信号的最高有效位的粗略比较器块，并且还确定确定转换信号的最低有效位的两个精细比较器块的电压范围，其中每个输入信号被连接到一个精细 比较器块和所述粗略比较器块将第一和第二输入信号与参考电压进行比较。 模拟 - 数字转换器可以有利地用于处理电视信号。
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公开(公告)号：US6125094A
公开(公告)日：2000-09-26
申请号：US66726
申请日：1998-04-23
摘要： A current amplifier includes a cascode transistor for fixing the voltage of an input of the amplifier; a first constant current source connected between the input and a first supply voltage; a second constant current source, for providing a current lower than the first current source, connected between a second supply voltage and the cascode transistor; a second transistor, of different type than the cascode transistor, connected between the input and the second supply voltage, and controlled by the node between the cascode transistor and the second current source; and an output transistor of same type as the second transistor, connected to the second supply voltage and controlled by the node.
摘要翻译： 电流放大器包括用于固定放大器的输入端的电压的共源共栅晶体管; 连接在所述输入端和第一电源电压之间的第一恒流源; 第二恒流源，用于提供连接在第二电源电压和共源共栅晶体管之间的低于第一电流源的电流; 第二晶体管，其不同于共源共栅晶体管的类型，连接在输入和第二电源电压之间，并由共源共栅晶体管和第二电流源之间的节点控制; 以及与第二晶体管相同类型的输出晶体管，连接到第二电源电压并由节点控制。
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公开(公告)号：US5867066A
公开(公告)日：1999-02-02
申请号：US631733
申请日：1996-04-11
摘要： A current amplifier includes a cascode transistor for fixing the voltage of an input of the amplifier; a first constant current source connected between the input and a first supply voltage; a second constant current source, for providing a current lower than the first current source, connected between a second supply voltage and the cascode transistor; a second transistor, of different type than the cascode transistor, connected between the input and the second supply voltage, and controlled by the node between the cascode transistor and the second current source; and an output transistor of same type as the second transistor, connected to the second supply voltage and controlled by the node.
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公开(公告)号：US5956262A
公开(公告)日：1999-09-21
申请号：US614862
申请日：1996-03-12
CPC分类号： H03H17/0226 , H03H17/0292 , H03H17/0607 , H03H17/0657 , H03H2218/10
摘要： A digital sample filtering device comprising storage device including ROM and RAM memory for storing in an interlaced manner, coefficients of at least two filters along with for each coefficient, data indicating to which of the filters the each coefficient belongs; a multiplier for multiplying at least one of the coefficients by a sample and an accumulator for adding the partial sums of the multiplication results for each of the filters.
摘要翻译： 一种数字样本滤波装置，包括存储装置，包括ROM和RAM存储器，用于以隔行方式存储至少两个滤波器的系数以及每个系数，指示每个系数属于哪个滤波器的数据; 乘法器，用于将系数中的至少一个乘以采样和累加器，用于将每个滤波器的相乘结果的部分和相加。
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5.发明授权
公开(公告)号：US5684485A
公开(公告)日：1997-11-04
申请号：US503908
申请日：1995-07-18
摘要： The disclosure concerns a so-called "auto-zeroing" comparator of two analog input voltages to be compared, and an analog-to-digital converter using a set of auto-zeroing comparators enabling the number of comparators required for an analog-to-digital conversion to be reduced. The main originality of the invention is that this comparator includes a second stage constituted by an inverter function provided in such a way that only a first transistor is controlled on its gate by the previous stage, a second transistor having its gate and drain short-circuited by a switch during the auto-zeroing phase, and a third transistor used as a capacitor and connected to the gate of said second transistor and also to the supply voltage. The present invention is applicable in particular to all types of CMOS multi-comparison ADCs using at least one "auto-zeroing" comparator.
摘要翻译： 本公开涉及要比较的两个模拟输入电压的所谓“自动调零”比较器，以及使用一组自动归零比较器的模数转换器，使得能够使模拟 - 数字转换要减少。 本发明的主要原因在于该比较器包括由反相器功能构成的第二级，该反相器功能以仅在其栅极上由前一级控制第一晶体管的方式提供，其栅极和漏极短路的第二晶体管 通过在自动归零阶段期间的开关，以及用作电容器并连接到所述第二晶体管的栅极的第三晶体管以及电源电压。 本发明特别适用于使用至少一个“自动归零”比较器的所有类型的CMOS多比较ADC。
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公开(公告)号：US5815103A
公开(公告)日：1998-09-29
申请号：US634306
申请日：1996-04-16
CPC分类号： H03M1/745
摘要： A digital-to-analog converter that includes pairs of positive and negative current sources that are connected through switches to two differential output lines. The switches are controlled as a function of a digital data. Each pair of current sources includes a pair of transistors of an output stage of a transconductance amplifier. The transconductance amplifier receives a reference voltage at a non-inverting input, and receives at an inverting input, the voltage at the middle node of a bridge of resistors that is connected between the two differential out-put lines. The output of the converter is the voltage between the two differential output lines.
摘要翻译： 一个数模转换器，包括通过开关连接到两个差分输出线的正和负电流源对。 开关作为数字数据的功能进行控制。 每对电流源包括跨导放大器的输出级的一对晶体管。 跨导放大器在非反相输入端接收参考电压，并在反相输入端接收连接在两个差分输出线之间的电阻桥的中间节点处的电压。 转换器的输出是两个差分输出线之间的电压。
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7.发明授权Method of enhancing the noise immunity of a phase-locked loop, and device implementing this method 失效提高锁相环噪声抗扰度的方法，以及实现该方法的装置
公开(公告)号：US5663688A
公开(公告)日：1997-09-02
申请号：US553376
申请日：1996-04-02
CPC分类号： H04N5/126 , H03L7/085 , H03L7/14 , H03L7/191 , H03L7/0891
摘要： The present invention relates to a method of enhancing the noise Immunity of a phase-locked loop. The phase-locked loop includes a comparator and apparatus for inhibiting the action of the comparator on the phase-locked loop. According to the method, the inhibition is lifted during a main time window resulting from the intersection of a first time window derived from the input signal of the phase-locked loop, and of a second time window derived from the loop-return signal.
摘要翻译： PCT No.PCT / FR94 / 00659 Sec。 371日期：1996年4月2日 102（e）日期1996年4月2日PCT提交1994年6月3日PCT公布。 WO94 / 29964 PCT公开号 日期1994年12月22日本发明涉及增强锁相环噪声抗扰度的方法。 锁相环包括用于抑制比较器在锁相环上的动作的比较器和装置。 根据该方法，在由从锁相环的输入信号导出的第一时间窗口与从循环返回信号导出的第二时间窗口的交点产生的主时间窗口期间，禁止被提升。
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公开(公告)号：US20070075791A1
公开(公告)日：2007-04-05
申请号：US11464946
申请日：2006-08-16
IPC分类号： H03B5/12
CPC分类号： H03B5/04 , H03B5/1206 , H03B5/1253 , H03B5/1265
摘要： An electronic circuit element has two capacitance values selected by means of a main control signal. The electronic circuit element comprises two variable-capacitance electronic components connected in parallel and each receiving opposite intermediate control signals, derived from the main control signal. The two variable-capacitance components are differentiated by a configuration parameter. The electronic circuit element exhibits a variation in capacitance corresponding to a difference between respective variations in capacitance of the two variable-capacitance electronic components during an inversion of the main control signal. The variation in capacitance of the electronic circuit element may be less than 5 attoFarads.
摘要翻译： 电子电路元件具有通过主控制信号选择的两个电容值。 电子电路元件包括并联连接的两个可变电容电子元件，并且各自接收来自主控制信号的相反的中间控制信号。 两个可变电容分量由配置参数区分。 电子电路元件在主控制信号的反转期间呈现出与两个可变电容电子部件的电容的各自变化的差异的电容变化。 电子电路元件的电容变化可能小于5attoFarads。
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9.发明授权Electronic component allowing the decoding of digital terrestrial or cable television signals 有权允许数字地面或有线电视信号解码的电子元件公开(公告)号：US07962949B2
公开(公告)日：2011-06-14
申请号：US10814621
申请日：2004-03-31
CPC分类号： H04N5/4446 , H03D3/007 , H03D7/161 , H04L2027/0016 , H04L2027/0024 , H04N5/4401 , H04N5/455 , H04N21/426 , H04N21/6112
摘要： A dual-conversion tuner firstly upconverts so as to place itself outside the receive band and then downconverts with zero intermediate frequency. A filter of the surface acoustic wave type is disposed between the two frequency transposition stages of the tuner. After baseband filtering, the signals are digitized then processed in a digital block comprising a channel decoding module. With the exception of the surface acoustic wave filter, the components are entirely embodied in integrated fashion.
摘要翻译： 首先将双转换调谐器上变频，将其自身置于接收频带外，然后以零中频下变频。 表面声波型滤波器设置在调谐器的两个频率转置级之间。 在基带滤波之后，信号被数字化，然后在包括信道解码模块的数字块中进行处理。 除了表面声波滤波器之外，组件完全以整体方式体现。
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公开(公告)号：US07408422B2
公开(公告)日：2008-08-05
申请号：US11464946
申请日：2006-08-16
IPC分类号： H03B5/18
CPC分类号： H03B5/04 , H03B5/1206 , H03B5/1253 , H03B5/1265
摘要： An electronic circuit element has two capacitance values selected by means of a main control signal. The electronic circuit element comprises two variable-capacitance electronic components connected in parallel and each receiving opposite intermediate control signals, derived from the main control signal. The two variable-capacitance components are differentiated by a configuration parameter. The electronic circuit element exhibits a variation in capacitance corresponding to a difference between respective variations in capacitance of the two variable-capacitance electronic components during an inversion of the main control signal. The variation in capacitance of the electronic circuit element may be less than 5 attoFarads.
摘要翻译： 电子电路元件具有通过主控制信号选择的两个电容值。 电子电路元件包括并联连接的两个可变电容电子元件，并且各自接收来自主控制信号的相反的中间控制信号。 两个可变电容分量由配置参数区分。 电子电路元件在主控制信号的反转期间呈现出与两个可变电容电子部件的电容的各自变化的差异的电容变化。 电子电路元件的电容变化可能小于5attoFarads。
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