Abstract:
A phase change memory device is disclosed. A second conductive spacer is under a first conductive spacer. A phase change layer comprises a first portion substantially parallel to the first and second conductive spacers and a second portion on top of the second conductive spacer, wherein the second conductive spacer is electrically connected to the first conductive spacer through the second portion of the phase change layer.
Abstract:
A phase-change memory and fabrication method thereof. The phase-change memory comprises a transistor, and a phase-change material layer. In particular, the phase-change material layer is directly in contact with one electrical terminal of the transistor. Particularly, the transistor can be a field effect transistor or a bipolar junction transistor.
Abstract:
The disclosure provides a non-volatile memory structure and a method for fabricating the same. The non-volatile memory structure includes a first contact connected to a first transistor. A second contact is connected to a second transistor. A resistance-changing memory material pattern covers and contacts the second contact but not the first contact. A top electrode contacts both the resistance-changing memory material pattern and the first contact. An area of the resistance-changing memory material pattern is substantially larger than an area of its interface with the second contact.
Abstract:
Phase change memory devices and methods for manufacturing the same are provided. An exemplary embodiment of a phase change memory device includes a first electrode disposed in a first dielectric layer. A second dielectric layer is disposed over the first dielectric layer and the first electrode. A phase change material layer disposed in the second dielectric layer to electrically contact the first electrode. A third dielectric layer is disposed over the second dielectric layer. A second electrode is disposed in the third dielectric layer to electrically connect the phase change material layer and at least one gap disposed in the first dielectric layer or the second dielectric layer to thereby isolate portions of the phase change material layer and portions of the first or second dielectric layer adjacent thereto.
Abstract:
A method of photolithographic exposure is disclosed. The photolithographic exposure method comprises providing a substrate, forming a first resist layer thereon, forming a second resist layer on the first resist layer, the second resist layer providing a transmission which first increases then decreases as exposure dose increases, and exposing the second resist layer.
Abstract:
A phase-change memory cell is proposed. The phase-change memory includes a bottom electrode; a phase-change spacer formed to contact the bottom electrode; an electrical conductive layer having a vertical portion and a horizontal portion, wherein the electrical conductive layer electrically connects to the phase-change spacer via the horizontal portion; and a top electrode electrically connected to the electrical conductive layer via the vertical portion of the electrically conductive layer.
Abstract:
A method for forming patterns comprises providing a substrate. A set of seed features is formed over the substrate. At least one bi-layer comprising a first layer followed by a second layer is formed on the set of seed features. The first layer and the second layer above the set of seed features are removed. The first layer and the second layer are anisotropically etched successively at least one time to form an opening next to the set of seed features.
Abstract:
A phase-change memory element is provided. The phase-change memory element includes: a first electrode formed on a substrate; a first dielectric layer, with an opening, formed on the first electrode, wherein the opening exposes a top surface of the first electrode; a pillar structure formed directly on the first electrode within the opening; an inner phase-change material layer surrounding the pillar structure, directly contacting the first electrode; a second dielectric layer surrounding the inner phase-change material layer; an outer phase-change material layer surrounding the second dielectric layer; a phase-change material collar formed between the second dielectric layer and the first electrode, connecting the inner phase-change material layer with the outer phase-change material layer; and a second electrode formed directly on the pillar structure, directly contacting the top surface of the inner phase-change material layer.
Abstract:
A phase-change memory element for reducing heat loss is disclosed. The phase-change memory element comprises a composite layer, wherein the composite layer comprises a dielectric material and a low thermal conductivity material. A via hole is formed within the composite layer. A phase-change material occupies at least one portion of the via hole. The composite layer comprises alternating layers or a mixture of the dielectric material and the low thermal conductivity material.
Abstract:
A phase-change memory element with an electrically isolated conductor is provided. The phase-change memory element includes: a first electrode and a second electrode; a phase-change material layer electrically connected to the first electrode and the second electrode; and at least two electrically isolated conductors, disposed between the first electrode and the second electrode, directly contacting the phase-change material layers.