公开(公告)号：US10032912B2

公开(公告)日：2018-07-24

申请号：US14588221

申请日：2014-12-31

Applicant: STMICROELECTRONICS, INC. ,  GLOBALFOUNDRIES INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Pierre Morin ,  Kangguo Cheng ,  Jody Fronheiser ,  Xiuyu Cai ,  Juntao Li ,  Shogo Mochizuki ,  Ruilong Xie ,  Hong He ,  Nicolas Loubet

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/092

Abstract: A modified silicon substrate having a substantially defect-free strain relaxed buffer layer of SiGe is suitable for use as a foundation on which to construct a high performance CMOS FinFET device. The substantially defect-free SiGe strain-relaxed buffer layer can be formed by making cuts in, or segmenting, a strained epitaxial film, causing edges of the film segments to experience an elastic strain relaxation. When the segments are small enough, the overall film is relaxed so that the film is substantially without dislocation defects. Once the substantially defect-free strain-relaxed buffer layer is formed, strained channel layers can be grown epitaxially from the relaxed SRB layer. The strained channel layers are then patterned to create fins for a FinFET device. In one embodiment, dual strained channel layers are formed—a tensilely strained layer for NFET devices, and a compressively strained layer for PFET devices.

公开(公告)号：US20180197980A1

公开(公告)日：2018-07-12

申请号：US15913194

申请日：2018-03-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hong He ,  Chiahsun Tseng ,  Junli Wang ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/785 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/78696

Abstract: A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without extending into the first and second source/drain regions.

公开(公告)号：US09218962B2

公开(公告)日：2015-12-22

申请号：US14057064

申请日：2013-10-18

Applicant: GLOBALFOUNDRIES INC. ,  Matheson Tri-Gas, Inc.

Inventor： Paul D. Brabant ,  Keith Chung ,  Hong He ,  Devendra K. Sadana ,  Manabu Shinriki

IPC: H01L21/36 ,  H01L21/20 ,  H01L21/02 ,  C30B25/02 ,  C30B29/52

CPC classification number: H01L21/02532 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02636

Abstract: A high order silane having a formula of SinH2n+2, in which n is an integer greater than 3, in combination with a germanium precursor gas is employed to deposit an epitaxial semiconductor alloy material including at least silicon and germanium on a single crystalline surface. The germanium precursor gas effectively reduces the gas phase reaction of the high order silane, thereby improving the thickness uniformity of the deposited epitaxial semiconductor alloy material. The combination of the high order silane and the germanium precursor gas provides a high deposition rate in the Frank-van der Merwe growth mode for deposition of a single crystalline semiconductor alloy material.

Abstract translation: 使用与锗前体气体组合的具有式SinH2n + 2的其中n为大于3的整数的高级硅烷在单一结晶表面上沉积至少包含硅和锗的外延半导体合金材料。 锗前体气体有效地降低了高级硅烷的气相反应，从而提高了沉积的外延半导体合金材料的厚度均匀性。 高阶硅烷和锗前体气体的组合在用于沉积单晶半导体合金材料的Frank-van der Merwe生长模式中提供高沉积速率。

公开(公告)号：US09947791B2

公开(公告)日：2018-04-17

申请号：US13965322

申请日：2013-08-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hong He ,  Chiahsun Tseng ,  Junli Wang ,  Chun-chen Yeh ,  Yunpeg Yin

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06

CPC classification number: H01L29/785 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/78696

Abstract: A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without extending into the first and second source/drain regions.

公开(公告)号：US09362310B2

公开(公告)日：2016-06-07

申请号：US14694243

申请日：2015-04-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Thomas N. Adam ,  Kangguo Cheng ,  Bruce B. Doris ,  Hong He ,  Ali Khakifirooz ,  Alexander Reznicek

IPC: H01L27/092 ,  H01L27/12 ,  H01L21/8238 ,  H01L29/66 ,  H01L27/088 ,  H01L21/84 ,  H01L21/8234 ,  H01L29/167 ,  H01L29/161 ,  H01L29/165 ,  H01L21/02

CPC classification number: H01L27/1211 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/66795 ,  H01L29/6681

Abstract: A method for manufacturing a fin field-effect transistor (FinFET) device comprises forming a plurality of fins on a substrate, epitaxially growing a sacrificial epitaxy region between the fins, stopping growth of the sacrificial epitaxy region at a beginning of merging of epitaxial shapes between neighboring fins, and forming a dielectric layer on the substrate including the fins and the sacrificial epitaxy region, wherein a portion of the dielectric layer is positioned between the sacrificial epitaxy region extending from fins of adjacent transistors.

公开(公告)号：US10529858B2

公开(公告)日：2020-01-07

申请号：US15913194

申请日：2018-03-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hong He ,  Chiahsun Tseng ,  Junli Wang ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06

Abstract: A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without extending into the first and second source/drain regions.

公开(公告)号：US09293345B2

公开(公告)日：2016-03-22

申请号：US13968807

申请日：2013-08-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L21/302 ,  H01L21/311 ,  H01L29/78 ,  H01L21/308 ,  H01L29/417 ,  H01L29/08 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/092 ,  H01L29/66

CPC classification number: H01L21/31111 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0924 ,  H01L29/0886 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: Semiconductor devices and sidewall image transfer methods with a spin on hardmask. Methods for forming fins include forming a trench through a stack of layers that includes a top and bottom insulator layer, and a layer to be patterned on a substrate; isotropically etching the top and bottom insulator layers; forming a hardmask material in the trench to the level of the bottom insulator layer; isotropically etching the top insulator layer; and etching the bottom insulator layer and the layer to be patterned down to the substrate to form fins from the layer to be patterned.

Abstract translation: 半导体器件和侧壁图像传输方法，在硬掩模上旋转。 用于形成翅片的方法包括通过包括顶部和底部绝缘体层的层叠层和在基底上待图案化的层形成沟槽; 各向同性蚀刻顶部和底部绝缘体层; 在所述沟槽中形成硬掩模材料至所述底部绝缘体层的水平面; 各向同性蚀刻顶部绝缘体层; 并且将底部绝缘体层和待图案化的层蚀刻到衬底上以从待图案化的层形成翅片。